CN110492848A - The number adjustment device and its method of adjustment of RC oscillator - Google Patents

The number adjustment device and its method of adjustment of RC oscillator Download PDF

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Publication number
CN110492848A
CN110492848A CN201910751297.8A CN201910751297A CN110492848A CN 110492848 A CN110492848 A CN 110492848A CN 201910751297 A CN201910751297 A CN 201910751297A CN 110492848 A CN110492848 A CN 110492848A
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CN
China
Prior art keywords
module
clock signal
adjustment
oscillator
numerical value
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CN201910751297.8A
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Chinese (zh)
Inventor
周恩
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Chengdu Rui Core Micro Polytron Technologies Inc
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Chengdu Rui Core Micro Polytron Technologies Inc
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Priority to CN201910751297.8A priority Critical patent/CN110492848A/en
Publication of CN110492848A publication Critical patent/CN110492848A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/20Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/181Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

The invention discloses the number adjustment devices and its method of adjustment of a kind of RC oscillator, are related to technical field of integrated circuits.The device includes oscillator module, counting module, comparison module and algoritic module, the oscillator module exports clock signal, the counting module receives the clock signal and reference clock, and the reference clock is counted by the clock signal to obtain actual count value, the comparison module receives the actual count value and preset objective count value, and comparison result is exported to the algoritic module, adjustment numerical value is calculated according to the comparison result in the algoritic module, and the adjustment numerical value is sent to the oscillator module, the oscillator module adjusts its output frequency according to the adjustment numerical value.Technical solution of the present invention realizes the adjustment of the frequency of RC oscillator, and the power consumption of circuit is reduced while increasing circuit flexibility, do not increase circuit area.

Description

The number adjustment device and its method of adjustment of RC oscillator
Technical field
The present invention relates to technical field of integrated circuits, more particularly to the number adjustment device of RC oscillator and its adjustment side Method.
Background technique
Current RC oscillator is using resistance, capacitor as the oscillator of feedback and frequency-selecting element, and outstanding feature is can To generate very low vibration frequency.RC oscillator is due to CMOS(complementary Metal-oxide- Semiconductor, complementary metal oxide semiconductor) in technique manufacturing process there are fabrication error, the capacitance resistance of production, And MOS(metal oxide semiconductor, metal-oxide semiconductor (MOS)) pipe, size and design value have error.It is existing Usually can be by the precision controlling of gate oxide capacitance within ± 20% in CMOS technology, certain techniques may remain in ± 10% Within, the error of resistance is generally ± 20%.Due to the influence of fabrication error, cause Embedded oscillator precision lower.This Outside, the clock output that the variation of supply voltage and temperature also results in piece internal oscillator has deviation.
Traditional RC oscillator uses controllable current source array or capacitor array, realizes number adjustment.Such RC oscillation The method of adjustment of device will increase circuit area, and increasing circuit power consumption and circuit multiplexer rate reduces.In face of the RC of different frequency When oscillator, circuit modification is difficult.
Summary of the invention
The main purpose of the present invention is to provide the number adjustment devices and its method of adjustment of a kind of RC oscillator, it is intended to can The output frequency of RC oscillator is adjusted flexibly and reduces the power consumption of circuit.
To achieve the above object, the present invention provides a kind of number adjustment device of RC oscillator, including oscillator module, meter Digital-to-analogue block, comparison module and algoritic module, the oscillator module export clock signal, and the counting module receives the clock Signal and reference clock, and the reference clock is counted by the clock signal to obtain actual count value, it is described Comparison module receives the actual count value and preset objective count value, and exports comparison result to the algoritic module, institute It states algoritic module and adjustment numerical value is calculated according to the comparison result, and the adjustment numerical value is sent to the oscillator mould Block, the oscillator module adjust its output frequency according to the adjustment numerical value.
Preferably, described device further includes frequency division module, and the frequency division module is connected to described in the counting module, reception Reference clock simultaneously divides the reference clock, and to obtain sub-frequency clock signal, the counting module is according to by described Clock signal counts the sub-frequency clock signal to obtain actual count value.
Preferably, the counting module is counted by high level of the clock signal to the sub-frequency clock signal, with Obtain actual count value;The actual count value is sent to by the counting module in the low level of the sub-frequency clock signal The comparison module.
Preferably, the algoritic module is dichotomy algoritic module, and the algoritic module receives the comparison result, and leads to Dichotomy is crossed to calculate to be adjusted numerical value.
Preferably, the bit wide of the adjustment numerical value is equal with the work bit wide of RC oscillator, and the adjustment numerical value is first Initial value is the median of numerical value under the bit wide.
The present invention also provides a kind of digital methods of adjustment of RC oscillator, comprising the following steps:
S1, oscillator module export clock signal;
S2, counting module receive reference clock and the clock signal, and are carried out with the clock signal to the reference clock It counts, obtains actual count value;
S3, comparison module receive the actual count value and objective count value and are compared, when the actual count value is greater than When equal to the objective count value, the comparison result of the comparison module output is 1, when the actual count value is less than the mesh When marking count value, the comparison result of the comparison module output is 0;
S4, computing module are relatively tied according to the initial value of the default adjustment numerical value of the work bit wide of the oscillator module when described When fruit is 1, the computing module reduces the initial value of the adjustment numerical value to obtain new adjustment numerical value;When the comparison result When being 0, the computing module increases the initial value of the adjustment numerical value to obtain new adjustment numerical value;
S5, the adjustment numerical value after calculating is input to the oscillator module, the oscillator module is according to the adjustment numerical value Its frequency for exporting clock signal is adjusted, to obtain target frequency.
Preferably, the step S2 further include:
Frequency division module receives reference clock and divides to the reference clock, to obtain sub-frequency clock signal, counting module The sub-frequency clock signal and the clock signal are received, and the sub-frequency clock signal is counted with the clock signal Number, to obtain actual count value.
Preferably, the method also includes:
After the stable clock signal of oscillator module output, the counting module is with the clock signal to the frequency dividing The high level of clock signal is counted, to obtain actual count value;It is described when the sub-frequency clock signal is in low level The actual count value is sent to the comparison module by counting module.
Preferably, the algoritic module is dichotomy algoritic module, and the algoritic module receives the comparison result, and leads to Dichotomy is crossed to calculate to be adjusted numerical value.
Preferably, the bit wide of the adjustment numerical value is equal with the work bit wide of RC oscillator, and the adjustment numerical value is first Initial value is the median of numerical value under the bit wide, and when the comparison result is 1, the computing module reduces the adjustment numerical value It is the 1/2 of the median;When the comparison result is 0, the computing module increases the adjustment numerical value in described Between value with the bit wide under numerical value maximum value average value.
Technical solution of the present invention, will be practical by carrying out technology to reference clock with clock signal to obtain actual count value Count value and objective count value are compared, and the rate-adaptive pacemaker of RC oscillator is adjusted by comparing result, so that RC oscillator Preset target frequency is obtained, the adjustment of the frequency of RC oscillator is realized by digital circuit, increases circuit flexibility, no The power consumption of circuit is reduced while increasing circuit area.
Detailed description of the invention
Fig. 1 is the schematic illustration of the number adjustment device of RC oscillator in the embodiment of the present invention;
Fig. 2 is the flow diagram of the digital method of adjustment of RC oscillator in the embodiment of the present invention.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
The following further describes the present invention with reference to the drawings.
As shown in Figure 1, the embodiment of the present invention provides a kind of number adjustment device of RC oscillator, including oscillator module, Counting module, comparison module and algoritic module, the oscillator module export clock signal RCCLK, and the counting module receives The clock signal RCCLK and reference clock REFCLK, and by the clock signal RCCLK to the reference clock REFCLK It is counted to obtain actual count value REAL_NUM, the comparison module receives the actual count value REAL_NUM and presets Objective count value REF_NUM, and export comparison result COMP_OUT to the algoritic module, the algoritic module is according to Adjustment numerical value TRIM_OUT is calculated in comparison result COMP_OUT, and the adjustment numerical value TRIM_OUT is sent to the vibration Device module is swung, the oscillator module adjusts its output frequency according to the adjustment numerical value TRIM_OUT.
Preferably, described device further includes frequency division module, and the frequency division module is connected to described in the counting module, reception Reference clock REFCLK simultaneously divides the reference clock REFCLK, to obtain sub-frequency clock signal DIVN_REFCLK, institute Counting module is stated to count to obtain the sub-frequency clock signal DIVN_REFCLK according to by the clock signal RCCLK To actual count value REAL_NUM.
Preferably, the counting module is by clock signal RCCLK to the height of the sub-frequency clock signal DIVN_REFCLK Level is counted, to obtain actual count value REAL_NUM;The counting module is in the sub-frequency clock signal DIVN_ The actual count value REAL_NUM is sent to the comparison module when low level of REFCLK.
Preferably, the algoritic module is dichotomy algoritic module, and the algoritic module receives the comparison result COMP_ OUT, and calculated by dichotomy to be adjusted numerical value TRIM_OUT.
Preferably, the bit wide of the adjustment numerical value TRIM_OUT is equal with the work bit wide of RC oscillator, and the adjustment The initial value of numerical value TRIM_OUT is the median of numerical value under the bit wide.
As shown in Fig. 2, the embodiment of the present invention also provides a kind of digital method of adjustment of RC oscillator, comprising the following steps:
S1, oscillator module export clock signal RCCLK;
S2, counting module receive the reference clock REFCLK and clock signal RCCLK, and with RCCLK pairs of the clock signal The reference clock REFCLK is counted, and actual count value REAL_NUM is obtained;
S3, comparison module receive the actual count value REAL_NUM and objective count value REF_NUM and are compared, when described When actual count value REAL_NUM is more than or equal to the objective count value REF_NUM, the comparison result of the comparison module output COMP_OUT is 1, when the actual count value REAL_NUM is less than the objective count value REF_NUM, the comparison module The comparison result COMP_OUT of output is 0;
S4, computing module work as institute according to the initial value of the default adjustment numerical value TRIM_OUT of the work bit wide of the oscillator module When to state comparison result COMP_OUT be 1, the initial value that the computing module reduces the adjustment numerical value TRIM_OUT is new to obtain Adjustment numerical value TRIM_OUT;When the comparison result COMP_OUT is 0, the computing module increases the adjustment numerical value The initial value of TRIM_OUT is to obtain new adjustment numerical value TRIM_OUT;
S5, the adjustment numerical value TRIM_OUT after calculating is input to the oscillator module, the oscillator module is according to Adjustment numerical value TRIM_OUT adjusts its frequency for exporting clock signal RCCLK, to obtain target frequency.
Preferably, the step S2 further include:
Frequency division module receives reference clock REFCLK and divides to the reference clock REFCLK, to obtain frequency-dividing clock letter Number DIVN_REFCLK, counting module receive the sub-frequency clock signal DIVN_REFCLK and clock signal RCCLK, are used in combination The clock signal RCCLK counts the sub-frequency clock signal DIVN_REFCLK, to obtain actual count value REAL_ NUM。
Preferably, the method also includes:
After the clock signal RCCLK of oscillator module output stablizes, the counting module clock signal RCCLK The high level of the sub-frequency clock signal DIVN_REFCLK is counted, to obtain actual count value REAL_NUM;When described When sub-frequency clock signal DIVN_REFCLK is in low level, the counting module sends the actual count value REAL_NUM To the comparison module.
Preferably, the algoritic module is dichotomy algoritic module, and the algoritic module receives the comparison result COMP_ OUT, and calculated by dichotomy to be adjusted numerical value TRIM_OUT.
Preferably, the bit wide of the adjustment numerical value TRIM_OUT is equal with the work bit wide of RC oscillator, and the adjustment The initial value of numerical value TRIM_OUT is the median of numerical value under the bit wide, when the comparison result COMP_OUT is 1, the meter It calculates module and the adjustment numerical value TRIM_OUT is reduced to the 1/2 of the median;When the comparison result COMP_OUT is 0 When, the computing module increases the adjustment numerical value TRIM_OUT for the maximum value of numerical value under the median and the bit wide Average value.
In a particular embodiment, the reference clock REFCLK for presetting the number adjustment device of RC oscillator is 1MHZ, and frequently Rate is stablized, and is N according to the required precision of device setting frequency dividing, and N is positive integer, and reference clock REFCLK progress Fractional-N frequency is obtained Sub-frequency clock signal DIVN_REFCLK, count value, which becomes larger, after frequency dividing can be improved the precision of device, be wanted with meeting the precision of device It asks.
After the output clock stable of RC oscillator, in the high level of reference clock REFCLK, clock signal is used RCCLK removes the high level of several sub-frequency clock signal DIVN_REFCLK, obtains actual count value REAL_NUM.Default RC oscillator The target frequency of output is P, then objective count value REF_NUM is set as REF_NUM, REF_NUM=N*P/2.By comparing practical meter Numerical value REAL_NUM and objective count value REF_NUM obtain comparison result COMP_OUT, as the actual count value REAL_NUM When more than or equal to the objective count value REF_NUM, the comparison result COMP_OUT of the comparison module output is 1, when described When actual count value REAL_NUM is less than the objective count value REF_NUM, the comparison result COMP_ of the comparison module output OUT is 0.
Under binary system operating condition, the work bit wide for presetting oscillator module is 6bit, then adjusts numerical value TRIM_OUT Specific value by decimal representation be 1 ~ 64, i.e., adjustment numerical value TRIM_OUT median be 32.As comparison result COMP_ When OUT is 1, the value of adjustment numerical value TRIM_OUT becomes 16;When comparison result COMP_OUT is 0, numerical value TRIM_OUT is adjusted Value become 48.After the completion of calculating, the new adjustment numerical value TRIM_OUT being calculated is input to oscillator module, waits vibration After swinging the clock signal RCCLK stabilization of device module output, preset target frequency can be obtained.
It should be understood that the above is only a preferred embodiment of the present invention, the scope of the patents of the invention cannot be therefore limited, It is all to utilize equivalent structure or equivalent flow shift made by description of the invention and accompanying drawing content, it is applied directly or indirectly in Other related technical areas are included within the scope of the present invention.

Claims (10)

1. a kind of number adjustment device of RC oscillator, which is characterized in that including oscillator module, counting module, comparison module And algoritic module, the oscillator module export clock signal, the counting module receives the clock signal and reference clock, And the reference clock is counted by the clock signal to obtain actual count value, described in the comparison module receives Actual count value and preset objective count value, and comparison result is exported to the algoritic module, the algoritic module is according to institute It states comparison result and adjustment numerical value is calculated, and the adjustment numerical value is sent to the oscillator module, the oscillator mould Root tuber adjusts its output frequency according to the adjustment numerical value.
2. the number adjustment device of RC oscillator according to claim 1, which is characterized in that described device further includes frequency dividing Module, the frequency division module are connected to the counting module, receive the reference clock and divide to the reference clock, To obtain sub-frequency clock signal, the counting module counts the sub-frequency clock signal according to by the clock signal To obtain actual count value.
3. the number adjustment device of RC oscillator according to claim 2, which is characterized in that when the counting module passes through Clock signal counts the high level of the sub-frequency clock signal, to obtain actual count value;The counting module is described The actual count value is sent to the comparison module when low level of sub-frequency clock signal.
4. the number adjustment device of RC oscillator according to claim 2, which is characterized in that the algoritic module is two points Method algoritic module, the algoritic module receives the comparison result, and is calculated by dichotomy to be adjusted numerical value.
5. the number adjustment device of RC oscillator according to claim 4, which is characterized in that the bit wide of the adjustment numerical value It is equal with the work bit wide of oscillator module, and the initial value of the adjustment numerical value is the median of numerical value under the bit wide.
6. a kind of digital method of adjustment of RC oscillator, which comprises the following steps:
S1, oscillator module export clock signal;
S2, counting module receive reference clock and the clock signal, and are carried out with the clock signal to the reference clock It counts, obtains actual count value;
S3, comparison module receive the actual count value and objective count value and are compared, when the actual count value is greater than When equal to the objective count value, the comparison result of the comparison module output is 1, when the actual count value is less than the mesh When marking count value, the comparison result of the comparison module output is 0;
S4, computing module are relatively tied according to the initial value of the default adjustment numerical value of the work bit wide of the oscillator module when described When fruit is 1, the computing module reduces the initial value of the adjustment numerical value to obtain new adjustment numerical value;When the comparison result When being 0, the computing module increases the initial value of the adjustment numerical value to obtain new adjustment numerical value;
S5, the adjustment numerical value after calculating is input to the oscillator module, the oscillator module is according to the adjustment numerical value Its frequency for exporting clock signal is adjusted, to obtain target frequency.
7. number method of adjustment according to claim 6, which is characterized in that the step S2 further include:
Frequency division module receives reference clock and divides to the reference clock, to obtain sub-frequency clock signal, counting module The sub-frequency clock signal and the clock signal are received, and the sub-frequency clock signal is counted with the clock signal Number, to obtain actual count value.
8. number method of adjustment according to claim 7, which is characterized in that the method also includes:
After the stable clock signal of oscillator module output, the counting module is with the clock signal to the frequency dividing The high level of clock signal is counted, to obtain actual count value;It is described when the sub-frequency clock signal is in low level The actual count value is sent to the comparison module by counting module.
9. number method of adjustment according to claim 7, which is characterized in that the algoritic module is dichotomy algorithm mould Block, the algoritic module receives the comparison result, and is calculated by dichotomy to be adjusted numerical value.
10. number method of adjustment according to claim 9, which is characterized in that the bit wide and RC of the adjustment numerical value vibrate The work bit wide of device is equal, and the initial value of the adjustment numerical value is the median of numerical value under the bit wide, when the comparison result When being 1, the adjustment numerical value is reduced to the 1/2 of the median by the computing module;When the comparison result is 0, institute Computing module is stated to increase the adjustment numerical value for the average value of the maximum value of numerical value under the median and the bit wide.
CN201910751297.8A 2019-08-15 2019-08-15 The number adjustment device and its method of adjustment of RC oscillator Pending CN110492848A (en)

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Cited By (3)

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CN111654283A (en) * 2020-06-22 2020-09-11 上海华力微电子有限公司 Clock signal adjusting circuit and method and analog circuit
CN112636752A (en) * 2020-12-29 2021-04-09 北京奕斯伟计算技术有限公司 Oscillator device and oscillator frequency calibration method
CN116318120A (en) * 2023-03-30 2023-06-23 归芯科技(深圳)有限公司 Calibration circuit, calibration method, chip and electronic equipment of RC oscillation clock

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