CN107564929B - A kind of array substrate and preparation method thereof, display panel, display device - Google Patents
A kind of array substrate and preparation method thereof, display panel, display device Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 137
- 238000002360 preparation method Methods 0.000 title abstract 2
- 230000005540 biological transmission Effects 0.000 claims abstract description 168
- 239000004065 semiconductor Substances 0.000 claims abstract description 95
- 238000004519 manufacturing process Methods 0.000 claims abstract description 38
- 230000005533 two-dimensional electron gas Effects 0.000 claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 claims description 65
- 239000002184 metal Substances 0.000 claims description 65
- 239000013078 crystal Substances 0.000 claims description 18
- 238000001312 dry etching Methods 0.000 claims description 16
- 238000001704 evaporation Methods 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 16
- 238000003486 chemical etching Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 11
- 229910002704 AlGaN Inorganic materials 0.000 claims description 6
- 238000009413 insulation Methods 0.000 claims description 5
- 238000004020 luminiscence type Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 3
- 229910002601 GaN Inorganic materials 0.000 description 43
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 16
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 238000005566 electron beam evaporation Methods 0.000 description 8
- 238000001755 magnetron sputter deposition Methods 0.000 description 8
- 239000011159 matrix material Substances 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000000137 annealing Methods 0.000 description 4
- 239000011324 bead Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000004984 smart glass Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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Abstract
The application provides a kind of array substrate and preparation method thereof, display panel and display device, the wherein luminescence unit that there is the switching tube of Two-dimensional electron gas-bearing formation and LED to be formed for production in array substrate, apply voltage by the third electrode layer to switching tube, control the pinch off or opening of Two-dimensional electron gas-bearing formation, to the first electrode layer of control switch pipe and the disconnection or conducting of the second electrode lay, wherein, transparency conducting layer on the second electrode lay of switching tube and the p type semiconductor layer of LED is electrically connected, and the n type semiconductor layer of LED is connected with third transmission line, it is powered on third transmission line, control the potential of third electrode layer, and then the electric current on the p type semiconductor layer and n type semiconductor layer of control LED, and then control lighting or closing for LED, to achieve the purpose that show picture.Due to the high mobility of Two-dimensional electron gas-bearing formation, can switching tube be minimized, and then realize sharpness screen curtain of the LED as miniaturized electronics.
Description
Technical Field
The invention relates to the technical field of photoelectrons, in particular to an array substrate, a manufacturing method thereof, a display panel and a display device.
Background
In recent years, Organic Light Emitting Diodes (OLEDs) have been widely used as display devices because of their distinct advantages in self-luminescence, low power consumption, brightness, contrast, and viewing angle over Liquid Crystal Display (LCD) devices. Although Organic Light Emitting Diodes (OLEDs) are also self-light emitting devices, OLEDs still have significantly poor light emitting efficiency and lifetime compared to GaN-based Light Emitting Diodes (LEDs).
With the continuous development of electronic products, the pixels of the screen of the electronic product are higher and higher, the display luminous efficiency of the LCD or the OLED is lower, and the cruising ability of the electronic product is challenged, so that if the LED is applied to the screen of the electronic product, the luminous efficiency can be greatly improved, and electric energy is saved.
However, currently, LED display applications are generally used for indoor and outdoor advertisement display screens, a plurality of LED beads arranged in an array are arranged on a large screen, each LED bead is used as a pixel point, and the lighting state of each LED bead is controlled to control the whole large screen to display a picture. When LED is applied to indoor outer demonstration, the pixel all is discrete LED lamp pearl, and the point interval between lamp pearl and the lamp pearl is 0.8mm (P0.8 promptly) at present technique, more advanced level. The dot spacing of 0.8mm is basically not feasible when applied to the display screen of the electronic product with high resolution requirement.
Disclosure of Invention
In view of the above, the present invention provides an array substrate, a manufacturing method thereof, a display panel, and a display device, so as to solve the problem that in the prior art, an LED discrete device cannot be applied to a micro display screen with a high resolution requirement or cannot be applied to a display screen requiring integrated display. .
In order to achieve the purpose, the invention provides the following technical scheme:
an array substrate, comprising:
a substrate having an entire N-type semiconductor layer formed on one surface thereof, the substrate including a wiring region, a switching region and a display region;
the pixel unit comprises a substrate, a wiring area, a plurality of first transmission lines and a plurality of second transmission lines, wherein the substrate is positioned on the wiring area, and the first transmission lines and the second transmission lines are arranged in a crossed and insulated mode and define a plurality of pixel units;
the third transmission line is positioned on the substrate of the wiring area and is arranged in a cross insulation mode with the first transmission line;
the first transmission line and the second transmission line are both insulated from the N-type semiconductor layer, and the third transmission layer is in ohmic contact with the N-type semiconductor layer;
each pixel unit is divided into the switch area and the display area, the switch area is provided with a switch tube, and the display area is provided with a light-emitting unit;
on the substrate, and in a direction away from the substrate:
the light-emitting unit comprises a light-emitting layer, a P-type semiconductor layer, a transparent conducting layer and an insulating layer which are sequentially arranged;
the switch tube comprises the luminous layer, the P-type semiconductor layer, a first film layer, a second film layer, the insulating layer, a first electrode layer and a second electrode layer which are arranged on the same layer as the insulating layer and are arranged in parallel, the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, a third electrode layer is arranged on the same layer as the insulating layer or on the surface of the insulating layer, which is far away from the substrate, and the third electrode layer is in Schottky contact with or insulated from the second film layer;
the two-dimensional electronic gas layer is formed between the first film layer and the second film layer, the first electrode layer is electrically connected with the second transmission line, the second electrode layer is electrically connected with the transparent conducting layer of the light-emitting unit, the third electrode layer is electrically connected with the first transmission line, and the third electrode layer is used for controlling the first electrode layer and the second electrode layer to be switched on or off through the two-dimensional electronic gas layer so as to control the light-emitting unit to be switched on or switched off.
An array substrate manufacturing method is used for manufacturing and forming the array substrate, and comprises the following steps:
providing a substrate, wherein the substrate comprises a display area, a switch area and a wiring area;
the light emitting diode epitaxial structure comprises an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, a two-dimensional electron gas layer is formed between the first film layer and the second film layer, and the crystal lattice of the first film layer and the crystal lattice of the second film layer are matched with the crystal lattice of the light emitting diode epitaxial structure;
removing the second film layer, the first film layer, the P-type semiconductor layer and the light-emitting layer in the wiring area and the area between the display area and the switching area to expose the N-type semiconductor layer in the wiring area; removing the second film layer and the first film layer corresponding to the display area to expose the P-type semiconductor layer of the display area;
forming a transparent conductive layer on the exposed P-type semiconductor layer;
forming an insulating layer on all exposed structure surfaces;
forming a first electrode layer, a second electrode layer and a third electrode layer which are insulated from each other on the switch area, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from or in Schottky contact with the second film layer;
and forming a first transmission line, a second transmission line, a third transmission line and a connecting metal line in the wiring area, wherein the first transmission line and the second transmission line are arranged in a crossed and insulated mode and are located on the insulating layer, the first transmission line is electrically connected with the third electrode layer, the second transmission line is electrically connected with the first electrode layer, the third transmission line is arranged in a parallel and insulated mode with the first transmission line, the third transmission line penetrates through the insulating layer to be in ohmic contact with the N-type semiconductor layer, and the connecting metal line is connected with the second electrode layer and the transparent conducting layer.
The present invention also provides an array substrate, including:
the display device comprises a substrate, wherein one surface of the substrate sequentially comprises a first film layer and a second film layer along the direction departing from the substrate, a two-dimensional electronic gas layer is formed between the first film layer and the second film layer, and the substrate comprises a wiring area, a switch area and a display area;
the pixel unit comprises a substrate, a wiring area, a plurality of first transmission lines and a plurality of second transmission lines, wherein the substrate is positioned on the wiring area, and the first transmission lines and the second transmission lines are arranged in a crossed and insulated mode and define a plurality of pixel units;
the third transmission line is positioned on the substrate of the wiring area and is arranged in a cross insulation mode with the first transmission line;
an N-type semiconductor layer is further arranged on the substrate of the wiring area, the first transmission line and the second transmission line are both arranged in an insulated mode with the N-type semiconductor layer, and the third transmission layer is in ohmic contact with the N-type semiconductor layer;
each pixel unit comprises a switch area and a display area, the switch area is provided with a switch tube, and the display area is provided with a light-emitting unit;
on the substrate, and in a direction away from the substrate:
the light-emitting unit comprises the N-type semiconductor layer, the light-emitting layer, the P-type semiconductor layer, the transparent conducting layer and the insulating layer which are sequentially arranged;
the switch tube comprises an insulating layer, a first electrode layer and a second electrode layer, wherein the first electrode layer and the second electrode layer are arranged on the same layer as the insulating layer and are arranged in parallel, the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, a third electrode layer is arranged on the same layer as the insulating layer or is positioned on the surface, deviating from the substrate, of the insulating layer, and the third electrode layer is in Schottky contact with or insulated from the second film layer;
the first electrode layer is electrically connected with the second transmission line, the second electrode layer is electrically connected with the transparent conductive layer of the light-emitting unit, the third electrode layer is electrically connected with the first transmission line, and the third electrode layer is used for controlling the first electrode layer and the second electrode layer to be switched on or switched off through the two-dimensional electronic gas layer so as to control the light-emitting unit to be turned on or switched off.
Correspondingly, an array substrate manufacturing method is also provided, which is used for manufacturing and forming the array substrate, and the array substrate manufacturing method includes:
providing a substrate, wherein the substrate comprises a display area, a switch area and a wiring area;
sequentially epitaxially growing a first film layer, a second film layer and a light-emitting diode epitaxial structure on the substrate, wherein the light-emitting diode epitaxial structure at least comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer, a two-dimensional electronic gas layer is formed between the first film layer and the second film layer, and the crystal lattice of the first film layer and the crystal lattice of the second film layer are matched with the crystal lattice of the light-emitting diode epitaxial structure;
removing the P-type semiconductor layer and the light emitting layer of the wiring area to expose the N-type semiconductor layer of the wiring area; removing the P-type semiconductor layer, the light emitting layer and the N-type semiconductor layer of the switch area to expose the second film layer of the switch area;
forming a transparent conductive layer on the P-type semiconductor layer of the display region;
forming an insulating layer on all exposed structure surfaces;
forming a first electrode layer, a second electrode layer and a third electrode layer which are insulated from each other on the switch area, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from or in Schottky contact with the second film layer;
and forming a first transmission line, a second transmission line, a third transmission line and a connecting metal line in the wiring area, wherein the first transmission line and the second transmission line are arranged in a crossed and insulated mode and are located on the insulating layer, the first transmission line is electrically connected with the third electrode layer, the second transmission line is electrically connected with the first electrode layer, the third transmission line is arranged in a parallel and insulated mode with the first transmission line, the third transmission line penetrates through the insulating layer to be in ohmic contact with the N-type semiconductor layer, and the connecting metal line is connected with the second electrode layer and the transparent conducting layer.
The invention also provides a display panel which comprises the array substrate.
Meanwhile, a display device is provided, which includes the display panel.
According to the technical scheme, the array substrate provided by the invention comprises a substrate and a plurality of pixel units arranged on the substrate in an array manner, wherein each pixel unit comprises a switch area and a display area, the display area is of an LED epitaxial structure and used for realizing light emission, the switch area comprises a first film layer and a second film layer, the second film layer is provided with a first electrode layer, a second electrode layer and a third electrode layer, a transparent conducting layer is arranged on a P-type semiconductor of the LED epitaxial structure and electrically connected with the second electrode layer, and the third electrode layer is used for controlling the first electrode layer and the second electrode layer to be switched on or off through the two-dimensional electronic gas layer so as to control the light-emitting units to be switched on or switched off.
That is, the array substrate provided by the invention adopts the two-dimensional electronic gas layer to realize the conduction channel of the switch tube, one electrode layer is connected with the electrode of the light-emitting diode, the other electrode of the light-emitting diode is connected with the third transmission line, the switch tube is formed between the two electrodes of the light-emitting diode to form the active matrix array substrate, and the brightness control of a plurality of light-emitting areas is realized through active driving, so that the high-resolution integrated LED display screen is obtained.
The invention correspondingly provides a manufacturing method of the array substrate, which is used for manufacturing the array substrate.
Meanwhile, the invention also provides a display panel and a display device, wherein the display panel and the display device both adopt the array substrate, so that a miniaturized LED screen with high luminous efficiency and high resolution is obtained.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic top view of an array substrate according to an embodiment of the present invention;
FIG. 2A is a schematic cross-sectional view taken along line AA' of FIG. 1;
FIG. 2B is a schematic cross-sectional view taken along line BB' in FIG. 1;
FIG. 2C is a schematic cross-sectional view taken along line CC' of FIG. 1;
fig. 3 is a schematic view of a manufacturing process of an array substrate according to an embodiment of the present invention;
FIGS. 4A-4D are schematic cross-sectional views of the array substrate processing steps along line AA' of FIG. 1 according to one embodiment of the present invention;
FIG. 5A is a schematic cross-sectional view of another embodiment taken along line AA' of FIG. 1;
FIG. 5B is a schematic cross-sectional view of another embodiment taken along line BB' in FIG. 1;
FIG. 5C is a schematic cross-sectional view of another embodiment taken along line CC' of FIG. 1;
fig. 6 is a schematic view of another manufacturing process of an array substrate according to an embodiment of the invention;
FIGS. 7A-7D are schematic cross-sectional views of the array substrate processing steps along line AA' of FIG. 1 according to one embodiment of the present invention;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
As described in the background section, the light emitting efficiency of the OLED or LCD is not as high as that of the LED, which causes great challenges for the cruising ability of electronic products and applications requiring high brightness (for example, under daytime illumination, the existing LCD and OLED screens are difficult to clearly display, and the brightness of the backlight of the display screen must be enhanced). The LED is usually used as a discrete device for screen display, and is usually an indoor and outdoor large screen, and the illumination of the LED lamp beads is utilized to realize picture display. Because the difficulty of applying the LED to a small screen is high, the application of the LED in the field of display is limited.
Specifically, the inventor finds that when the LEDs are applied to a display screen, if the LEDs are used as pixels, passive driving is used, that is, signals need to be LED out from the positive electrode and the negative electrode of each LED, and only a single LED pixel can be controlled by the signal at the same time, so that the integrated structure cannot meet full color and has low resolution.
Based on the above, the invention provides an array substrate and a manufacturing method thereof, which are used for realizing that an LED replaces an LCD and an OLED to be used as a display screen, the defects of passive driving are avoided by adopting active driving, namely, an active driving matrix LED chip is directly manufactured on an LED epitaxial structure, and the brightness and the darkness of a single LED are realized through the switching function of a two-dimensional electron gas (HEMT).
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1 to 2C, the present invention provides an array substrate, including:
a substrate 101, wherein a whole layer of N-type semiconductor layer 102 is formed on one surface of the substrate 101, the substrate 101 includes a wiring region 1, a switching region 2 and a display region 3, please refer to the schematic top view structure shown in fig. 1.
A plurality of first transmission lines 11 and a plurality of second transmission lines 12 which are positioned on the substrate 101 of the wiring area 1 and are arranged in a crossed and insulated manner, wherein the plurality of first transmission lines 11 and the plurality of second transmission lines 12 define a plurality of pixel units; and a third transmission line 13 arranged on the substrate 101 of the wiring region 1 and crossing and insulated from the first transmission line 11.
The first transmission line 11 and the second transmission line 12 are both insulated from the N-type semiconductor layer 102, as shown in the wiring region 1 at the leftmost portion of fig. 2A; the third transfer layer 13 is in ohmic contact with the N-type semiconductor layer 102; referring to fig. 2C, which is a schematic cross-sectional view along CC' in fig. 1, the third transmission line 13 is directly connected to the N-type semiconductor layer 102 to form an ohmic contact, an insulating layer 110 is disposed between the first transmission line 11 and the N-type semiconductor layer 102, and an insulating layer 120 is disposed between the first transmission line 11 and the third transmission line 13 to form an insulating arrangement.
In the present embodiment, the first transmission line 11 and the second transmission line 12 are not limited to the stacked relationship in the up-down direction, and may be provided so as to be cross-insulated. Similarly, the upper and lower stacked relationship of the first transmission line 11 and the third transmission line is not limited, and fig. 2C is only an example, and the present invention is not limited.
Each pixel unit is divided into a switch area 2 and a display area 3, the switch area 2 is provided with a switch tube, and the display area is provided with a light-emitting unit; on the substrate 101, and in a direction away from the substrate 101: the light emitting unit includes a light emitting layer 103 and a P-type semiconductor layer 104, a transparent conductive layer 108, and an insulating layer 110, which are sequentially disposed.
The switching tube includes a light emitting layer 103, a P-type semiconductor layer 104, a first film layer 105, a second film layer 107, an insulating layer 110, a first electrode layer 21 and a second electrode layer 22 which are disposed in the same layer as the insulating layer 110 and are arranged in parallel, wherein both the first electrode layer 21 and the second electrode layer 22 are in ohmic contact with the second film layer 107, a third electrode layer 23 which is disposed in the same layer as the insulating layer 110 or on a surface of the insulating layer 110 away from the substrate, and the third electrode layer 23 is in schottky contact with or insulated from the second film layer 107, as shown in fig. 2A, the third electrode layer 23 is in schottky contact with the second film layer 107, and when the third electrode layer 23 is disposed in an insulated manner with the second film layer 107, the third electrode layer 23 is directly formed above the insulating layer 110.
A two-dimensional electron gas layer 106 is formed between the first film layer 105 and the second film layer 107, the first electrode layer 21 is electrically connected to the second transmission line 12, and the second electrode layer 22 is electrically connected to the transparent conductive layer 108 of the light emitting unit, as shown in fig. 2B, which is a schematic cross-sectional view along the line BB' in fig. 1, wherein the second electrode layer 22 is connected to the transparent conductive layer 108 through a connection metal layer 109.
The third electrode layer 23 is electrically connected to the first transmission line 11, and the third electrode layer 23 is used to control the first electrode layer 21 and the second electrode layer 22 to be turned on or off through the two-dimensional electron gas layer 106, so as to control the light-emitting unit to be turned on or turned off.
As can be seen from fig. 1, each pixel unit in the present invention includes an LED display area and a switch area, and the HEMT switch of the active matrix controls the LEDs in each pixel unit to emit light or turn off, so as to implement an LED array display image arranged in an array.
It should be noted that, in this embodiment, a specific structure of the light emitting diode is not limited, and the light emitting diode at least includes an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer, in other embodiments of the present invention, the LED may further include a superlattice structure, which is not limited in this embodiment, and a specific material of the LED is not limited in this embodiment, optionally, the light emitting diode in this embodiment is a GaN-based light emitting diode, where the N-type semiconductor layer is an N-type GaN layer, and the P-type semiconductor layer is a P-type GaN layer; those skilled in the art can also know that other light emitting diodes can also be applied to the HEMT structure as a switch without creative work, which is not described in detail in this embodiment.
For the GaN-based light emitting diode, the first film layer and the second film layer are epitaxially grown on the epitaxial structure of the LED, so that the first film layer and the second film layer are lattice-matched with the epitaxial structure layer of the LED, and the growth effect is good, in this embodiment, optionally, the first film layer 105 is a GaN layer, the second film layer 107 is an AlGaN layer, in other embodiments of the present invention, the first film layer 105 is an AlGaN layer, the second film layer 107 is a GaN layer, and this is not limited in this embodiment.
In this embodiment, the materials of each electrode layer and each transmission line are not limited, and in order to make the metal conductivity better and make the ohmic contact or schottky contact with the second film layer more perfect, in this embodiment, the materials of the first electrode layer 21 and the second electrode layer 22 are the same and are both of a Ti/Al/Ti/Au laminated structure; the third electrode layer 23 is made of a Pt/Au laminated structure; the first transmission line 11, the second transmission line 12 and the third transmission line 13 are made of the same material and are all of a Cr/Au laminated structure or a Ni/Au laminated structure.
An embodiment of the present invention further provides a manufacturing method of the array substrate, as shown in fig. 3, including:
s101: providing a substrate, wherein the substrate comprises a display area, a switch area and a wiring area;
s102: the light emitting diode epitaxial structure comprises an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, a two-dimensional electron gas layer is formed between the first film layer and the second film layer, and the crystal lattice of the first film layer and the crystal lattice of the second film layer are matched with the crystal lattice of the light emitting diode epitaxial structure;
s103: removing the second film layer, the first film layer, the P-type semiconductor layer and the light-emitting layer in the wiring area and the area between the display area and the switching area to expose the N-type semiconductor layer in the wiring area; removing the second film layer and the first film layer corresponding to the display area to expose the P-type semiconductor layer of the display area;
s104: forming a transparent conductive layer on the exposed P-type semiconductor layer;
s105: forming an insulating layer on all exposed structure surfaces;
s106: forming a first electrode layer, a second electrode layer and a third electrode layer which are insulated from each other on the switch area, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from or in Schottky contact with the second film layer;
s107: and forming a first transmission line, a second transmission line, a third transmission line and a connecting metal line in the wiring area, wherein the first transmission line and the second transmission line are arranged in a crossed and insulated mode and are located on the insulating layer, the first transmission line is electrically connected with the third electrode layer, the second transmission line is electrically connected with the first electrode layer, the third transmission line is arranged in a parallel and insulated mode with the first transmission line, the third transmission line penetrates through the insulating layer to be in ohmic contact with the N-type semiconductor layer, and the connecting metal line is connected with the second electrode layer and the transparent conducting layer.
Wherein, form first electrode layer, second electrode layer and third electrode layer mutually insulated on the switch area, first electrode layer, the second electrode layer all with second rete ohmic contact, the third electrode layer with second rete insulation or schottky contact specifically includes:
opening an opening on the insulating layer of the switch area by a chemical etching or dry etching mode, and manufacturing a first electrode layer area to be formed, a second electrode layer area to be formed and a third electrode layer area to be formed; evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer; and evaporating a second metal in the region of the third electrode layer to be formed to form a third electrode layer, wherein the third electrode layer is in Schottky contact with the second film layer.
Or opening an opening on the insulating layer of the switch region by chemical etching or dry etching, and manufacturing a region of a first electrode layer to be formed and a region of a second electrode layer to be formed; evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer; and evaporating a second metal on the insulating layer to form a third electrode layer, wherein the third electrode layer is insulated from the second film layer.
In the present embodiment, the material of each structure is not limited, and optionally, the following examples illustrate that the materials and parameters involved therein are only individual examples, and the manufacturing method of the present invention is not limited.
Specifically, as shown in fig. 4A-4D, fig. 4A-4D are schematic cross-sectional views along line AA' in fig. 1.
Referring to fig. 4A, an N-type gallium nitride layer 102 is grown on a substrate layer 101, a quantum well layer 103 is grown on the N-type gallium nitride layer 102, a P-type gallium nitride layer 104 is grown on the quantum well layer 103, a gallium nitride layer 105, i.e., a first film layer, is grown on the quantum well layer 104, an aluminum gallium nitride layer 107, i.e., a second film layer, is grown on the gallium nitride layer 105, and a two-dimensional electron gas layer 106 is formed between the gallium nitride layer 105 and the aluminum gallium nitride layer 107;
referring to fig. 4B, on the epitaxial wafer with the above structure, the switching region and the display region are protected, and the wiring region is dry-etched chemically by plasma to form an N-type GaN region reaching the N-type GaN layer 102; continuously etching off only the HEMT structure on the LED device region by a plasma chemical dry etching method to manufacture a P-type GaN region of the LED to the P-type GaN layer 104; see fig. 4C.
Referring to fig. 4D, a transparent conductive layer 108 is formed on the P-type GaN layer 104 by electron beam evaporation or magnetron sputtering, and the transparent conductive layer 108 includes, but is not limited to, ITO and NiAu structures. And then, forming ohmic contact between the transparent conductive layer 108 and the P-type gallium nitride 104 by an annealing mode.
On the whole structure, an insulating layer 110 is grown by a PECVD mode, and the insulating layer 110 is silicon dioxide or silicon nitride.
Referring to fig. 2A-2C, two regions, namely, a drain region and a source region, are etched on the insulating layer 110 by chemical etching or dry etching. And a drain metal layer (i.e., the first electrode layer 21 in this embodiment) and a source metal layer (i.e., the second electrode layer 22 in this embodiment) are simultaneously formed by electron beam evaporation or magnetron sputtering, the drain metal layer and the source metal layer are in a stacked structure of Ti/Al/Ti/Au, and ohmic contact is formed between the drain metal layer 21 and the source metal layer 22 and the aluminum gallium nitride layer 107 under a certain annealing condition.
On the insulating layer 110, a gate region is etched by chemical etching or dry etching.
And simultaneously manufacturing a gate metal layer 23 in an electron beam evaporation or magnetron sputtering mode, wherein the gate metal layer structure is a Pt/Au laminated metal layer, and the gate metal layer 23 and the aluminum gallium nitride layer 107 form Schottky contact.
A connection metal line 109 is formed to connect the source metal layer 22 and the transparent conductive layer 108. The connecting metal layer 109 is a metal stack structure of Cr/Au or Ni/Au.
And growing an insulating layer 120 on the whole surface, wherein the insulating layer is silicon dioxide or silicon nitride. As shown in fig. 2A and 2C, the drain transmission line 12, the gate transmission line 11, and the N-total transmission line 13 are separated from each other by etching.
As shown in fig. 2C, a specific N-common transmission line region is etched on the insulating layer 120 by a chemical etching or dry etching method, and the gate transmission line 12 and the N-common transmission line 13 are fabricated by an electron beam evaporation or magnetron sputtering method, wherein the gate transmission line 12 and the N-common transmission line 13 are Cr/Au or Ni/Au metal stacked structures.
The array substrate provided by the invention comprises a substrate and a plurality of pixel units arranged in an array manner on the substrate, wherein each pixel unit comprises a switch area and a display area, the display area is of an LED epitaxial structure and is used for realizing light emission, the switch area comprises a first film layer and a second film layer, a first electrode layer, a second electrode layer and a third electrode layer are arranged on the second film layer, a transparent conducting layer is arranged on a P-type semiconductor of the LED epitaxial structure and is electrically connected with the second electrode layer, and the third electrode layer is used for controlling the first electrode layer and the second electrode layer to be switched on or off through the two-dimensional electronic gas layer so as to control the light-emitting units to be switched on or switched off.
That is, the array substrate provided by the invention adopts the two-dimensional electronic gas layer to realize the conduction channel of the switch tube, one electrode layer is connected with the electrode of the light-emitting diode, the other electrode of the light-emitting diode is connected with the third transmission line, the switch tube is formed between the two electrodes of the light-emitting diode to form the active matrix array substrate, and the brightness control of a plurality of light-emitting areas is realized through active driving, so that the LED display screen with high resolution is obtained. The HEMT has higher electron mobility relative to each layer of the LED, thereby being very beneficial to the miniaturization of the device.
Referring to fig. 1, fig. 5A to fig. 5C, the present invention provides an array substrate, including:
the display device comprises a substrate 201, wherein one surface of the substrate 201 sequentially comprises a first film layer 202 and a second film layer 204 along a direction departing from the substrate, a two-dimensional electronic gas layer 203 is formed between the first film layer 202 and the second film layer 204, and the substrate 201 comprises a wiring area 1, a switch area 2 and a display area 3;
a plurality of first transmission lines 11 and a plurality of second transmission lines 12 which are positioned on the substrate 201 of the wiring area and are arranged in a crossed and insulated manner, wherein the plurality of first transmission lines 11 and the plurality of second transmission lines 12 define a plurality of pixel units; a third transmission line 13 disposed on the substrate 201 in the wiring region and crossing and insulated from the first transmission line 11; an N-type semiconductor layer 205 is further disposed on the substrate 201 of the wiring region, the first transmission line 11 and the second transmission line 12 are both insulated from the N-type semiconductor layer 205, as shown in the wiring region 1 at the leftmost portion of fig. 5A, the third transmission layer 13 is in ohmic contact with the N-type semiconductor layer 205; see fig. 5C.
Each pixel unit comprises a switch area 2 and a display area 3, the switch area 2 is provided with a switch tube, and the display area 3 is provided with a light-emitting unit; on the substrate 201, and in a direction away from the substrate 201: the light emitting unit includes an N-type semiconductor layer 205, a light emitting layer 206 and a P-type semiconductor layer 207, a transparent conductive layer 208 and an insulating layer 210, which are sequentially disposed; see display area 3 in fig. 5A and display area in the middle portion in fig. 5B.
With reference to fig. 5A, the switch tube includes an insulating layer 210, and a first electrode layer 21 and a second electrode layer 22 that are disposed on the same layer as the insulating layer 210 and are arranged in parallel, wherein the first electrode layer 21 and the second electrode layer 22 are in ohmic contact with the second film layer 204, a third electrode layer 23 that is disposed on the same layer as the insulating layer 210 or on a surface of the insulating layer away from the substrate, and the third electrode layer 23 is in schottky contact with or insulated from the second film layer 204;
in the embodiment, referring to fig. 5A, the second electrode layer 22 is electrically connected to the transparent conductive layer 208 of the light emitting unit through a connection metal layer 209, and the first electrode layer 21 is electrically connected to the second transmission line 12, and the second electrode layer 22 is electrically connected to the transparent conductive layer 208 of the light emitting unit.
The third electrode layer 23 is electrically connected to the first transmission line 11, and the third electrode layer 23 is used to control the first electrode layer 21 and the second electrode layer 22 to be turned on or off through the two-dimensional electron gas layer 203, so as to control the light-emitting unit to be turned on or off.
As can be seen from fig. 1, each pixel unit in the present invention includes an LED display area and a switch area, and the HEMT switch of the active matrix controls the LEDs in each pixel unit to emit light or turn off, so as to implement an LED array display image arranged in an array.
It should be noted that, in this embodiment, a specific structure of the light emitting diode is not limited, and the light emitting diode at least includes an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer, in other embodiments of the present invention, the LED may further include a superlattice structure, which is not limited in this embodiment, and a specific material of the LED is not limited in this embodiment, optionally, the light emitting diode in this embodiment is a GaN-based light emitting diode, where the N-type semiconductor layer is an N-type GaN layer, and the P-type semiconductor layer is a P-type GaN layer; those skilled in the art can also know that other light emitting diodes can also be applied to the HEMT structure as a switch without creative work, which is not described in detail in this embodiment.
For the GaN-based light emitting diode, the first film layer and the second film layer are epitaxially grown on the epitaxial structure of the LED, so that the first film layer and the second film layer are lattice-matched with the epitaxial structure layer of the LED, and the growth effect is good, in this embodiment, optionally, the first film layer 202 is a GaN layer, the second film layer 204 is an AlGaN layer, in other embodiments of the present invention, the first film layer 202 is an AlGaN layer, the second film layer 204 is a GaN layer, and this is not limited in this embodiment.
In this embodiment, the materials of each electrode layer and each transmission line are not limited, and in order to make the metal conductivity better and make the ohmic contact or schottky contact with the second film layer more perfect, in this embodiment, the materials of the first electrode layer 21 and the second electrode layer 22 are the same and are both of a Ti/Al/Ti/Au laminated structure; the third electrode layer 23 is made of a Pt/Au laminated structure; the first transmission line 11, the second transmission line 12 and the third transmission line 13 are made of the same material and are all of a Cr/Au laminated structure or a Ni/Au laminated structure.
An embodiment of the present invention further provides a manufacturing method of the array substrate, as shown in fig. 6, including:
s201: providing a substrate, wherein the substrate comprises a display area, a switch area and a wiring area;
s202: the light emitting diode epitaxial structure comprises an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, a two-dimensional electron gas layer is formed between the first film layer and the second film layer, and the crystal lattice of the first film layer and the crystal lattice of the second film layer are matched with the crystal lattice of the light emitting diode epitaxial structure;
s203: removing the second film layer, the first film layer, the P-type semiconductor layer and the light-emitting layer in the wiring area and the area between the display area and the switching area to expose the N-type semiconductor layer in the wiring area; removing the second film layer and the first film layer corresponding to the display area to expose the P-type semiconductor layer of the display area;
s204: forming a transparent conductive layer on the exposed P-type semiconductor layer;
s205: forming an insulating layer on all exposed structure surfaces;
s206: forming a first electrode layer, a second electrode layer and a third electrode layer which are insulated from each other on the switch area, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from or in Schottky contact with the second film layer;
s207: and forming a first transmission line, a second transmission line, a third transmission line and a connecting metal line in the wiring area, wherein the first transmission line and the second transmission line are arranged in a crossed and insulated mode and are located on the insulating layer, the first transmission line is electrically connected with the third electrode layer, the second transmission line is electrically connected with the first electrode layer, the third transmission line is arranged in a parallel and insulated mode with the first transmission line, the third transmission line penetrates through the insulating layer to be in ohmic contact with the N-type semiconductor layer, and the connecting metal line is connected with the second electrode layer and the transparent conducting layer.
Forming a first electrode layer, a second electrode layer and a third electrode layer which are insulated from each other on the switch area, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is in insulated or schottky contact with the second film layer, and the method specifically comprises the following steps:
opening an opening on the insulating layer of the switch area by a chemical etching or dry etching mode, and manufacturing a first electrode layer area to be formed, a second electrode layer area to be formed and a third electrode layer area to be formed; evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer; evaporating a second metal in the region of the third electrode layer to be formed to form a third electrode layer, wherein the third electrode layer is in Schottky contact with the second film layer;
or opening an opening on the insulating layer of the switch region by chemical etching or dry etching, and manufacturing a region of a first electrode layer to be formed and a region of a second electrode layer to be formed; evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer; and evaporating a second metal on the insulating layer to form a third electrode layer, wherein the third electrode layer is insulated from the second film layer.
In the present embodiment, the material of each structure is not limited, and optionally, the following examples illustrate that the materials and parameters involved therein are only individual examples, and the manufacturing method of the present invention is not limited.
Specifically, as shown in fig. 7A-7D, fig. 7A-7D are schematic cross-sectional views along line AA' in fig. 1.
Referring to fig. 7A, a gallium nitride layer 202, i.e., a first film layer, is grown on a substrate layer 201, an aluminum gallium nitride layer 204, i.e., a second film layer, is grown on the gallium nitride layer 202, and a two-dimensional electron gas layer 203 is formed between the gallium nitride layer 202 and the aluminum gallium nitride layer 204; and then an N-type gallium nitride layer 205 is grown on the second film layer 204, a quantum well layer 206 is grown on the N-type gallium nitride layer 205, and a P-type gallium nitride layer 207 is grown on the P-type gallium nitride layer 206.
Referring to fig. 7B, in the above structure, the area to be fabricated into the switch tube is etched to the algan layer 204 by using a plasma chemical dry etching method to protect the wiring region and the display region. Then, the LED device region and the TFT region are protected, and the other regions are dry-etched chemically by plasma to expose the N-type gan layer 205, and the specific structure is shown in fig. 7B.
As shown in fig. 7D, a transparent conductive layer 208 is formed on the P-type gallium nitride layer 207 by electron beam evaporation or magnetron sputtering, and the transparent conductive layer 208 includes, but is not limited to, ITO and NiAu structures. And then the transparent conducting layer 208 and the P-type gallium nitride layer 207 form ohmic contact in an annealing mode. With continued reference to fig. 7D, an insulating layer 210 is grown by PECVD on the entire structure, the insulating layer 210 being silicon dioxide or silicon nitride.
Referring to fig. 5A, two regions, namely, a drain region and a source region, are etched on the insulating layer 210 by chemical etching or dry etching. And simultaneously manufacturing a drain electrode metal layer, namely a first electrode layer 21 and a source electrode metal layer, namely a second electrode layer 22, by means of electron beam evaporation or magnetron sputtering, wherein the drain electrode metal layer 21 and the source electrode metal layer 22 are in a Ti/Al/Ti/Au metal laminated structure, and ohmic contact is formed between the drain electrode metal layer 21 and the source electrode metal layer 22 and the aluminum gallium nitride layer 204 under certain annealing conditions. On the insulating layer 210, a gate region is etched by chemical etching or dry etching. And simultaneously manufacturing a gate metal layer 23 by an electron beam evaporation or magnetron sputtering mode, wherein the structure of the gate metal layer 23 is a Pt/Au metal laminated structure, and the gate metal layer 23 and the aluminum gallium nitride layer 204 form Schottky contact. Alternatively, the gate metal layer 23 is formed directly on the insulating layer 210 so that the gate metal layer 23 is insulated from the aluminum gallium nitride layer 204.
As shown in fig. 1 and 5A, a connection metal layer 209 is formed to connect the source metal layer 22 and the transparent conductive layer 208. The connecting metal layer 209 has a Cr/Au or Ni/Au metal stack structure.
And growing an insulating layer 220 on the whole surface, wherein the insulating layer 220 is silicon dioxide or silicon nitride. As shown in fig. 5A and 5C, the drain transmission line 12, the gate transmission line 11, and the N-total transmission line 13 are separated from each other by etching.
As shown in fig. 5C, a specific N-common transmission line region is etched on the insulating layer 220 by a chemical etching or dry etching method, and the gate transmission line 12 and the N-common transmission line 13 are fabricated by an electron beam evaporation or magnetron sputtering method, wherein the gate transmission line 12 and the N-common transmission line 13 are Cr/Au or Ni/Au metal stacked structures.
The invention provides an array substrate which comprises a substrate and a plurality of pixel units arranged on the substrate in an array mode, wherein each pixel unit comprises a switch area and a display area, the display area is of an LED epitaxial structure and used for achieving light emitting, the switch area comprises a first film layer and a second film layer, a first electrode layer, a second electrode layer and a third electrode layer are arranged on the second film layer, a transparent conducting layer is arranged on a P-type semiconductor of the LED epitaxial structure and electrically connected with the second electrode layer, a potential is formed by applying voltage to the third electrode layer and used for controlling the first electrode layer and the second electrode layer to be connected or disconnected through a two-dimensional electronic gas layer, and therefore the light emitting units are controlled to be turned on or turned off.
That is, the array substrate provided by the invention adopts the two-dimensional electronic gas layer to realize the conduction channel of the switch tube, one electrode layer is connected with the electrode of the light-emitting diode, the other electrode of the light-emitting diode is connected with the third transmission line, the switch tube is formed between the two electrodes of the light-emitting diode to form the active matrix array substrate, and the brightness control of a plurality of light-emitting areas is realized through active driving, so that the LED display screen with high resolution is obtained. The HEMT has higher electron mobility relative to each layer of the LED, thereby being very beneficial to the miniaturization of the device.
Compared with the array substrate provided in the previous embodiment, in the array substrate provided in this embodiment, the two-dimensional electron gas layer is located below the LED epitaxial structure, and in terms of an epitaxial growth process, the two-dimensional electron gas layer is directly grown on the substrate, so that the lattice quality of the array substrate provided in this embodiment is better than that of the array substrate provided in the previous embodiment.
The embodiment of the invention also provides a display panel, which comprises an array substrate, wherein the array substrate is any one of the two embodiments.
Fig. 8 is a schematic top view of a display device provided in the present invention, where the display device 800 includes a display area 801 and a frame area 802, and optionally, a display panel of the display device is an LED display panel having the array substrate described in the above embodiments. In this embodiment, the specific form of the display device is not limited, and optionally, the display device is a smart phone, a smart watch, a tablet computer, or a display screen of other wearable electronic products, and the wearable electronic products may include, but are not limited to, smart bracelets and smart glasses.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (13)
1. An array substrate, comprising:
a substrate having an entire N-type semiconductor layer formed on one surface thereof, the substrate including a wiring region, a switching region and a display region;
the pixel unit comprises a substrate, a wiring area, a plurality of first transmission lines and a plurality of second transmission lines, wherein the substrate is positioned on the wiring area, and the first transmission lines and the second transmission lines are arranged in a crossed and insulated mode and define a plurality of pixel units;
the third transmission line is positioned on the substrate of the wiring area and is arranged in a cross insulation mode with the first transmission line;
the first transmission line and the second transmission line are both insulated from the N-type semiconductor layer, and the third transmission layer is in ohmic contact with the N-type semiconductor layer;
each pixel unit is divided into the switch area and the display area, the switch area is provided with a switch tube, and the display area is provided with a light-emitting unit;
on the substrate, and in a direction away from the substrate:
the light-emitting unit comprises a light-emitting layer, a P-type semiconductor layer, a transparent conducting layer and an insulating layer which are sequentially arranged;
the switch tube comprises the luminous layer, the P-type semiconductor layer, a first film layer, a second film layer, the insulating layer, a first electrode layer and a second electrode layer which are arranged on the same layer as the insulating layer and are arranged in parallel, the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, a third electrode layer is arranged on the same layer as the insulating layer or on the surface of the insulating layer, which is far away from the substrate, and the third electrode layer is in Schottky contact with or insulated from the second film layer;
the two-dimensional electronic gas layer is formed between the first film layer and the second film layer, the first electrode layer is electrically connected with the second transmission line, the second electrode layer is electrically connected with the transparent conducting layer of the light-emitting unit, the third electrode layer is electrically connected with the first transmission line, and the third electrode layer is used for controlling the first electrode layer and the second electrode layer to be switched on or off through the two-dimensional electronic gas layer so as to control the light-emitting unit to be switched on or switched off.
2. The array substrate of claim 1, wherein the N-type semiconductor layer is an N-type GaN layer and the P-type semiconductor layer is a P-type GaN layer; the first film layer is a GaN layer, and the second film layer is an AlGaN layer.
3. The array substrate of claim 1, wherein the first electrode layer and the second electrode layer are made of the same material and are both a laminated structure of Ti/Al/Ti/Au; the third electrode layer is made of a Pt/Au laminated structure; the first transmission line, the second transmission line and the third transmission line are made of the same material and are all of Cr/Au laminated structures or Ni/Au laminated structures.
4. An array substrate manufacturing method for manufacturing and forming the array substrate of any one of claims 1 to 3, the array substrate manufacturing method comprising:
providing a substrate, wherein the substrate comprises a display area, a switch area and a wiring area;
the light emitting diode epitaxial structure comprises an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, a two-dimensional electron gas layer is formed between the first film layer and the second film layer, and the crystal lattice of the first film layer and the crystal lattice of the second film layer are matched with the crystal lattice of the light emitting diode epitaxial structure;
removing the second film layer, the first film layer, the P-type semiconductor layer and the light-emitting layer in the wiring area and the area between the display area and the switching area to expose the N-type semiconductor layer in the wiring area; removing the second film layer and the first film layer corresponding to the display area to expose the P-type semiconductor layer of the display area;
forming a transparent conductive layer on the exposed P-type semiconductor layer;
forming an insulating layer on all exposed structure surfaces;
forming a first electrode layer, a second electrode layer and a third electrode layer which are insulated from each other on the switch area, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from or in Schottky contact with the second film layer;
and forming a first transmission line, a second transmission line, a third transmission line and a connecting metal line in the wiring area, wherein the first transmission line and the second transmission line are arranged in a crossed and insulated mode and are located on the insulating layer, the first transmission line is electrically connected with the third electrode layer, the second transmission line is electrically connected with the first electrode layer, the third transmission line is arranged in a parallel and insulated mode with the first transmission line, the third transmission line penetrates through the insulating layer to be in ohmic contact with the N-type semiconductor layer, and the connecting metal line is connected with the second electrode layer and the transparent conducting layer.
5. The method for manufacturing the array substrate according to claim 4, wherein a first electrode layer, a second electrode layer and a third electrode layer are formed on the switch region and insulated from each other, the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from the second film layer or in schottky contact with the second film layer, specifically comprising:
opening an opening on the insulating layer of the switch area by a chemical etching or dry etching mode, and manufacturing a first electrode layer area to be formed, a second electrode layer area to be formed and a third electrode layer area to be formed;
evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer;
evaporating a second metal in the region of the third electrode layer to be formed to form a third electrode layer, wherein the third electrode layer is in Schottky contact with the second film layer;
or,
opening an opening on the insulating layer of the switch area by a chemical etching or dry etching mode, and manufacturing a first electrode layer area to be formed and a second electrode layer area to be formed;
evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer;
and evaporating a second metal on the insulating layer to form a third electrode layer, wherein the third electrode layer is insulated from the second film layer.
6. An array substrate, comprising:
the display device comprises a substrate, wherein one surface of the substrate sequentially comprises a first film layer and a second film layer along the direction departing from the substrate, a two-dimensional electronic gas layer is formed between the first film layer and the second film layer, and the substrate comprises a wiring area, a switch area and a display area;
the pixel unit comprises a substrate, a wiring area, a plurality of first transmission lines and a plurality of second transmission lines, wherein the substrate is positioned on the wiring area, and the first transmission lines and the second transmission lines are arranged in a crossed and insulated mode and define a plurality of pixel units;
the third transmission line is positioned on the substrate of the wiring area and is arranged in a cross insulation mode with the first transmission line;
an N-type semiconductor layer is further arranged on the substrate of the wiring area, the first transmission line and the second transmission line are both arranged in an insulated mode with the N-type semiconductor layer, and the third transmission layer is in ohmic contact with the N-type semiconductor layer;
each pixel unit comprises a switch area and a display area, the switch area is provided with a switch tube, and the display area is provided with a light-emitting unit;
on the substrate, and in a direction away from the substrate:
the light-emitting unit comprises the N-type semiconductor layer, the light-emitting layer, the P-type semiconductor layer, the transparent conducting layer and the insulating layer which are sequentially arranged;
the switch tube comprises an insulating layer, a first electrode layer and a second electrode layer, wherein the first electrode layer and the second electrode layer are arranged on the same layer as the insulating layer and are arranged in parallel, the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, a third electrode layer is arranged on the same layer as the insulating layer or is positioned on the surface, deviating from the substrate, of the insulating layer, and the third electrode layer is in Schottky contact with or insulated from the second film layer;
the first electrode layer is electrically connected with the second transmission line, the second electrode layer is electrically connected with the transparent conductive layer of the light-emitting unit, the third electrode layer is electrically connected with the first transmission line, and the third electrode layer is used for controlling the first electrode layer and the second electrode layer to be switched on or switched off through the two-dimensional electronic gas layer so as to control the light-emitting unit to be turned on or switched off.
7. The array substrate of claim 6, wherein the N-type semiconductor layer is an N-type GaN layer and the P-type semiconductor layer is a P-type GaN layer; the first film layer is a GaN layer, and the second film layer is an AlGaN layer.
8. The array substrate of claim 6, wherein the first electrode layer and the second electrode layer are made of the same material and are both a Ti/Al/Ti/Au laminated structure; the third electrode layer is made of a Pt/Au laminated structure; the first transmission line, the second transmission line and the third transmission line are made of the same material and are all of Cr/Au laminated structures or Ni/Au laminated structures.
9. An array substrate manufacturing method for manufacturing and forming the array substrate of any one of claims 6 to 8, the array substrate manufacturing method comprising:
providing a substrate, wherein the substrate comprises a display area, a switch area and a wiring area;
sequentially epitaxially growing a first film layer, a second film layer and a light-emitting diode epitaxial structure on the substrate, wherein the light-emitting diode epitaxial structure at least comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer, a two-dimensional electronic gas layer is formed between the first film layer and the second film layer, and the crystal lattice of the first film layer and the crystal lattice of the second film layer are matched with the crystal lattice of the light-emitting diode epitaxial structure;
removing the P-type semiconductor layer and the light emitting layer of the wiring area to expose the N-type semiconductor layer of the wiring area; removing the P-type semiconductor layer, the light emitting layer and the N-type semiconductor layer of the switch area to expose the second film layer of the switch area;
forming a transparent conductive layer on the P-type semiconductor layer of the display region;
forming an insulating layer on all exposed structure surfaces;
forming a first electrode layer, a second electrode layer and a third electrode layer which are insulated from each other on the switch area, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from or in Schottky contact with the second film layer;
and forming a first transmission line, a second transmission line, a third transmission line and a connecting metal line in the wiring area, wherein the first transmission line and the second transmission line are arranged in a crossed and insulated mode and are located on the insulating layer, the first transmission line is electrically connected with the third electrode layer, the second transmission line is electrically connected with the first electrode layer, the third transmission line is arranged in a parallel and insulated mode with the first transmission line, the third transmission line penetrates through the insulating layer to be in ohmic contact with the N-type semiconductor layer, and the connecting metal line is connected with the second electrode layer and the transparent conducting layer.
10. The method for manufacturing the array substrate according to claim 9, wherein a first electrode layer, a second electrode layer and a third electrode layer are formed on the switch region, the first electrode layer, the second electrode layer and the third electrode layer are insulated from each other, the first electrode layer and the second electrode layer are in ohmic contact with the second film layer, and the third electrode layer is insulated from the second film layer or in schottky contact with the second film layer, specifically comprising:
opening an opening on the insulating layer of the switch area by a chemical etching or dry etching mode, and manufacturing a first electrode layer area to be formed, a second electrode layer area to be formed and a third electrode layer area to be formed;
evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer;
evaporating a second metal in the region of the third electrode layer to be formed to form a third electrode layer, wherein the third electrode layer is in Schottky contact with the second film layer;
or,
opening an opening on the insulating layer of the switch area by a chemical etching or dry etching mode, and manufacturing a first electrode layer area to be formed and a second electrode layer area to be formed;
evaporating a first metal in the region of the first electrode layer to be formed and the region of the second electrode layer to be formed, and respectively forming a first electrode layer and a second electrode layer which are insulated from each other, wherein the first electrode layer and the second electrode layer are in ohmic contact with the second film layer;
and evaporating a second metal on the insulating layer to form a third electrode layer, wherein the third electrode layer is insulated from the second film layer.
11. A display panel, comprising: the array substrate of any one of claims 1 to 3 or any one of claims 6 to 8.
12. A display device, comprising: the display panel of claim 11.
13. The display device according to claim 12, wherein the display device is a smart phone, a tablet computer, or a wearable electronic product display screen.
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| CN103227185A (en) * | 2013-04-12 | 2013-07-31 | 中国科学院合肥物质科学研究院 | Grid voltage-controlled two-dimensional electron gas quantum box for far infrared communication |
| CN105810707A (en) * | 2014-12-31 | 2016-07-27 | 黄智方 | Structure of high-electron-mobility light-emitting transistor |
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