CN107547673B - Network equipment and physical layer address allocation method - Google Patents
Network equipment and physical layer address allocation method Download PDFInfo
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- CN107547673B CN107547673B CN201710326240.4A CN201710326240A CN107547673B CN 107547673 B CN107547673 B CN 107547673B CN 201710326240 A CN201710326240 A CN 201710326240A CN 107547673 B CN107547673 B CN 107547673B
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Abstract
The embodiment of the invention provides a network device and a physical layer address allocation method, wherein the network device comprises a CPU, a CPLD and a plurality of expansion card slot positions; the CPLD monitors whether the expansion card is inserted into each expansion card slot position, and sets a first indicating bit corresponding to a first expansion card slot position in which the expansion card is inserted into a register of the CPLD as an identifier for indicating that the expansion card is inserted; the CPU determines the identification of the first expansion card slot position, determines a first PHY address corresponding to the identification of the first expansion card slot position according to the corresponding relation between the pre-stored identification of the expansion card slot position and the PHY address, and sets a second indication bit corresponding to the first expansion card slot position in a register of the CPLD as the first PHY address; the CPLD acquires a first PHY address from the register and distributes the first PHY address to a PHY chip included in an expansion card inserted into the first expansion card slot.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a network device and a method for allocating physical layer addresses.
Background
In order to improve flexibility of port density and port type configuration, network devices often provide an expansion card slot position externally, and the expansion card slot position provides an external port, so as to implement on-demand configuration of port types. As shown in fig. 1, the network device includes a motherboard 100 and an expansion card slot 200, a Switch chip 110 is disposed on the motherboard 100, an expansion card can be inserted into the expansion card slot 200, and the expansion card includes a PHY (Physical Lay) chip 210. Here, the expansion card including the PHY chip 210 may externally provide one or more ports; the Switch chip 110 manages the PHY chip 210 through a MIIM (Medium Independent Interface Management) Interface, and the Switch chip 110 communicates with the PHY chip 210 through a PHY address of the PHY chip 210.
Generally, one MIIM interface may be hooked up with a plurality of PHY chips, that is, a Switch chip is connected with a plurality of PHY chips. When the Switch chip communicates with the PHY chip, the Switch chip can communicate with the PHY chip only if the PHY address of the PHY chip is the same as the PHY address that the Switch chip desires to access, so as to avoid access conflict.
In the prior art, the PHY address of the PHY chip is fixed, and the PHY addresses of the PHY chips in the same type of expansion cards are the same. In this case, when the Switch chip is connected to a plurality of expansion cards of the same type, an access conflict will be caused because the PHY addresses of the PHY chips are the same.
Disclosure of Invention
An object of the embodiments of the present invention is to provide a method for allocating network devices and physical layer addresses, so as to avoid access conflicts when multiple expansion card slots are inserted with expansion cards of the same type, and the specific technical solution is as follows:
in one aspect, an embodiment of the present invention discloses a network Device, where the network Device includes a CPU, a CPLD (Complex Programmable Logic Device) and a plurality of expansion card slot positions;
the CPU is connected with the CPLD; the CPLD is connected with the expansion card slot;
the CPLD is used for monitoring whether the expansion card is inserted into each expansion card slot position; if a first expansion card slot position for inserting an expansion card is monitored, setting a first indication position corresponding to the first expansion card slot position in a register of the CPLD as an identifier for indicating that the expansion card is inserted;
the CPU is used for inquiring a first indicator bit in a register of the CPLD and determining the identifier of the first extended card slot position; determining a first PHY address corresponding to the identifier of the first extended card slot according to the corresponding relation between the identifier of the pre-stored extended card slot and the PHY address of the physical layer; setting a second indication bit corresponding to the first expansion card slot position in a register of the CPLD as the first PHY address;
the CPLD is further configured to obtain the first PHY address from a second indication bit in a register of the CPLD, and allocate the first PHY address to a PHY chip included in an expansion card inserted in the first expansion card slot.
On the other hand, the embodiment of the invention discloses a PHY address allocation method, which is applied to network equipment, wherein the network equipment comprises a CPU, a CPLD and a plurality of expansion card slot positions; the method comprises the following steps:
the CPLD monitors whether an expansion card is inserted into each expansion card inserting slot position or not;
if the CPLD monitors that a first expansion card slot position of an expansion card is inserted, setting a first indication position corresponding to the first expansion card slot position in a register of the CPLD as an identifier for indicating that the expansion card is inserted;
the CPU inquires a first indicator bit in a register of the CPLD and determines an identifier of the first extended card inserting slot position;
the CPU determines a first PHY address corresponding to the identifier of the first expansion card slot according to the corresponding relation between the identifier of the expansion card slot and the PHY address which is stored in advance;
the CPU sets a second indication bit corresponding to the first expansion card slot position in a register of the CPLD as the first PHY address;
the CPLD acquires the first PHY address from a second indicating bit in a register of the CPLD, and distributes the first PHY address to a PHY chip included in an expansion card inserted in the first expansion card slot.
The network device and the method for allocating physical layer addresses provided by the embodiments of the present invention are characterized in that a correspondence between an identifier of an extended card slot and a PHY address is pre-stored in the network device, when the CPLD monitors a first extended card slot into which an extended card is inserted, a first indication bit corresponding to the first extended card slot in a register of the CPLD is set as an identifier for indicating that the extended card is inserted, and then the CPU determines the identifier of the first extended card slot according to a value in the first indication bit, determines a first PHY address corresponding to the identifier of the first extended card slot, and then allocates the first PHY address to a PHY chip included in the extended card inserted into the first extended card slot by the CPLD. Therefore, in the embodiment of the invention, the PHY address of the PHY chip is set by the network equipment, so that the occupied PHY address can be avoided, and the access conflict is effectively avoided when the same type of expansion cards are inserted into a plurality of expansion card inserting slots. Of course, not all of the advantages described above need to be achieved at the same time in the practice of any one product or method of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a network device;
fig. 2 is a schematic structural diagram of a network device according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating a method for allocating PHY addresses according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to avoid access collision, the invention provides a network device and an allocation method based on the PHY address of the network device. The present invention will be described in detail below with reference to specific examples.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a network device according to an embodiment of the present invention, where the network device includes: the system comprises a mainboard 100 and a plurality of expansion card slot positions, wherein the expansion card slot positions are respectively marked as 201, 202 and 20n, and besides a Switch chip 110, the mainboard 100 is also provided with a CPU120 and a CPLD 130; the PHY chips 211, 212, 21n in fig. 2 may be understood as PHY chips included in expansion cards inserted into the expansion card slots 201, 202, 20 n.
The CPU120 is connected to the CPLD130, and the CPLD130 is connected to the plurality of expansion card slots 201, 202, and 20 n.
In one embodiment of the present invention, the CPU120 and the CPLD130 may be connected by a parallel bus, and the extended card slot 201, 202, 20n may be connected to the CPLD130 by a connector. Here, the connector may include a plurality of pins, with different pins being used to transmit different signals. For example, one pin is used for transmitting an on-bit signal, one pin is used for transmitting a PHY address, and the like, where the on-bit signal may be used for indicating whether an expansion card slot bit is inserted into an expansion card.
Here, the CPU120 and the CPLD130, and the CPLD130 and the expansion card slot 201, 202, and 20n may also adopt other connection manners, which is not limited in the embodiment of the present invention.
The process of allocating PHY addresses by a network device is described below by taking an expansion card including a PHY chip as an example.
Specifically, the CPLD130 is configured to monitor whether an expansion card is inserted into each expansion card slot 201, 202, 20 n; if a first extended card slot position into which an extended card is inserted is monitored (in this embodiment, the first extended card slot position is taken as an extended card slot position 201 for example to explain later), a first indication bit corresponding to the extended card slot position 201 in the register of the CPLD130 is set as an identifier for indicating that the extended card is inserted;
in an embodiment of the present invention, the CPLD130 may monitor whether an expansion card is inserted into each expansion card slot in real time, so as to ensure that the CPLD130 can find the expansion card slot into which the expansion card is inserted in time.
The CPU120 is configured to query a first indicator bit in a register of the CPLD130, and determine an identifier of the extended card slot 201; determining a first PHY address corresponding to the identifier of the extended card slot 201 according to the corresponding relation between the identifier of the pre-stored extended card slot and the PHY address; setting a second indication bit corresponding to the extended card slot position 201 in a register of the CPLD130 as a first PHY address;
the PHY address is a 5-bit address as specified by the ethernet standard protocol.
Here, the identification of the extended card slot may be a slot number of the extended card slot. Each extended card slot position has a slot position number, and one extended card slot position can be determined through one slot position number.
In order to avoid access conflict, in the embodiment of the present invention, in the correspondence relationship between the identifier of the pre-stored extended card slot and the PHY address, the identifier of one extended card slot corresponds to one PHY address, and the PHY addresses corresponding to the identifiers of each extended card slot are different.
The CPLD130 is further configured to obtain a first PHY address from a second indication bit in a register of the CPLD130, and allocate the first PHY address to a PHY chip 211 included in the expansion card inserted into the expansion card slot 201.
At this time, the PHY chip 211 can communicate with the Switch chip 110 through the allocated first PHY address.
In an embodiment of the present invention, the extended card slot 201, 202, 20n is connected to the CPLD130 and transmits an in-place signal, for example, when no extended card is inserted into the extended card slot 201, the in-place signal transmitted between the extended card slot 201 and the CPLD130 is a signal indicating that no extended card is inserted, such as "1"; when an expansion card is inserted into the expansion card slot 201, the in-place signal transmitted between the expansion card slot 201 and the CPLD130 is a signal indicating that the expansion card is inserted, such as "0".
In this case, the CPLD130 may determine whether an expansion card is inserted into the expansion card slot 201, 202, or 20n by monitoring the in-bit signal corresponding to the expansion card slot 201, 202, or 20 n.
Specifically, when the network device is started, the CPLD130 monitors whether the in-place signals corresponding to the expansion card slot positions 201, 202, and 20n are in-place signals indicating that an expansion card has been inserted, that is, monitors whether the in-place signals corresponding to the expansion card slot positions 201, 202, and 20n are "0"; if the in-place signal of '0' is monitored, determining that the expansion card is inserted into the expansion card slot position corresponding to the monitored in-place signal of '0';
after the network device is started, the CPLD130 monitors whether a bit signal corresponding to the expansion card slot 201, 202, 20n is converted from a bit signal indicating that an expansion card is not inserted into a bit signal indicating that an expansion card is inserted, that is, whether a bit signal converted from "1" into "0" is present in a bit signal corresponding to the expansion card slot 201, 202, 20 n; if the in-place signal which is subjected to the conversion is monitored, determining that the expansion card slot position corresponding to the in-place signal which is subjected to the conversion is the inserted expansion card.
It should be noted that the CPLD130 monitors the states of the in-place signals corresponding to the expansion card slot positions 201, 202, and 20n in real time, so as to ensure that the CPLD130 can find the expansion card slot position into which the expansion card is inserted in time.
For CPU120, in one embodiment of the invention, CPU120 may determine the identity of extended card slot 201 by way of an interrupt.
Specifically, after setting the first indication bit corresponding to the extended card slot 201 in the register of the CPLD130 as the identifier for indicating that the extended card is inserted, the CPLD130 may also be configured to send an interrupt signal to the CPU 120;
at this time, the CPU120 may be specifically configured to receive an interrupt signal; after receiving the interrupt signal, querying a first indicator bit of a register of the CPLD130, looking up a first indicator bit that is used to indicate that an expansion card is not inserted, is changed from an identifier used to indicate that an expansion card is not inserted to an identifier used to indicate that an expansion card is inserted, compared with the last time of querying the register of the CPLD130 (as can be seen from the step of setting the first indicator bit corresponding to the expansion card slot position 201 by the CPLD130, the found first indicator bit is the first indicator bit corresponding to the expansion card slot position 201), and determining an identifier of the expansion card slot position 201 corresponding to the found first indicator bit.
Here, in order to facilitate the CPU120 to determine the identifier of the extended card slot 201, a corresponding relationship between the identifier of the extended card slot and the first indication bit may be preset in the network device; thus, after finding the first indication bit meeting the above condition, the CPU120 may determine the identifier of the extended card slot 201 according to the correspondence between the identifier of the preset extended card slot and the first indication bit.
In another embodiment of the present invention, the CPU120 may determine the identification of the extended card slot 201 by polling.
Specifically, the CPU120 may be specifically configured to query the register of the CPLD130 at a preset time interval, search for a first indicator bit that is changed from an identifier indicating that an expansion card is not inserted to an identifier indicating that an expansion card is inserted, compared with the last query of the register of the CPLD130, and determine an identifier of the expansion card slot 201 corresponding to the searched first indicator bit.
In one embodiment of the present invention, to avoid access conflicts, CPLD130 may also be configured to:
resetting the extended card slot 201 before assigning the first PHY address to the PHY chip 211 included in the extended card inserted in the extended card slot 201;
after the first PHY address is assigned to the PHY chip 211 included in the expansion card inserted in the expansion card slot 201, the expansion card slot 201 is unset.
By applying the embodiment, the network device stores the corresponding relationship between the identifier of the expansion card slot and the PHY address in advance, when the CPLD monitors the first expansion card slot into which the expansion card is inserted, the first indication bit corresponding to the first expansion card slot in the register of the CPLD is set as the identifier for indicating that the expansion card has been inserted, and then the CPU determines the identifier of the first expansion card slot according to the first indication bit, determines the first PHY address corresponding to the identifier of the first expansion card slot, and then the CPLD allocates the first PHY address to the PHY chip included in the expansion card inserted into the first expansion card slot. Therefore, in the embodiment of the invention, the PHY address of the PHY chip is set by the network equipment, so that the occupied PHY address can be avoided, and the access conflict is effectively avoided when the same type of expansion cards are inserted into a plurality of expansion card inserting slots.
Based on the network device shown in fig. 2, an embodiment of the present invention provides a PHY address allocation method, and referring to fig. 3, the method is applied to a network device, where the network device includes: CPU, CPLD and a plurality of extension card slot position, the method includes:
s301: the CPLD monitors whether the expansion card is inserted into each expansion card slot position or not;
s302: if the CPLD monitors that a first expansion card slot position of an expansion card is inserted, setting a first indication position corresponding to the first expansion card slot position in a register of the CPLD as an identifier for indicating that the expansion card is inserted;
in an embodiment of the present invention, the extended card slot is connected to the CPLD and transmits an in-place signal, for example, when the extended card is not inserted into the extended card slot, the in-place signal transmitted between the extended card slot and the CPLD is a signal indicating that the extended card is not inserted, such as "1"; when the expansion card is inserted into the expansion card slot, the in-place signal transmitted between the expansion card slot and the CPLD is a signal indicating that the expansion card has been inserted, such as "0".
In this case, the CPLD may determine whether the expansion card is inserted into each expansion card slot by monitoring the in-place signal corresponding to each expansion card slot.
Specifically, when the network device is started, the CPLD monitors whether an in-place signal corresponding to each expansion card slot is an in-place signal indicating that an expansion card has been inserted, that is, monitors whether an in-place signal corresponding to each expansion card slot is "0"; if the monitored in-place signal is '0', determining that the expansion card slot position corresponding to the monitored in-place signal of '0' is a first expansion card slot position;
after the network equipment is started, the CPLD monitors whether an in-place signal corresponding to each expansion card slot position is converted from an in-place signal indicating that an expansion card is not inserted into an in-place signal indicating that the expansion card is inserted, namely, whether an in-place signal converted from '1' to '0' exists in the in-place signal corresponding to each expansion card slot position; if the in-place signal which is subjected to the conversion is monitored, the expansion card slot position corresponding to the in-place signal which is monitored is determined to be the first expansion card slot position.
S303: the CPU inquires a first indicator bit in a register of the CPLD and determines an identifier of a first extended card slot position;
here, the identification of the extended card slot may be a slot number of the extended card slot. Each extended card slot position has a slot position number, and one extended card slot position can be determined through one slot position number.
In one embodiment of the invention, the CPU may determine the identification of the extended card slot 201 by way of an interrupt.
Specifically, after setting a first indication bit corresponding to an expansion card slot position in a register of the CPLD as an identifier for indicating that an expansion card is inserted, the CPLD sends an interrupt signal to the CPU;
at this time, the CPU receives an interrupt signal; after receiving the interrupt signal, querying a first indicator bit of a register of the CPLD130, looking up a first indicator bit that is used to indicate that an expansion card is not inserted, is changed from an identifier used to indicate that an expansion card is not inserted to an identifier used to indicate that an expansion card is inserted, compared with the last time of querying the register of the CPLD (as can be seen from the step of setting the first indicator bit corresponding to the first expansion card slot by the CPLD, the found first indicator bit is the first indicator bit corresponding to the first expansion card slot), and determining an identifier of the first expansion card slot corresponding to the found first indicator bit.
Here, in order to facilitate the CPU to determine the identifier of the first extended card slot, a corresponding relationship between the identifier of the extended card slot and the first indicator bit may be preset in the network device; therefore, after the CPU finds the first indication position meeting the conditions, the identification of the first extended card slot position can be determined according to the preset corresponding relation between the identification of the extended card slot position and the first indication position.
In another embodiment of the invention, the CPU may determine the identity of the first extended card slot by polling.
Specifically, the CPU queries the register of the CPLD at a preset time interval, searches for a first indicator bit that changes from an identifier indicating that an expansion card is not inserted to an identifier indicating that an expansion card is inserted, compared with the register that queries the CPLD at the last time, and determines an identifier of a first expansion card slot position corresponding to the found first indicator bit.
S304: the CPU determines a first PHY address corresponding to the identifier of the first extended card slot according to the corresponding relation between the identifier of the pre-stored extended card slot and the PHY address;
s305: the CPU sets a second indication position corresponding to the first expansion card slot position in a register of the CPLD as a first PHY address;
the PHY address is a 5-bit address as specified by the ethernet standard protocol.
In order to avoid access conflict, in the embodiment of the present invention, in the correspondence relationship between the identifier of the pre-stored extended card slot and the PHY address, the identifier of one extended card slot corresponds to one PHY address, and the PHY addresses corresponding to the identifiers of each extended card slot are different.
S306: and the CPLD acquires a first PHY address from a second indicating bit in a register of the CPLD and allocates the first PHY address to a PHY chip included in the expansion card inserted into the first expansion card slot bit.
At this time, the PHY chip included in the expansion card can communicate with the Switch chip through the allocated first PHY address.
Here, the PHY address of the PHY chip included in the expansion card is set by the network device. Even if a plurality of expansion cards of the same type are hooked in the network equipment, PHY chips included in the expansion cards of the same type can flexibly obtain different PHY addresses through the network equipment, and the PHY chips included in the expansion cards use the PHY addresses set by the network equipment, so that access conflicts when the expansion cards of the same type are inserted into a plurality of expansion card inserting slots are effectively avoided.
In addition, it is worth mentioning that in the above embodiment, the network device allocates the PHY address to the PHY chip included in the expansion card only when the device is started or the bit signal is changed from indicating that the expansion card is not inserted to indicating that the expansion card is inserted, and once the PHY address is allocated, the PHY address does not change during the operation of the device, and the communication between the Switch chip and the PHY chip included in the expansion card can be automatically completed without additional intervention of software, thereby reducing software overhead.
In an embodiment of the present invention, to avoid an access conflict, before allocating the first PHY address to the PHY chip included in the expansion card inserted into the first expansion card slot, the CPLD may reset the first expansion card slot, so that the first expansion card slot cannot normally operate, that is, even if the expansion card is inserted into the first expansion card slot, the PHY chip included in the expansion card cannot normally operate and cannot communicate with the Switch chip;
after the CPLD allocates the first PHY address to the PHY chip included in the expansion card inserted into the first expansion card slot, that is, after the PHY address of the PHY chip included in the expansion card is configured, the CPLD releases the reset of the first expansion card slot, so that the first expansion card slot can operate normally, and the PHY chip included in the expansion card inserted into the first expansion card slot can communicate with the Switch chip.
It should be noted that the step of resetting the first extended card slot by the CPLD may be executed before or after the CPLD monitors that the extended card is inserted into the first extended card slot, but before the Switch accesses the PHY chip, it is to be ensured that the PHY address is already allocated, and the resetting of the first extended card slot is removed, so as to avoid access conflict or access failure.
It should be noted that the CPU and the CPLD may be connected by a parallel bus; the expansion card slot position and the CPLD can be connected through a connector.
By applying the embodiment, the network device stores the corresponding relationship between the identifier of the expansion card slot and the PHY address in advance, when the CPLD monitors the first expansion card slot into which the expansion card is inserted, the first indication bit corresponding to the first expansion card slot in the register of the CPLD is set as the identifier for indicating that the expansion card has been inserted, and then the CPU determines the identifier of the first expansion card slot according to the first indication bit, determines the first PHY address corresponding to the identifier of the first expansion card slot, and then the CPLD allocates the first PHY address to the PHY chip included in the expansion card inserted into the first expansion card slot. Therefore, in the embodiment of the invention, the PHY address of the PHY chip is set by the network equipment, so that the occupied PHY address can be avoided, and the access conflict is effectively avoided when the same type of expansion cards are inserted into a plurality of expansion card inserting slots.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.
Claims (10)
1. The network equipment is characterized by comprising a CPU, a Complex Programmable Logic Device (CPLD) and a plurality of extended card slot positions;
the CPU is connected with the CPLD; the CPLD is connected with the plurality of expansion card slots;
the CPLD is used for monitoring whether the expansion card is inserted into each expansion card slot position; if a first expansion card slot position for inserting an expansion card is monitored, setting a first indication position corresponding to the first expansion card slot position in a register of the CPLD as an identifier for indicating that the expansion card is inserted;
the CPU is used for inquiring a first indicator bit in a register of the CPLD and determining the identifier of the first extended card slot position; determining a first PHY address corresponding to the identifier of the first extended card slot according to the corresponding relation between the identifier of the pre-stored extended card slot and the PHY address of the physical layer; setting a second indication bit corresponding to the first expansion card slot position in a register of the CPLD as the first PHY address;
the CPLD is further configured to obtain the first PHY address from a second indication bit in a register of the CPLD, and allocate the first PHY address to a PHY chip included in an expansion card inserted in the first expansion card slot.
2. The network device of claim 1,
the CPLD is used for sending an interrupt signal to the CPU after setting a first indication bit corresponding to the first expansion card slot bit in a register of the CPLD as an identifier for indicating that an expansion card is inserted;
the CPU is specifically configured to, after receiving the interrupt signal, query a first indicator bit of a register of the CPLD, search for a first indicator bit that changes an identifier used for indicating that an expansion card is not inserted into the register of the CPLD from an identifier used for indicating that an expansion card is inserted into the register of the CPLD, and determine an identifier of a first expansion card insertion slot position corresponding to the searched first indicator bit, as compared with the last query of the register of the CPLD.
3. The network device of claim 1,
the CPU is specifically configured to query the register of the CPLD at a preset time interval, search for a first indicator bit that changes from an identifier indicating that an expansion card is not inserted to an identifier indicating that an expansion card is inserted to the register of the CPLD at the last time, and determine an identifier of a first expansion card slot position corresponding to the first indicator bit that is searched.
4. The network device of any of claims 1-3, wherein the CPLD is further configured to:
resetting the first extended card slot position before assigning the first PHY address to a PHY chip included in an extended card inserted in the first extended card slot position;
and after the first PHY address is allocated to a PHY chip included in the expansion card inserted into the first expansion card slot, the first expansion card slot is not reset.
5. The network device according to any of claims 1-3, wherein said CPU and said CPLD are connected by a parallel bus;
the expansion card slot position is connected with the CPLD through a connector.
6. A method for distributing physical layer PHY address is characterized in that the method is applied to network equipment, wherein the network equipment comprises a CPU, a complex programmable logic device CPLD and a plurality of expansion card slot positions; the method comprises the following steps:
the CPLD monitors whether an expansion card is inserted into each expansion card inserting slot position or not;
if the CPLD monitors that a first expansion card slot position of an expansion card is inserted, setting a first indication position corresponding to the first expansion card slot position in a register of the CPLD as an identifier for indicating that the expansion card is inserted;
the CPU inquires a first indicator bit in a register of the CPLD and determines an identifier of the first extended card inserting slot position;
the CPU determines a first PHY address corresponding to the identifier of the first expansion card slot according to the corresponding relation between the identifier of the expansion card slot and the PHY address which is stored in advance;
the CPU sets a second indication bit corresponding to the first expansion card slot position in a register of the CPLD as the first PHY address;
the CPLD acquires the first PHY address from a second indicating bit in a register of the CPLD, and distributes the first PHY address to a PHY chip included in an expansion card inserted in the first expansion card slot.
7. The method of claim 6, wherein after the step of the CPLD setting a first indication bit in a register of the CPLD corresponding to the first expansion card slot bit to indicate an identification that an expansion card has been inserted, the method further comprises:
sending an interrupt signal to the CPU;
the step of the CPU inquiring a first indicator bit in a register of the CPLD and determining the identification of the first extended card-inserting slot position comprises the following steps:
after receiving the interrupt signal, the CPU inquires a first indication bit of a register of the CPLD, searches for a first indication bit which is changed from an identifier for indicating that an expansion card is not inserted into the register of the CPLD to an identifier for indicating that the expansion card is inserted into the register of the CPLD at the last time, and determines an identifier of a first expansion card inserting slot position corresponding to the searched first indication bit.
8. The method of claim 6, further comprising:
the step of the CPU inquiring a first indicator bit in a register of the CPLD and determining the identification of the first extended card-inserting slot position comprises the following steps:
and the CPU inquires the register of the CPLD according to a preset time interval, searches for a first indication bit which is changed from the identifier for indicating that the expansion card is not inserted into the register of the CPLD to the identifier for indicating that the expansion card is inserted into the register of the CPLD at the last time, and determines the identifier of the first expansion card inserting slot position corresponding to the searched first indication bit.
9. The method of any of claims 6-8, wherein prior to the step of the CPLD assigning the first PHY address to a PHY chip included in an expansion card inserted in the first expansion card slot, the method further comprises;
resetting the first expansion card slot position by the CPLD;
after the step of the CPLD assigning the first PHY address to a PHY chip included in an expansion card inserted in the first expansion card slot, the method further includes;
and the CPLD releases the reset of the first expansion card slot position.
10. The method according to any of claims 6-8, wherein said CPU and said CPLD are connected by a parallel bus;
the expansion card slot position is connected with the CPLD through a connector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| CN111131088B (en) * | 2019-12-19 | 2022-03-11 | 北京东土军悦科技有限公司 | Card insertion type interface board and card insertion type equipment |
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