CN107526585A - FPGA development platforms and its debugging, method of testing based on Scala - Google Patents
FPGA development platforms and its debugging, method of testing based on Scala Download PDFInfo
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- CN107526585A CN107526585A CN201611214869.1A CN201611214869A CN107526585A CN 107526585 A CN107526585 A CN 107526585A CN 201611214869 A CN201611214869 A CN 201611214869A CN 107526585 A CN107526585 A CN 107526585A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/30—Creation or generation of source code
- G06F8/37—Compiler construction; Parser generation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3624—Software debugging by performing operations on the source code, e.g. via a compiler
Abstract
The invention discloses a kind of FPGA development platforms based on Scala, and comprising debugging acid, the debugging acid includes main frame debugging routine, sheet sand covered server and FPGA hardware controller；The FPGA hardware controller is used for after real FPGA circuitry is mounted to, and exports the state and register data of FPGA programs at corresponding breakpoint according to control signal；The main frame debugging routine is used to produce corresponding control signal according to commissioning content, and is shown according to the state and register data of the FPGA programs of return；The sheet sand covered server is used for after real FPGA circuitry is mounted to, the control signal that main frame debugging routine is sent is sent to FPGA hardware controller, the state of FPGA programs that FPGA hardware controller exports and register data are sent to main frame debugging routine.The present invention realizes the interactive debugging function that official's FPGA instruments can not be accomplished.
Description
Technical field
The present invention relates to FPGA hardware circuit design, debugging and checking field.Specifically, relate generally to as based on scene
The quick exploitation of hardware circuit design offer of programmable gate array (Field Programmable Gate Array, FPGA),
Debugging and verification method, so as to improve the efficiency of hardware program design whole flow process, and the correctness of result of design, it can safeguard
Property and scalability.
Background technology
With field programmable gate array (FPGA) application, compared to it is traditional draw circuit diagram, etched circuit board mode, firmly
Part engineer can design faster, and energy consumption is lower, the less optimization circuit for specific function of space hold.In engineering
The every field such as habit, high frequency transaction, big data processing are more and more urgent to hardware-accelerated demand, and high-end CPU performance carries
The today for being unsatisfactory for Moore's Law is risen, improves the hardware circuit design for FPGA, the efficiency of debugging and test checking becomes
Obtain particularly important.
However, it is used for the super of FPGA circuitry design what is provided using officials of main flow FPGA manufacturers such as Xilinx and Altera
When high-speed integrated circuit hardware description language (VHDL) or Verilog language are designed, there is the following serious system of three aspects
The about production efficiency of hardware design teacher：
● first, the FPGA hardware circuit design flow of these mainstream vendors is compared with modern software development process, they
Lack good instrument and carry out real time workshop and code prompting.
● secondly, they are difficult to as software development interactively carry out emulation and interactive debugging.
● last, the application programming interfaces (API) that they can be provided are fairly limited, even if in order to emulate debugging, to establish
Simple network connection, it is also desirable to a large amount of codings, lack modular thought in software development, lack the reusable in design
Property.
The content of the invention
The goal of the invention of the present invention is to provide a kind of FPGA development platforms based on Scala, by using the platform
Each instrument completes FPGA hardware circuit design flow, can improve the efficiency of hardware program design whole flow process, and design
Correctness, maintainability and the scalability of achievement.Meanwhile each instrument that the present invention includes can be used alone, and be integrated into
Among other FPGA development process.
The goal of the invention of the present invention is achieved through the following technical solutions：
A kind of FPGA development platforms based on Scala, comprising debugging acid, the debugging acid includes main frame debugging journey
Sequence, sheet sand covered server and FPGA hardware controller；
The FPGA hardware controller is used for after real FPGA circuitry is mounted to, and is broken according to control signal accordingly
The state and register data of FPGA programs are exported at point；
The main frame debugging routine is used to produce corresponding control signal, and the FPGA according to return according to commissioning content
The state and register data of program are shown；
The sheet sand covered server is used for after real FPGA circuitry is mounted to, the control that main frame debugging routine is sent
Signal processed is sent to FPGA hardware controller, state and the register data hair for the FPGA programs that FPGA hardware controller is exported
Give main frame debugging routine.
Further, a kind of described FPGA development platforms based on Scala also include FPGA simulators, the FPGA simulations
Device is used to simulate FPGA circuitry, and runs FPGA programs on simulation FPGA circuitry.
Further, a kind of described FPGA development platforms based on Scala also include testing tool, and the testing tool is used
Exported according to test case analog input signal to the FPGA programs run on FPGA simulators, and obtain the operation of FPGA programs
Data.
Present invention also offers a kind of adjustment method of the FPGA development platforms based on Scala, comprising hardware debugging step,
It is specific as follows：
S1.1：FPGA hardware controller, sheet sand covered server are mounted on real FPGA circuitry, real
Debugged FPGA programs are run on FPGA circuitry；
S1.2：Main frame debugging routine sends control signal according to commissioning content and gives sheet sand covered server, sheet sand covered clothes
Control signal is transmitted to FPGA hardware controller by business device again；
S1.3：After FPGA hardware controller receives control signal, according to control signal by the FPGA journeys at corresponding breakpoint
The state and register data of sequence are sent to sheet sand covered server, sheet sand covered server again by the state of FPGA programs with
And register data is transmitted to main frame debugging routine；
S1.4：Main frame debugging routine is after the state of FPGA programs and register data is received by the shape of FPGA programs
State and register data are shown to developer.
Further, described adjustment method also includes software debugging step, specific as follows：
S2.1：Start FPGA simulators, dry run FPGA programs；
S2.2：Main frame debugging routine sends control signal according to commissioning content and gives FPGA simulators；
S2.3：The state that the FPGA programs of breakpoint are finally returned by FPGA simulators is shown to main frame debugging routine
Show.
Present invention also offers a kind of method of testing of the FPGA development platforms based on Scala, step are as follows：
S3.1：Start FPGA simulators, dry run FPGA programs；
S3.2：Testing tool according to test case, simulation input electric signal to the FPGA programs run on FPGA simulators,
And obtain the data of FPGA programs operation.
Compared with prior art, the development flow of FPGA hardware circuit program is intactly incorporated into software by the present invention
In the workflow of exploitation, using the characteristic (general type, object-oriented, functional expression etc.) of modern high-level software programming language, improve
FPGA hardware circuit program develops the efficiency with debugging, reduces the door that software engineer participates in the exploitation of FPGA hardware circuit program
Sill.
Brief description of the drawings
Fig. 1 is the composition schematic diagram of the FPGA development platforms of the invention based on Scala；
Fig. 2 is the structural representation of debugging acid in the present invention；
Fig. 3 is adder code sample figure in embodiment.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.
As shown in figure 1, the present embodiment is realized on JVM (Java Virtual Machine) and Scala language basis
FPGA development platforms based on Scala, the platform include following main tool：1) module class libraries, 2) FPGA circuitry design work
Tool, 3) FPGA simulators, 4) testing tool and 5) debugging acid.The exploitation of whole FPGA circuitry is needed successively by design rank
Section, test phase and adjusting stage.
The function of each instrument is elaborated below.
(1) module class libraries
Design phase applied to FPGA circuitry, there is provided the module class libraries that can be multiplexed in development process, such as multiplier,
Sort algorithm, TCP protocol stack etc..Module class libraries uses module class libraries by Scala programming realizations in FPGA circuitry development process,
The extension of specific procedure function can easily be carried out to module class libraries by way of Similar integral or increase generic attribute,
It need not in full replicate as Verilog and modify again.One FPGA hardware design is defined as one in VeriScala
Individual succession HDL class, this class can include several hardware modules, a hardware module can include again several it is synchronous or
Person's asynchronous module.Except hardware module, HDL classes can also include the source life Scala methods and phase for being used for control routine generation
The third party library (such as math library) answered
(2) FPGA circuitry design tool
Design phase applied to FPGA circuitry, there is provided compared to the more adjunction of Verilog, VHDL official FPGA development process
The interface of nearly software development, improves exploitation level of abstraction and development efficiency.FPGA circuitry design tool passes through Scala programming languages
Realize, realize the compiler function that Scala language is changed into Verilog language, while provide abundant development interface.
(3) FPGA simulators：
Operate on JVM, the test phase applied to FPGA circuitry.Directly FPGA can be run on FPGA simulators
Program is tested, and can also carry out FPGA program debuggings by breakpoint.FPGA simulators are realized by Scala programming languages,
It is capable of the input of analog electrical signal simultaneously, realizes simulation test.
(4) testing tool：
Applied to the test phase of FPGA circuitry, FPGA simulators are coordinated to provide compared to Verilog and VHDL officials
FPGA tests, debugging flow are more abundant, are more nearly the test interface and debugging interface of software development.
Test interface mainly includes asserting (assert) and simulation (mock).
Assert that (assert) may operate in simulator test and real hardware test, be that data are verified in test case
Whether expected interface is met.The primary test frame based on Scala is realized on simulator.By this hair in real hardware
The logic realization of bright sheet sand covered server.
Simulation (mock) is operated in simulator test, for virtual FPGA circuit input signal, by the present invention
Simulator program realizes interface.
Debugging interface is used to carry out the FPGA circuitry of design feature, correctness test according to test case.
(5) debugging acid
The debugging stage applied to FPGA circuitry.The operation program directly on FPGA hardware, obtains shape on hardware circuit
State carries out the debugging of similar software breakpoint.
As shown in Fig. 2 debugging acid includes main frame debugging routine, sheet sand covered server and FPGA hardware controller.
FPGA hardware controller is mounted to on-chip system (i.e. real FPGA electricity as the slave module of AVALON-MM agreements
Road) after, the state and register data of FPGA programs are exported at corresponding breakpoint according to control signal；
The main frame debugging routine is used to produce corresponding control signal, and the FPGA according to return according to commissioning content
The state and register data of program are shown；
The sheet sand covered server is used for after FPGA circuitry is mounted to, the control signal that main frame debugging routine is sent
FPGA hardware controller is sent to, the state of FPGA programs that FPGA hardware controller exports and register data are sent to master
Machine debugging routine.
FPGA circuitry development process using the FPGA development platforms based on Scala is as follows：
First, the design phase
The function for the FPGA circuitry that developer develops as needed uses corresponding module class libraries, passes through Similar integral and increase class
The mode of attribute completes the design of FPGA circuitry.
Because module class libraries uses Scala language, so Scala is parsed by FPGA circuitry design tool,
It is then converted into the FPGA files (Verilog/VHDL) of official.Such as：The program of one section of 128 road network sequence, it is flat by this
The row design code of the development scheme of platform about 30, being converted into FPGA officials design document (Verilog/VHDL) probably has 600 rows,
It is equivalent in true FPGA operational effects.
2nd, test phase
In test phase, this platform carries out FPGA circuitry test, including code coverage, recurrence in a manner of software test
Test etc..FPGA hardware circuit program is run on FPGA simulators, developer writes test logic, generates test case, makes
Inputted with testing tool simulation arbitrary signal, obtain the status information at FPGA simulators each time point, the circuit of design is entered
Row feature, correctness test.According to test result, developer can go the program of FPGA circuitry to make further modification.
As shown in figure 3, by taking FPGA adder Modules Adder as an example, one defined in AdderTestBench.scala
Cycle is the clock of two standard time units, and the trailing edge for then setting each clk signal of data of input is reset,
In AdderTest.scala, we introduce third party's module FunSuite and provide test support, then initialization test parameter,
Tested according to the test point of definition.
3rd, the stage is debugged
In the debugging stage, mainly realized, comprised the steps of using debugging acid：
S1.1：FPGA hardware controller, sheet sand covered server are mounted on real FPGA circuitry, real
Debugged FPGA programs are run on FPGA circuitry.
S1.2：Main frame debugging routine sends control signal according to commissioning content and gives sheet sand covered server, sheet sand covered clothes
Control signal is transmitted to FPGA hardware controller by business device again.
S1.3：After FPGA hardware controller receives control signal, according to control signal by the FPGA journeys at corresponding breakpoint
The state and register data of sequence are sent to sheet sand covered server, sheet sand covered server again by the state of FPGA programs with
And register data is transmitted to main frame debugging routine.
S1.4：Main frame debugging routine is after the state of FPGA programs and register data is received by the shape of FPGA programs
State and register data are shown to developer.
By repeating S1.2 to S1.4, the debugging of whole FPGA circuitry is completed, according to debugging result developer couple
FPGA circuitry further adjusts.
Reuse before debugging acid debugged, can select by FPGA simulators to find on FPGA circuitry software view
The problem of, then the problem of can be found that by above step on FPGA circuitry hardware view, be specially：
S2.1：FPGA simulators run FPGA programs；
S2.2：Control signal is sent according to commissioning content by main frame debugging routine again and gives FPGA simulators；
S2.3：The state that the FPGA programs of breakpoint are finally returned by FPGA simulators is shown to main frame debugging routine
Show.
It is understood that for those of ordinary skills, can be with technique according to the invention scheme and its hair
Bright design is subject to equivalent substitution or change, and all these changes or replacement should all belong to the guarantor of appended claims of the invention
Protect scope.
Claims (6)
1. a kind of FPGA development platforms based on Scala, include debugging acid, it is characterised in that the debugging acid includes main frame
Debugging routine, sheet sand covered server and FPGA hardware controller；
The FPGA hardware controller is used for after real FPGA circuitry is mounted to, according to control signal at corresponding breakpoint
Export the state and register data of FPGA programs；
The main frame debugging routine is used to produce corresponding control signal, and the FPGA programs according to return according to commissioning content
State and register data shown；
The sheet sand covered server is used for after real FPGA circuitry is mounted to, and the control that main frame debugging routine is sent is believed
Number FPGA hardware controller is sent to, the state of FPGA programs that FPGA hardware controller exports and register data are sent to
Main frame debugging routine.
2. a kind of FPGA development platforms based on Scala according to claim 1, it is characterised in that also simulated comprising FPGA
Device, the FPGA simulators are used to simulate FPGA circuitry, and run FPGA programs on simulation FPGA circuitry.
3. a kind of FPGA development platforms based on Scala according to claim 2, it is characterised in that also comprising test work
Tool, the testing tool are used to be exported to the FPGA programs run on FPGA simulators according to test case analog input signal,
And obtain the data of FPGA programs operation.
4. according to a kind of adjustment method of any described FPGA development platforms based on Scala of claim 1-3, hardware is included
Debugging step, it is specific as follows：
S1.1：FPGA hardware controller, sheet sand covered server are mounted on real FPGA circuitry, in real FPGA electricity
Debugged FPGA programs are run on road；
S1.2：Main frame debugging routine sends control signal according to commissioning content and gives sheet sand covered server, sheet sand covered server
Control signal is transmitted to FPGA hardware controller again；
S1.3：After FPGA hardware controller receives control signal, according to control signal by the FPGA programs at corresponding breakpoint
State and register data are sent to sheet sand covered server, and sheet sand covered server by the state of FPGA programs and is posted again
Latch data is transmitted to main frame debugging routine；
S1.4：Main frame debugging routine after the state of FPGA programs and register data is received by the state of FPGA programs with
And register data is shown to developer.
5. a kind of adjustment method of FPGA development platforms based on Scala according to claim 4, walked comprising software debugging
Suddenly, it is specific as follows：
S2.1：Start FPGA simulators, dry run FPGA programs；
S2.2：Main frame debugging routine sends control signal according to commissioning content and gives FPGA simulators；
S2.3：The state that the FPGA programs of breakpoint are finally returned by FPGA simulators is shown to main frame debugging routine.
6. a kind of method of testing of FPGA development platforms based on Scala according to claim 3, step are as follows：
S3.1：Start FPGA simulators, dry run FPGA programs；
S3.2：Testing tool obtains according to test case, simulation input electric signal to the FPGA programs run on FPGA simulators
The data for taking FPGA programs to run.
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| CN110515849A (en) * | 2019-08-29 | 2019-11-29 | 上海燧原智能科技有限公司 | A kind of breakpoint debugging method, device, system, equipment and storage medium |
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| CN102006200A (en) * | 2010-11-09 | 2011-04-06 | 华为技术有限公司 | Debugging processing method, debugging processing system and single board |
| CN105259831A (en) * | 2015-10-26 | 2016-01-20 | 中国人民解放军军械工程学院 | Universal FPGA debugging device |
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| CN110515849A (en) * | 2019-08-29 | 2019-11-29 | 上海燧原智能科技有限公司 | A kind of breakpoint debugging method, device, system, equipment and storage medium |
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