CN114282464A - Collaborative simulation method in chip simulation verification and application - Google Patents

Collaborative simulation method in chip simulation verification and application Download PDF

Info

Publication number
CN114282464A
CN114282464A CN202111618993.5A CN202111618993A CN114282464A CN 114282464 A CN114282464 A CN 114282464A CN 202111618993 A CN202111618993 A CN 202111618993A CN 114282464 A CN114282464 A CN 114282464A
Authority
CN
China
Prior art keywords
simulation
project
information
functional module
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111618993.5A
Other languages
Chinese (zh)
Inventor
张格毅
袁力
胡扬央
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mouxin Technology Shanghai Co ltd
Original Assignee
Mouxin Technology Shanghai Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mouxin Technology Shanghai Co ltd filed Critical Mouxin Technology Shanghai Co ltd
Priority to CN202111618993.5A priority Critical patent/CN114282464A/en
Publication of CN114282464A publication Critical patent/CN114282464A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

The invention discloses a collaborative simulation method in chip simulation verification and application, and relates to the technical field of chip development. The method comprises the following steps: constructing a collaborative simulation project database; acquiring current simulation project information, comparing a functional module code to be verified contained in the current simulation project and a test excitation signal applied to each functional module with the information of the existing simulation project in the collaborative simulation project database, and generating a change list document; selecting reusable information from simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals. The invention reuses the simulation resources of the same part in different simulation projects according to the characteristics of the test codes and the applied test excitation in the simulation projects, thereby obviously improving the simulation efficiency.

Description

Collaborative simulation method in chip simulation verification and application
Technical Field
The invention relates to the technical field of chip development, in particular to a collaborative simulation method and application in chip simulation verification.
Background
The design process of a chip (IC) is generally divided into two parts, including a front-end design (also referred to as logic design) stage and a back-end design (also referred to as physical design) stage. In the front-end design stage, a chip design company designs a chip system architecture and divides module functions according to chip requirements proposed by customers, and then describes the module functions with codes by using a hardware description language (such as Verilog and the like), namely describes the actual hardware circuit functions through an HDL (hardware description language) language to form RTL (register transfer level) codes; then, the RTL is subjected to simulation verification to verify the correctness of the designed code (functional simulation, also called pre-simulation), and currently, whether the RTL code can operate correctly is mainly determined by applying an excitation (i.e. simulating an external input signal) to the completed RTL to obtain an operation result (whether the RTL code meets an expected value or a preset value). Then, logic synthesis (adding information such as constraint and unit delay) is performed, and the netlist after logic synthesis is simulated (also called post-simulation). The simulators used by the front simulation and the rear simulation are the same, and the added test excitation is also the same, but the different points are that the files required by the simulation are not completely the same, the functions are different, the waveforms are different, and the like.
Design and simulation verification are repeated and iterated processes until the verification result shows that the specification standard is completely met. Simulation verification is one of the most time consuming parts of chip design. With the continuous development of the process technology and the application field, the complexity of the chip is continuously improved, correspondingly, the complexity of the simulation verification work is also continuously improved, the time consumed by the simulation verification work becomes the bottleneck of the chip development cycle, how to systematically perform the simulation verification work to avoid the repeated invalid verification work becomes an important research direction for optimizing the chip verification work and shortening the chip development cycle.
In actual chip design work, for different simulation projects, different test stimuli may need to be applied to a same RTL code to perform simulation under different test scenarios. It is found that most of the contents of many test stimuli are the same for test stimuli constructed under different test scenarios, and only individual or partial parameters of the test stimuli need to be modified to adapt to different test scenarios. However, in the current simulation verification process, simulation projects are often independent of each other, test cases (cases) of different simulation projects are also independent of each other, there are no collaboration and shared resources between simulation projects, and when a verifier simulates different simulation projects, the whole verification platform often needs to be recompiled due to the change of test stimulus. Considering that the change of the test excitation of different test cases may be very small, for example, the test excitation of some different simulation cases only changes one or two excitation signals, in this case, the RTL code to be compiled in the simulation is not changed, and most of the excitation signals are also completely the same.
In summary, if the characteristics of the test code and the test stimulus in the simulation verification work are fully utilized, reducing or avoiding the repeated work in the simulation flow to improve the existing simulation efficiency is one of the technical problems that needs to be solved at present.
Disclosure of Invention
The invention aims to: the defects of the prior art are overcome, and the collaborative simulation method and the application in the chip simulation verification are provided. The collaborative simulation method provided by the invention reuses the simulation resources of the same part in different simulation projects according to the characteristics of the test codes in the simulation projects and the test excitation applied to the test codes, and the simulation efficiency is obviously improved through the simulation resource multiplexing.
In order to achieve the above object, the present invention provides the following technical solutions:
a collaborative simulation method in chip simulation verification comprises the following steps:
constructing a collaborative simulation project database, wherein the collaborative simulation project database comprises simulation verification information of one or more existing simulation projects;
acquiring current simulation project information, comparing a functional module code to be verified contained in the current simulation project and a test excitation signal applied to each functional module with the information of the current simulation project, and generating a change list document; the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document;
selecting reusable information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
Further, the functional module is a DUT to be designed.
Further, the existing simulation projects in the collaborative simulation project database comprise the historical simulation projects which are verified in the computer terminal where the current simulation project is located, and the historical simulation projects which are verified and the ongoing simulation projects in other computer terminals.
Further, the simulation verification information of the existing simulation project includes functional module code information included in the simulation project, a test excitation signal applied to each functional module, a code compilation file of each functional module, and a simulation result file after the test excitation is applied to each functional module code.
Further, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project comprises simulation result information of all the function modules at different time, the simulation result file is divided into different simulation result modules according to the function modules included in the existing simulation project, the function modules are arranged corresponding to the simulation result modules, and the simulation result modules are simulation results of the corresponding function modules in different time periods of the simulation verification process;
and when the reusable information is selected, configuring the reusable function module and the reusable time period information of the function module, and acquiring the simulation result module of the function module in the reusable time period according to the configured reusable time period for multiplexing.
Further, when the simulation result file with the same function module code and the corresponding test excitation signal is multiplexed, a simulation result multiplexing mode is configured according to the change information of the function module code and the corresponding test excitation signal along with time, wherein the simulation result multiplexing mode comprises a time multiplexing mode and a space multiplexing mode; for the current simulation project containing a plurality of functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, so that a hybrid multiplexing mode is formed.
Further, comparing the code and the test excitation signal of any functional module in the current simulation project with the existing simulation project;
when the code of the functional module before a certain time point T and the test excitation signal before T are not changed relative to the existing simulation project are judged, a time multiplexing mode is configured for the functional module, and a simulation result module of the corresponding functional module before T in the existing simulation project is multiplexed; and when the functional module is judged to be unchanged relative to the existing simulation project code and the applied test excitation signal is also not changed, configuring a spatial multiplexing mode for the functional module, and multiplexing the simulation result module of the corresponding functional module in the existing simulation project in the whole simulation verification process.
Further, the method also comprises the following steps: after the reusable information is selected, the current simulation project is subjected to collaborative simulation verification based on the reusable information, the steps are as follows,
compiling: compiling the functional module code file, newly compiling the changed code file and the simulation testbench file, and multiplexing the code compiling file of the existing simulation project for the code file which is not changed;
simulation: and after the file compiling is finished, a simulation step is carried out, new simulation is carried out on the functional module with the new compiled file and changed codes, the simulation result module of the existing project is multiplexed on the functional module with the unchanged codes and unchanged applied test excitation signals, and new simulation is carried out on the functional module with the changed test excitation signal sending or signal interaction with the functional module of the new simulation.
The invention also provides a collaborative simulation device in chip simulation verification, which comprises the following structures:
the change list generation module is used for acquiring the current simulation project information, comparing the functional module codes to be verified contained in the current simulation project and the test excitation signals applied to the functional modules with the information of the existing simulation projects in the collaborative simulation project database, and then generating a change list document; the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document; the collaborative simulation project database comprises simulation verification information of one or more existing simulation projects;
the reuse information processing module is used for selecting the reuse information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
The invention also provides a collaborative simulation system in chip simulation verification, which comprises:
the system comprises a collaborative simulation platform, a simulation system and a simulation system, wherein the collaborative simulation platform is used for constructing a collaborative simulation project database which comprises simulation verification information of one or more existing simulation projects;
the simulation verification user terminal is in communication connection with the collaborative simulation platform and is used for acquiring current simulation project information on the user terminal, comparing functional module codes to be verified contained in the current simulation project and test excitation signals applied to the functional modules with the information of the existing simulation project, and then generating a change list document; the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document; selecting reusable information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects as examples: the collaborative simulation method provided by the invention reuses the simulation resources of the same part in different simulation projects according to the characteristics of the test codes in the simulation projects and the test excitation applied to the test codes, and the simulation efficiency is obviously improved through the simulation resource multiplexing. The multiplexing may include spatial multiplexing, temporal multiplexing, and hybrid multiplexing, and the multiplexed information may be from previous simulation projects of the computer or other computer ongoing and previous simulation projects. Furthermore, the simulation result file is divided in time and space to form different simulation result modules, and the divided simulation result modules are independently extracted and reused.
Drawings
Fig. 1 is a flowchart of a co-simulation method in chip simulation verification according to an embodiment of the present invention.
Fig. 2 shows a time multiplexing mode according to an embodiment of the present invention.
Fig. 3 shows a spatial multiplexing mode according to an embodiment of the present invention.
Fig. 4 shows a hybrid multiplexing mode according to an embodiment of the present invention.
Fig. 5 is an information processing diagram for performing collaborative simulation verification by using reusable information according to an embodiment of the present invention.
Detailed Description
The following describes the co-simulation method and application in the chip simulation verification disclosed in the present invention in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that technical features or combinations of technical features described in the following embodiments should not be considered as being isolated, and they may be combined with each other to achieve better technical effects. In the drawings of the embodiments described below, the same reference numerals appearing in the respective drawings denote the same features or components, and may be applied to different embodiments. Thus, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.
It should be noted that the structures, proportions, sizes, and other dimensions shown in the drawings and described in the specification are only for the purpose of understanding and reading the present disclosure, and are not intended to limit the scope of the invention, which is defined by the claims, and any modifications of the structures, changes in the proportions and adjustments of the sizes and other dimensions, should be construed as falling within the scope of the invention unless the function and objectives of the invention are affected. The scope of the preferred embodiments of the present invention includes additional implementations in which functions may be executed out of order from that described or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present invention.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate. In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
Examples
Referring to fig. 1, a co-simulation method in chip simulation verification provided by the present invention includes the following steps.
S100, constructing a collaborative simulation project database, wherein the collaborative simulation project database comprises simulation verification information of one or more existing simulation projects.
In this embodiment, the existing simulation items in the collaborative simulation item database include the historical simulation items that have been verified in the computer terminal where the current simulation item is located, and the historical simulation items that have been verified and the ongoing simulation items in other computer terminals. Therefore, simulation projects of the same computer at different times or simulation projects on different computers can be linked through the collaborative simulation project database, so that collaboration and resource sharing can be performed among different simulation projects. Specifically, the collaborative simulation project database may be set based on a collaborative simulation platform, and each computer terminal in a network is used as a user terminal to be in communication with the collaborative simulation platform, and can access the collaborative simulation platform and obtain simulation project information in the collaborative simulation project database.
One simulation item corresponds to one simulation, and one simulation item may include simulation verification of a plurality of function modules (or function blocks). In this embodiment, the function module is a dut (design Under test) to be designed. For example, the DUT to be tested is an RTL model (or called RTL module) written by using an RTL (register transistor logic) code. RTL code is called because it describes the hardware circuitry in the resistance transactions Logic (register transfer level Logic) using the Verilog language, which needs to be compiled before simulation to convert to a language that can be recognized by a computer.
In simulation verification, a code platform (including all required components in verification work) for performing verification work is provided by a TB (namely, a testbench, an exciter), and verification codes are included in the TB to be mainly used for building a verification environment. And applying a stimulus signal through the verification environment to drive a DUT (such as the RTL model) to work, and collecting and comparing signals output by the DUT.
It should be noted that, the DUT to be designed may be other types of models corresponding to simulation verification in different stages, such as a pre-simulation stage, a post-simulation stage, a static simulation stage, and the like, and the gate-level netlist may also be used as the DUT to be designed in the present invention.
The simulation verification information of the existing simulation project may specifically include function module code information included in the simulation project, a test excitation signal applied to each function module, a code compilation file of each function module, and a simulation result file after the test excitation is applied to each function module code.
S200, acquiring current simulation project information, comparing the functional module codes to be verified and the test excitation signals applied to the functional modules contained in the current simulation project with the information of the current simulation project, and generating a change list document. And the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document.
The change list document is used for multiplexing analysis, namely, analysis of which time periods and which functional modules can be multiplexed. Taking the RTL module as an example, the change list document includes whether the RTL code of the current simulation item is modified and whether the test stimulus signal is modified.
In specific implementation, statistics can be performed by reading configuration information of each RTL module, and a list of documents in which files are changed is obtained by combining modification date information of test files in DV (Design Verification) as the change list document. The test file is a component in the TB and records specific information about the DUT to be tested at the time of simulation verification, which DUT to test at which time, and what test stimulus to apply to the DUT to be tested. The manifest document may be shared by all computers in a network. When multiplexing analysis is carried out, the corresponding simulation result information can be multiplexed on the part which is not modified by comparing the date of file modification.
S300, selecting reusable information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
Considering that, in the existing simulation result file, the simulation result file of the simulation project includes all the simulation result information of all the function modules related to the simulation at different times, the compiled file and the existing simulation result file need to be split, and after the splitting is performed according to the function modules, the simulation result information of any module at any time node can be subsequently extracted and packaged according to actual needs to be provided to other simulation projects for multiplexing.
Specifically, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all the function modules at different times, the simulation result file is divided into different simulation result modules according to the function modules included in the existing simulation project, the function modules are arranged corresponding to the simulation result modules, and the simulation result modules are simulation results of the corresponding function modules in different time periods of the simulation verification process.
And when the reusable information is selected, configuring the reusable function module and the reusable time period information of the function module, and acquiring the simulation result module of the function module in the reusable time period according to the configured reusable time period for multiplexing.
In this embodiment, when multiplexing the simulation result file in which the function module code and the corresponding test excitation signal are the same, the simulation result multiplexing mode may be configured according to the change information of the function module code and the corresponding test excitation signal over time, where the simulation result multiplexing mode includes a time multiplexing mode and a spatial multiplexing mode. For the current simulation project containing a plurality of functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, so that a hybrid multiplexing mode is formed.
Specifically, for any functional module in the current simulation project, the code and the test excitation signal of the functional module are compared with the existing simulation project. When the code of the functional module before a certain time point T and the test excitation signal before T are not changed relative to the existing simulation project are judged, a time multiplexing mode is configured for the functional module, and a simulation result module before T of the corresponding functional module in the existing simulation project is multiplexed. And when the functional module is judged to be unchanged relative to the existing simulation project code and the applied test excitation signal is also not changed, configuring a spatial multiplexing mode for the functional module, and multiplexing the simulation result module of the corresponding functional module in the existing simulation project in the whole simulation verification process.
Aiming at a plurality of functional modules in the current simulation project, comparing codes and test excitation signals of the functional modules with the existing simulation project, configuring a spatial multiplexing mode for the functional modules of which the codes are unchanged and the applied excitation is also unchanged, and configuring a time multiplexing mode for the functional modules of which the codes before a certain time point T are unchanged and the test excitation signals before T are also unchanged, thereby forming a time and space mixed multiplexing mode.
The simulation result multiplexing mode is described in detail below with reference to fig. 2 to 4 by taking an RTL module as an example.
Referring to fig. 2, a time multiplexing of simulation results is shown. For the same RTL module in the current simulation project and the existing simulation project, the RTL code of the RTL module before the time T is not changed, and the test excitation signal applied before the time T is also the same, so that the simulation result module (shown by a hatched part) of the RTL module before the time T of the existing simulation project can be directly reused.
Referring to fig. 3, a spatial multiplexing of simulation results is shown. For the same RTL module 2 (module 2 in fig. 3) in the current simulation project and the existing simulation project, the code and the test stimulus signal of the RTL module 2 in the whole simulation verification period are the same as those of the existing simulation project, so that the RTL module 2 of the current simulation project does not need to perform simulation, and can always reuse the corresponding simulation result module in the existing simulation project.
See fig. 4 for a mixed multiplexing of simulation results. In conjunction with fig. 2 and 3, for a plurality of RTL modules in a simulation project, that is, RTL module 1 (module 1 in fig. 4), only the simulation results before time T can be multiplexed, and RTL module 2 (module 2 in fig. 4) can be multiplexed all the time. Hybrid multiplexing is probably the most common way of multiplexing, which can be extended to more modules.
In this embodiment, after the step S300, the method further includes the steps of: after the reusable information is selected in step S300, collaborative simulation verification is performed on the current simulation project based on the reusable information. The method specifically comprises a compiling step and a simulating step.
Compiling: compiling the functional module code file, newly compiling the changed code file and the simulation testbench file, and multiplexing the code compiling file of the existing simulation project for the code file which is not changed.
Simulation: and after the file compiling is finished, a simulation step is carried out, new simulation is carried out on the functional module with the new compiled file and changed codes, the simulation result module of the existing project is multiplexed on the functional module with the unchanged codes and unchanged applied test excitation signals, and new simulation is carried out on the functional module with the changed test excitation signal sending or signal interaction with the functional module of the new simulation.
Referring to fig. 5, a complete simulation verification process of a current simulation project is illustrated, where a blank area in fig. 5 is an un-reusable part and a scribed area is a reusable part. Before time T0, a compiling stage is provided, the unmodified RTL code in the stage does not need to be compiled, the code compiling file of the existing simulation project can be directly reused, and only the modified RTL code and the simulation testbench need to be compiled. And entering a simulation phase after compiling is finished. In the simulation stage, newly-compiled RTLs need to be subjected to new simulation, newly-simulated modules with applied test excitation signals changed need to be subjected to new simulation, functional modules with newly-simulated functional modules subjected to signal interaction need to be subjected to new simulation, and other functional modules can directly multiplex simulation result modules corresponding to the existing simulation projects. Taking FIG. 5 as an example, such as between times T0 and T1, the applied test stimulus signal is unchanged, and the simulation results of the existing project may be directly reused, except that the newly compiled RTL needs to be re-simulated. After the time T1, part of the RTL modules may need to be newly simulated due to the change of the test stimulus signal — for example, the test stimulus signal input to a certain RTL module after the time T1 is different from the test stimulus signal recorded in the simulation result module of the existing simulation project, so that the subsequent behavior of the RTL module changes, and the RTL module needs to be re-simulated; or, the newly simulated RTL module has signal interaction with other RTL modules, and needs to be re-simulated — for example, a signal input to a certain RTL module after T1 is changed, the subsequent behavior of the RTL module is also changed, and the existing simulation result module cannot be reused, and needs to be re-simulated. Because the RTL modules in the simulation project are not isolated, signal interaction can occur between the RTL modules in the simulation process.
According to the technical scheme provided by the invention, different projects are connected together in a cross-space and cross-time mode through a collaborative simulation method, so that simulation results of simulation projects performed on the same computer at different times or simulation projects performed on different computers at the same time can be mutually multiplexed, the same file is not required to be repeatedly compiled, the simulation processes corresponding to the same RTL code and the same excitation are not required to be repeatedly simulated, repeated compiling and simulation files are avoided, and the simulation efficiency can be obviously improved.
The invention further provides a collaborative simulation device in the chip simulation verification.
The device comprises a change list generating module and a multiplexing information processing module.
And the change list generation module is used for acquiring the current simulation project information, comparing the functional module codes to be verified and the test excitation signals applied to the functional modules in the current simulation project with the information of the existing simulation project in the collaborative simulation project database, and then generating a change list document. And the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document. The collaborative simulation project database comprises simulation verification information of one or more existing simulation projects.
The reuse information processing module is used for selecting the reuse information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
In this embodiment, for any existing simulation project in the collaborative simulation project database, the simulation result file of the existing simulation project includes simulation result information of all the function modules at different times, the simulation result file is divided into different simulation result modules according to the function modules included in the existing simulation project, the function modules are set corresponding to the simulation result modules, and the simulation result modules are simulation results of the corresponding function modules at different time periods in the simulation verification process.
At this time, the multiplex information processing module is configured to: and when the reusable information is selected, configuring the reusable function module and the reusable time period information of the function module, and acquiring the simulation result module of the function module in the reusable time period according to the configured reusable time period for multiplexing.
In this embodiment, when multiplexing the simulation result file in which the function module code and the corresponding test excitation signal are the same, the simulation result multiplexing mode may be configured according to change information of the function module code and the corresponding test excitation signal with time, where the simulation result multiplexing mode includes a time multiplexing mode and a spatial multiplexing mode. For the current simulation project containing a plurality of functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, so that a hybrid multiplexing mode is formed.
In specific implementation, the code and the test excitation signal of any functional module in the current simulation project can be compared with the existing simulation project; when the code of the functional module before a certain time point T and the test excitation signal before T are not changed relative to the existing simulation project are judged, a time multiplexing mode is configured for the functional module, and a simulation result module of the corresponding functional module before T in the existing simulation project is multiplexed; and when the functional module is judged to be unchanged relative to the existing simulation project code and the applied test excitation signal is also not changed, configuring a spatial multiplexing mode for the functional module, and multiplexing the simulation result module of the corresponding functional module in the existing simulation project in the whole simulation verification process.
Other technical features are referred to in the previous embodiments and are not described herein.
The invention also provides a collaborative simulation system in the chip simulation verification, which comprises the following structure.
The collaborative simulation system comprises a collaborative simulation platform and a collaborative simulation project database, wherein the collaborative simulation project database comprises simulation verification information of one or more existing simulation projects.
The simulation verification user terminal is in communication connection with the collaborative simulation platform and is used for acquiring current simulation project information on the user terminal, comparing functional module codes to be verified contained in current simulation projects and test excitation signals applied to various functional modules with the information of the existing simulation projects, and then generating a change list document, wherein modification information of the functional module codes of the current simulation projects and the modification information of the test excitation signals are recorded in the change list document; selecting reusable information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
Other technical features are referred to in the previous embodiments and are not described herein.
In the foregoing description, the disclosure of the present invention is not intended to limit itself to these aspects. Rather, the various components may be selectively and operatively combined in any number within the intended scope of the present disclosure. In addition, terms like "comprising," "including," and "having" should be interpreted as inclusive or open-ended, rather than exclusive or closed-ended, by default, unless explicitly defined to the contrary. All technical, scientific, or other terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs unless defined otherwise. Common terms found in dictionaries should not be interpreted too ideally or too realistically in the context of related art documents unless the present disclosure expressly limits them to that. Any changes and modifications of the present invention based on the above disclosure will be within the scope of the appended claims.

Claims (10)

1. A collaborative simulation method in chip simulation verification is characterized by comprising the following steps:
constructing a collaborative simulation project database, wherein the collaborative simulation project database comprises simulation verification information of one or more existing simulation projects;
acquiring current simulation project information, comparing a functional module code to be verified contained in the current simulation project and a test excitation signal applied to each functional module with the information of the current simulation project, and generating a change list document; the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document;
selecting reusable information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
2. The method of claim 1, wherein: the functional module is a DUT to be tested.
3. The method of claim 1, wherein: the existing simulation projects in the collaborative simulation project database comprise the historical simulation projects which are verified in the computer terminal where the current simulation project is located, the historical simulation projects which are verified in other computer terminals and the ongoing simulation projects.
4. The method of claim 3, wherein: the simulation verification information of the existing simulation project comprises functional module code information included in the simulation project, test excitation signals applied to the functional modules, code compiling files of the functional modules and simulation result files of the functional module codes after the test excitation is applied.
5. The method of claim 1, wherein: for any existing simulation project in a collaborative simulation project database, a simulation result file of the existing simulation project comprises simulation result information of all function modules at different time, the simulation result file is divided into different simulation result modules according to the function module information contained in the existing simulation project, the function modules are arranged corresponding to the simulation result modules, and the simulation result modules are simulation results of the corresponding function modules in different time periods in the simulation verification process;
and when the reusable information is selected, configuring the reusable function module and the reusable time period information of the function module, and acquiring the simulation result module of the function module in the reusable time period according to the configured reusable time period for multiplexing.
6. The method of claim 5, wherein: when a simulation result file with the same function module code and corresponding test excitation signal is multiplexed, configuring a simulation result multiplexing mode according to the change information of the function module code and the corresponding test excitation signal along with time, wherein the simulation result multiplexing mode comprises a time multiplexing mode and a space multiplexing mode; for the current simulation project containing a plurality of functional modules, different functional modules respectively adopt a time multiplexing mode and a space multiplexing mode, so that a hybrid multiplexing mode is formed.
7. The method of claim 6, wherein: comparing a code and a test excitation signal of any functional module in the current simulation project with the current simulation project; when the code of the functional module before a certain time point T and the test excitation signal before T are not changed relative to the existing simulation project are judged, a time multiplexing mode is configured for the functional module, and a simulation result module of the corresponding functional module before T in the existing simulation project is multiplexed; and when the functional module is judged to be unchanged relative to the existing simulation project code and the applied test excitation signal is also not changed, configuring a spatial multiplexing mode for the functional module, and multiplexing the simulation result module of the corresponding functional module in the existing simulation project in the whole simulation verification process.
8. The method of claim 7, further comprising the step of: after the reusable information is selected, the current simulation project is subjected to collaborative simulation verification based on the reusable information, the steps are as follows,
compiling: compiling the functional module code file, newly compiling the changed code file and the simulation testbench file, and multiplexing the code compiling file of the existing simulation project for the code file which is not changed;
simulation: and after the file compiling is finished, a simulation step is carried out, new simulation is carried out on the functional module with the new compiled file and changed codes, the simulation result module of the existing project is multiplexed on the functional module with the unchanged codes and unchanged applied test excitation signals, and new simulation is carried out on the functional module with the changed test excitation signal sending or signal interaction with the functional module of the new simulation.
9. A collaborative simulation device in chip simulation verification is characterized by comprising:
the change list generation module is used for acquiring the current simulation project information, comparing the functional module codes to be verified contained in the current simulation project and the test excitation signals applied to the functional modules with the information of the existing simulation projects in the collaborative simulation project database, and then generating a change list document; the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document; the collaborative simulation project database comprises simulation verification information of one or more existing simulation projects;
the reuse information processing module is used for selecting the reuse information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
10. A collaborative simulation system in chip simulation verification is characterized by comprising:
the system comprises a collaborative simulation platform, a simulation system and a simulation system, wherein the collaborative simulation platform is used for constructing a collaborative simulation project database which comprises simulation verification information of one or more existing simulation projects;
the simulation verification user terminal is in communication connection with the collaborative simulation platform and is used for acquiring current simulation project information on the user terminal, comparing functional module codes to be verified contained in the current simulation project and test excitation signals applied to the functional modules with the information of the existing simulation project, and then generating a change list document; the modification information of the function module code of the current simulation project and the modification information of the test excitation signal are recorded in the change list document; selecting reusable information from the simulation verification information of the existing simulation project according to the change list document; the method comprises the steps of multiplexing code compiling files with the same functional module codes, and multiplexing simulation result files with the same functional module codes and corresponding test excitation signals.
CN202111618993.5A 2021-12-27 2021-12-27 Collaborative simulation method in chip simulation verification and application Pending CN114282464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111618993.5A CN114282464A (en) 2021-12-27 2021-12-27 Collaborative simulation method in chip simulation verification and application

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111618993.5A CN114282464A (en) 2021-12-27 2021-12-27 Collaborative simulation method in chip simulation verification and application

Publications (1)

Publication Number Publication Date
CN114282464A true CN114282464A (en) 2022-04-05

Family

ID=80876581

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111618993.5A Pending CN114282464A (en) 2021-12-27 2021-12-27 Collaborative simulation method in chip simulation verification and application

Country Status (1)

Country Link
CN (1) CN114282464A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114996077A (en) * 2022-08-08 2022-09-02 济南新语软件科技有限公司 Multi-core parallel simulation method and platform architecture for realizing multi-core parallel simulation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114996077A (en) * 2022-08-08 2022-09-02 济南新语软件科技有限公司 Multi-core parallel simulation method and platform architecture for realizing multi-core parallel simulation

Similar Documents

Publication Publication Date Title
US8468475B2 (en) Conversion of circuit description to an abstract model of the circuit
US6083269A (en) Digital integrated circuit design system and methodology with hardware
US8682631B2 (en) Specifications-driven platform for analog, mixed-signal, and radio frequency verification
JP4994393B2 (en) System and method for generating multiple models at different levels of abstraction from a single master model
US8296699B1 (en) Method and system for supporting both analog and digital signal traffic on a single hierarchical connection for mixed-signal verification
US20040181385A1 (en) HDL Co-simulation in a high-level modeling system
CN112417798B (en) Time sequence testing method and device, electronic equipment and storage medium
US8185368B2 (en) Mixed-domain analog/RF simulation
US5974241A (en) Test bench interface generator for tester compatible simulations
US9183329B2 (en) Debugging simulation with partial design replay
US6601024B1 (en) Code translation between hardware design languages
CN116341428B (en) Method for constructing reference model, chip verification method and system
US8346527B2 (en) Simulating an operation of a digital circuit
Bombana et al. SystemC-VHDL co-simulation and synthesis in the HW domain
CN114692533A (en) Method and device for checking clock in chip EDA simulation
CN114282464A (en) Collaborative simulation method in chip simulation verification and application
Bombieri et al. Incremental ABV for functional validation of TL-to-RTL design refinement
US8689153B1 (en) M and A for importing hardware description language into a system level design environment
Bombieri et al. Hybrid, incremental assertion-based verification for TLM design flows
CN112861455B (en) FPGA modeling verification system and method
Kim et al. Automated formal verification of scheduling with speculative code motions
US7131091B1 (en) Generating fast logic simulation models for a PLD design description
Belanović et al. A consistent design methodology for wireless embedded systems
KR100939642B1 (en) Test device generating stimulus based on software, method for testing using the same and computer-readable storage medium storged program for generating the stimulus
US7047173B1 (en) Analog signal verification using digital signatures

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination