CN107525530A - A kind of integrated circuit of absolute optical encoder - Google Patents
A kind of integrated circuit of absolute optical encoder Download PDFInfo
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- CN107525530A CN107525530A CN201710670358.9A CN201710670358A CN107525530A CN 107525530 A CN107525530 A CN 107525530A CN 201710670358 A CN201710670358 A CN 201710670358A CN 107525530 A CN107525530 A CN 107525530A
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- 230000003287 optical effect Effects 0.000 title claims abstract description 20
- 238000006243 chemical reaction Methods 0.000 claims abstract description 32
- 230000010354 integration Effects 0.000 claims abstract 2
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- 238000003199 nucleic acid amplification method Methods 0.000 claims description 7
- 238000012545 processing Methods 0.000 claims description 7
- 238000005070 sampling Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 claims description 3
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- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims description 2
- 230000003245 working effect Effects 0.000 claims description 2
- 230000000717 retained effect Effects 0.000 claims 1
- 230000005611 electricity Effects 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 6
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- 238000011161 development Methods 0.000 description 1
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- 239000004744 fabric Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
- G01D5/26—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light
- G01D5/32—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light with attenuation or whole or partial obturation of beams of light
- G01D5/34—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light with attenuation or whole or partial obturation of beams of light the beams of light being detected by photocells
- G01D5/347—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable characterised by optical transfer means, i.e. using infrared, visible, or ultraviolet light with attenuation or whole or partial obturation of beams of light the beams of light being detected by photocells using displacement encoding scales
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Abstract
The invention discloses a kind of integrated circuit of absolute optical encoder, belongs to technical field of integrated circuits, including increment signal link, absolute signal link, biasing circuit module and configuration module；Described increment signal link includes increment photoelectric conversion module, gain adjustable amplifier module and subdivision module；Described absolute signal link includes absolute photoelectric conversion module and reading circuit module；Described biasing circuit module provides electric current and voltage bias for integrated circuit；Described configuration module provides configuration signal for integrated circuit.The integrated circuit of the present invention realizes the integrated of the electricity such as sensor in absolute encoder, amplifying circuit, process circuit part, and subdivision and system design are combined, carried on the premise of not increasing chip size, after being finely divided to absolute position encoder.Compared with conventional codec acquisition process circuit, there is Integration Design, simple in construction, fast response time, without additional circuit.
Description
Technical field
The invention belongs to technical field of integrated circuits, and in particular to a kind of special integrated electricity of absolute optical encoder
Road.
Background technology
With industrialized depth development and information-based propulsion, the requirement to photoelectric encoder also improves constantly, and encodes
Device will not only act as angular transducer, by progressively as the collection of information, feedback, judgement, the comprehensive carrier handled.
The resolution ratio and precision of encoder are its most important indexs.Resolution ratio, which improves, relies primarily on subdivision realization, including：
Hardware subdivision, digital subdividing, electricity subdivision, amplitude domain subdivision etc. divided method.Precision is improved and relied primarily on：Material property carries
Liter, processing technology progress, rigging error reduction, application of algorithm for error correction etc..
Traditional absolute optical encoder on the one hand due to it, optically and electrically get over by principle, the requirement of portraying to grating encoder
Come more complicated, cause the design of photoelectric receiving device can not also to realize the integrated of height so that encoder product complexity compared with
It is high；On the other hand, the raising of encoder resolution largely relies on the increase of code channel and segments the application of technology, code channel
Increase directly results in code-disc and become large-sized, and limits the usage scenario of encoder.
In summary, the resolution ratio and dimensional problem of absolute optical encoder, be traditional absolute optical encoder not
It can reconcile contradiction point, to realize its miniaturization, high reliability, high-resolution, highly integrated target, it is necessary to be adopted using collection information
The application specific integrated circuit integrate, feed back, judge, handled, this is also the research emphasis of absolute optical encoder.
The content of the invention
For shortcoming present in prior art, it is an object of the invention to provide a kind of new absolute optical encoder
Application specific integrated circuit, and the business CMOS technology of standard are completely compatible.Purpose is to combine absolute coding and incremental encoding side
Formula, by the process circuit of chip internal, the most important electrical principles of encoder and signal processing function are realized, compiled improving
While code device resolution ratio, the target of its miniaturization is realized.
The present invention is achieved through the following technical solutions：
A kind of integrated circuit of absolute optical encoder, including increment signal link, absolute signal link, biasing circuit
Module 4 and configuration module 5；
Described increment signal link includes increment photoelectric conversion module 11, gain adjustable amplifier module 2 and subdivision mould
Block 6；In increment signal link, photosignal is produced by increment photoelectric conversion module 11, by gain adjustable amplifier module 2
Multistage amplification, the tunnel phases of output 4 differ 90 ° of sinusoidal signal D3, finally complete Subdividing Processing by subdivision module 6, so
To increment signal D2；
Described absolute signal link includes absolute photoelectric conversion module 12 and reading circuit module 3；In absolute signal chain
Lu Zhong, photosignal are produced by absolute photoelectric conversion module 12, are read out through reading circuit module 3, and by gathering, product
Divide, amplify, column selection circuit reads final absolute signal D1；
Described biasing circuit module 4 provides electric current and voltage bias for integrated circuit；
Described configuration module 5 provides configuration signal for integrated circuit.
Further, described increment photoelectric conversion module 11, by the photodiode group of 120 uniform fan arrangements
Into being connected according to the staggered modes of ABCD, produce that 4 groups of light intensity are identical and phase with one another differs 90 ° of photoelectric current.
Further, described absolute photoelectric conversion module 12, by the photodiode group of 120 uniform fan arrangements
Into photoelectric current independent parallel caused by each diode exports.
Further, the gain adjustable amplifier module 2 uses two stage pipeline structures, by high-gain trans-impedance amplifier
And fully-differential amplifier composition, high-gain trans-impedance amplifier can realize amplifying across resistance for high-gain, right using TG doors (transmission gate)
Each resistance and electric capacity are controlled, and TG doors are controlled by configuration module 5, and the regulation and pattern control of the more gradients of amplifier gain can be achieved
System, 4 groups of phases caused by increment photoelectric conversion module 11 are differed to 90 ° of photo-signal and are enlarged into 90 ° of phase difference across resistance
Voltage signal；Phase is differed into 180 ° of two groups of signals respectively again, by fully-differential amplifier, finally gives four tunnel phases differences
90 ° of cosine and sine signal, and the resistance value in the R_S for passing through the regulation gain adjustable amplifier of configuration module 5 module 2 so that 4 tunnels
The sine voltage signal amplitude that signal is amplified by first order high-gain trans-impedance amplifier is close, while with R_S resistance value
The gain of change control second level fully-differential amplifier, realizes the denoising and amplification to the output signal of increment photoelectric conversion module 11
Function.
Further, the reading circuit module 3 adds column selection circuit-mode using cascade second amplifying circuit, such as Fig. 4 institutes
Show, wherein, described cascade two-stage amplifying circuit is made up of high-gain trans-impedance amplifier and source follower；To absolute opto-electronic conversion
Photosignal in module 12, high-gain is used across resistance amplifying circuit in the first order of cascade second amplifying circuit, will be faint
Photoelectric current is enlarged into voltage across resistance, then by second level source follower, reduces output impedance, improve the overall bringing onto load energy of circuit
Power, amplified signal are connected on signal bus；Through output buffer, most train of signal row exports signal at last in bus.
Described column selection circuit, it is made up of 240 controlling switches, controls the light in absolute photoelectric conversion module 12 respectively
Unlatching/closing of electric signal；Specifically by controlling switch SW0-SW120 switching sequence, to control No. 120 reading circuits
Work and signal output order.Unlatching/closing of 120 road photoelectric currents is realized by controlling switch, then is integrated through electric capacity C
Collection；The signal gathered after amplifying is sequentially output in bus by controlling switch SW1-SW120.
Further, the configuration module 5, it is the digital control unit of integrated circuit, by digital interface circuit and deposit
Device group forms；Wherein, digital interface circuit is used for completing the outer control to circuit inner workings of circuit；Register group is by 8
Individual independently addressable eight bit register is formed, for the control signal inputted in storage circuit extroversion circuit.
Further, the effect of the subdivision module 6 is finely divided for incremental sine signal, and electricity is kept by sampling
Road, comparator, digital analog converter and logic control element composition；The sinusoidal signal D3 of input first passes through sampling hold circuit, protects
The signal handled is input to comparator again；Normal voltage V as reference simultaneouslyrefPass through the processing of digital analog converter, Ke Yiyi
It is secondary to obtain voltage Vref/2, Vref/ 4 ... ..., Vref/2nAnd they are sequentially inputted in comparator, n is ADC resolution ratio；It is defeated
The sinusoidal signal D3 entered can with these reference voltages successively compared with, if input sinusoidal signal D3 voltage it is larger, by this
When reference voltage retain, and export be 1；Conversely, the sinusoidal signal D3 of input voltage is smaller, then cast out reference voltage, together
When output be 0, and the logical value exported in these comparison procedures, be corresponding in turn to the highest significant position of ADC outputs from high to low
To least significant bit.Finally it is achieved that the subdivision described in Fig. 2.
Compared with prior art, advantages of the present invention is as follows：
1st, the absolute position of the corresponding determination of each sinusoidal increment signal of integrated circuit of the invention output, passes through
Subdivision to sinusoidal signal, realizes the subdivision to the absolute location information of increment signal, and such a corresponding relation effectively increases increasing
Measure the conversion between signal and absolute location information；
2nd, using matching difference structure design gain adjustable amplifier module, while being amplified to signal,
Eliminate signal institute band noise.Compared to the amplification treatment circuit of conventional codec, integrated circuit of the invention can accomplish multichannel
The complete matching of signal, and multiple signals existing noise jointly is removed by difference, it is not necessary to school is carried out to increment signal
Just can electricity subdivision.
3rd, within the single exposure cycle, multiple signals are acquired the reading circuit module of integrated circuit of the invention simultaneously
Amplification, gathered multiple signals Serial output is controlled by logic switch, has collection soon, the advantages such as readout interval is short.
Brief description of the drawings
Fig. 1 is the structural representation of the integrated circuit of the photoelectric encoder of the present invention；
Fig. 2 is the increment of the present invention and the structural representation of absolute photoelectric conversion module；
Fig. 3 is the Principle of sub-division schematic diagram of the subdivision module of the present invention；
Fig. 4 is the structural representation of the gain adjustable amplifier module of the present invention；
Fig. 5 is the structural representation of the reading circuit module of the present invention；
In figure：Increment photoelectric conversion module 11, absolute photoelectric conversion module 12, gain adjustable amplifier module 2, reading
Circuit module 3, biasing circuit module 4, configuration module 5, subdivision module 6.
Embodiment
The present invention will be further described with specific embodiment below in conjunction with the accompanying drawings.
Embodiment 1
The integrated circuit of the photoelectric encoder of the present invention designs under 0.35 μm of standard CMOS process.
As shown in figure 1, a kind of integrated circuit of absolute optical encoder, including increment signal link, absolute signal chain
Road, biasing circuit module 4 and configuration module 5；Described increment signal link includes increment photoelectric conversion module 11, adjustable gain
Amplifier module 2 and subdivision module 6；In increment signal link, photosignal is produced by increment photoelectric conversion module 11, is passed through
The multistage amplification of gain adjustable amplifier module 2, finally completes Subdividing Processing, and then obtain increment signal by subdivision module 6；Institute
The absolute signal link stated includes absolute photoelectric conversion module 12 and reading circuit module 3；In absolute signal link, optical telecommunications
Number produced by absolute photoelectric conversion module 12, be read out through reading circuit module 3, and by gathering, integrating, amplifying, column selection
Circuit reads final absolute signal D1；Described biasing circuit module 4 provides electric current and voltage bias for integrated circuit；It is described
Configuration module 5 for integrated circuit provide configuration signal.
Described increment photoelectric conversion module 11 and absolute photoelectric conversion module 12 are respectively 120 diode uniform fans
Battle array cloth (angle is 10.52 °), it is as follows that specific signal produces flow：
In increment signal link, when circuit normal work, increment photoelectric conversion module 11 produces 4 groups of phases phase each other
Poor 90 ° of sinusoidal current signal (measured value is about 400nA).Again two-way phase difference is exported through gain adjustable amplifier module 2
90 ° of cosine and sine signal, the output expression formula of trans-impedance amplifier are：V=Vref+RI(VrefFor reference voltage, R is feedback electricity
Resistance, I is input current)；The output expression formula of subtracter is：V=k (V+—V-)+Vref(k is input resistance and feedback resistance ratio,
V+、V-For input voltage)；The expression formula Isin2 π ft of photoelectric current are brought into again, the sine that finally four tunnel phases differ 90 ° can be obtained
Signal output expression formula is：Wherein, reference voltage VrefFor 1.5V, k is 6 times, R
For 540K Ω.The average value that V are exported by emulating and surveying four tunnel sine and cosines be 1.5V, peak-to-peak value 2V, 90 ° of phase difference.
The effect of subdivision module 6 is to carry out 9bit subdivisions for incremental sine signal, and specific workflow is sinusoidal for input
Signal VinSampling hold circuit is first passed around, under the regulation and control of control signal, samples the signal output of holding to comparator.Subdivision
Module reference voltage is 1.8V, under 9bit digital analog converters DAC processing, can be sequentially output voltage VDAC：0.9V,
0.45V ... ..., 0.0035V, the other end as comparator input.In first clock cycle T, after over-sampling is kept
Input voltage compared with 0.9V, VinReference voltage 0.9V when ＞ 0.9V, then exporting logic 1, and keeping this time comparing
(VinLess than 0.9V, then logical zero is exported, and cast out reference voltage 0.9V when this time comparing)；In second clock cycle T,
VinIt is compared with 1.35V, Vin＜ 1.35V, logical zero is exported, and cast out reference voltage 0.45V when this time comparing；
In three clock cycle T, VinIt is compared with 1.125V, VinGinseng when ＞ 1.125V, exporting logic 1, and keeping this time comparing
Examine voltage 0.225V；In the 4th clock cycle T, VinIt is compared with 1.2375V, Vin＜ 1.2375, logical zero is exported,
And cast out reference voltage 0.1125V when this time comparing；In the 5th clock cycle T, VinIt is compared with 1.1813V,
Vin＜ 1.1813V, logical zero is exported, and cast out reference voltage 0.0563V when this time comparing；In the 6th clock cycle T,
VinIt is compared with 1.1531V, Vin＜ 1.1531V, logical zero is exported, and cast out reference voltage 0.0281V when this time comparing；
In the 7th clock cycle T, VinIt is compared with 1.139V, Vin＜ 1.139V, logical zero is exported, and cast out when this time comparing
Reference voltage 0.014V；In the 8th clock cycle T, VinIt is compared with 1.132V, Vin＜ 1.132V, export logic
0, and cast out reference voltage 0.007V when this time comparing；In the 9th clock cycle T, VinIt is compared with 1.1285V,
VinReference voltage 0.0035V when ＜ 1.1285V, exporting logic 1, and keeping this time comparing.Last logic output 101000001
(input signal VinFor 1.1285V), a conversion end.
In absolute signal link, absolute photoelectric conversion module 12 is made up of 120 independent photodiodes, and is produced
Serial photosignal Vo outputs.In the environment of 2MHz clocks CLK, when enable signal occur a high level square-wave signal,
Reading circuit enters a read cycle.In a read cycle, controlling switch SW0 is grounded first, bleeds off whole electric capacity C
In electric charge；Then controlling switch SW0 is all turned on, waits 3us time for exposure, allow whole electric capacity C to complete to photoelectric current
D0–D120Integration collection；It is then turned off controlling switch SW0, the photoelectricity in electric capacity C flows through high-gain trans-impedance amplifier and is converted to
0-3.3V voltage signal, then it is by source follower that voltage signal is stable in a constant magnitude of voltage；Simultaneously by column selection electricity
The control signal SEL_N (N takes 1-120) of road generation, adjacent S EL_N signals move 1 μ s afterwards successively on a timeline, SEL_N's
Under control, controlling switch SW1 is opened, and voltage signal Vo1 inputs output buffer to the end through signal bus；1us is controlled after the second
System switch SW1 is closed, while controlling switch SW2 is opened, and voltage signal Vo2 equally through signal bus, inputs output to the end
Buffer；The like, the voltage signal after 120 tunnels are amplified sequentially is input in bus, will most be believed through output buffer afterwards
Number Serial output (whole cycle is 150 μ s).
Claims (7)
1. a kind of integrated circuit of absolute optical encoder, it is characterised in that including increment signal link, absolute signal chain
Road, biasing circuit module (4) and configuration module (5)；
Described increment signal link includes increment photoelectric conversion module (11), gain adjustable amplifier module (2) and subdivision mould
Block (6)；In increment signal link, photosignal is produced by increment photoelectric conversion module (11), by gain adjustable amplifier
The multistage amplification of module (2), the tunnel phase of output 4 differ 90 ° of sinusoidal signal D3, finally complete subdivision by subdivision module (6)
Reason, and then obtain increment signal D2；
Described absolute signal link includes absolute photoelectric conversion module (12) and reading circuit module (3)；In absolute signal chain
Lu Zhong, photosignal are produced by absolute photoelectric conversion module (12), are read out through reading circuit module (3), and by gathering,
Integration, amplification, column selection circuit read final absolute signal D1；
Described biasing circuit module (4) provides electric current and voltage bias for integrated circuit；
Described configuration module (5) provides configuration signal for integrated circuit.
A kind of 2. integrated circuit of absolute optical encoder as claimed in claim 1, it is characterised in that described incremental optical
Electric modular converter (11), it is made up of the photodiode of 120 uniform fan arrangements, connects according to the staggered modes of ABCD
Connect, produce that 4 groups of light intensity are identical and phase with one another differs 90 ° of photoelectric current.
A kind of 3. integrated circuit of absolute optical encoder as claimed in claim 1, it is characterised in that described absolute light
Electric modular converter (12), it is made up of the photodiode of 120 uniform fan arrangements, photoelectric current caused by each diode is only
Vertical parallel output.
A kind of 4. integrated circuit of absolute optical encoder as claimed in claim 1, it is characterised in that the adjustable gain
Amplifier module (2) uses two stage pipeline structures, is made up of high-gain trans-impedance amplifier and fully-differential amplifier, high-gain across
Impedance amplifier can realize amplifying across resistance for high-gain, each resistance and electric capacity are controlled using transmission gate, transmission gate is by configuring
Module (5) controls, and regulation and the Schema control of the more gradients of amplifier gain can be achieved, increment photoelectric conversion module (11) is produced
4 groups of phases differ 90 ° of photo-signal and be enlarged into the voltage signal of 90 ° of phase difference across resistance；Phase is differed respectively again
180 ° of two groups of signals, by fully-differential amplifier, finally give the cosine and sine signal that four tunnel phases differ 90 °.
A kind of 5. integrated circuit of absolute optical encoder as claimed in claim 1, it is characterised in that the reading circuit
Module (3) adds column selection circuit-mode using cascade second amplifying circuit；Wherein, described cascade two-stage amplifying circuit is by high-gain
Trans-impedance amplifier and source follower composition；To the photosignal in absolute photoelectric conversion module 12, in cascade second amplifying circuit
The first order using high-gain across resistance amplifying circuit, faint photoelectric current is enlarged into voltage across resistance, then by second level source with
With device, reduce output impedance, improve the overall carrying load ability of circuit, amplified signal is connected on signal bus；Institute
The column selection circuit stated, it is made up of 240 controlling switches, controls opening for the photosignal in absolute photoelectric conversion module 12 respectively
Open/close.
A kind of 6. integrated circuit of absolute optical encoder as claimed in claim 1, it is characterised in that the configuration module
(5), it is the digital control unit of integrated circuit, is made up of digital interface circuit and register group；Wherein, digital interface circuit is used
To complete the outer control to circuit inner workings of circuit；Register group is made up of 8 independently addressable eight bit registers,
For the control signal inputted in storage circuit extroversion circuit.
A kind of 7. integrated circuit of absolute optical encoder as claimed in claim 1, it is characterised in that the subdivision module
(6) effect is finely divided for incremental sine signal, by sampling hold circuit, comparator, digital analog converter and logic control
Unit composition processed；The sinusoidal signal D3 of input first passes through sampling hold circuit, and the signal maintained is input to comparator again；Simultaneously
Normal voltage V as referencerefBy the processing of digital analog converter, voltage V can be obtained successivelyref/2, Vref/ 4 ... ...,
Vref/2nAnd they are sequentially inputted in comparator, n is ADC resolution ratio；The sinusoidal signal D3 of input can be with these references
Voltage compares successively, if the sinusoidal signal D3 of input voltage is larger, reference voltage now is retained, and it is 1 to export；
Conversely, the sinusoidal signal D3 of input voltage is smaller, then cast out reference voltage, while it is 0 to export.
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| CN201710670358.9A CN107525530A (en) | 2017-08-08 | 2017-08-08 | A kind of integrated circuit of absolute optical encoder |
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| CN201710670358.9A CN107525530A (en) | 2017-08-08 | 2017-08-08 | A kind of integrated circuit of absolute optical encoder |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109443750A (en) * | 2018-10-18 | 2019-03-08 | 重庆长安工业(集团)有限责任公司 | A kind of weapon system transmission backlash measurement method |
| CN111238548A (en) * | 2020-03-05 | 2020-06-05 | 中国科学院长春光学精密机械与物理研究所 | Signal acquisition processing device and method of non-image absolute photoelectric encoder |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010005149A (en) * | 2008-06-27 | 2010-01-14 | Mitsubishi Electric Corp | Multileaf collimator for particle beam treatment system |
| EP2565590A1 (en) * | 2011-09-01 | 2013-03-06 | Mitutoyo Corporation | Absolute position measuring encoder |
| CN103176450A (en) * | 2013-02-01 | 2013-06-26 | 北京配天大富精密机械有限公司 | Servo drive device and servo control system |
| CN103983290A (en) * | 2014-05-06 | 2014-08-13 | 上海精浦机电有限公司 | Composite type absolute value encoder |
| CN105627921A (en) * | 2015-12-18 | 2016-06-01 | 佛山轻子精密测控技术有限公司 | Absolute encoder subdivision acquisition system and measurement method thereof |
| CN106647639A (en) * | 2016-12-26 | 2017-05-10 | 南京长峰航天电子科技有限公司 | Servo control real time position obtaining method and system based on incremental mode |
-
2017
- 2017-08-08 CN CN201710670358.9A patent/CN107525530A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010005149A (en) * | 2008-06-27 | 2010-01-14 | Mitsubishi Electric Corp | Multileaf collimator for particle beam treatment system |
| EP2565590A1 (en) * | 2011-09-01 | 2013-03-06 | Mitutoyo Corporation | Absolute position measuring encoder |
| CN103176450A (en) * | 2013-02-01 | 2013-06-26 | 北京配天大富精密机械有限公司 | Servo drive device and servo control system |
| CN103983290A (en) * | 2014-05-06 | 2014-08-13 | 上海精浦机电有限公司 | Composite type absolute value encoder |
| CN105627921A (en) * | 2015-12-18 | 2016-06-01 | 佛山轻子精密测控技术有限公司 | Absolute encoder subdivision acquisition system and measurement method thereof |
| CN106647639A (en) * | 2016-12-26 | 2017-05-10 | 南京长峰航天电子科技有限公司 | Servo control real time position obtaining method and system based on incremental mode |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109443750A (en) * | 2018-10-18 | 2019-03-08 | 重庆长安工业(集团)有限责任公司 | A kind of weapon system transmission backlash measurement method |
| CN111238548A (en) * | 2020-03-05 | 2020-06-05 | 中国科学院长春光学精密机械与物理研究所 | Signal acquisition processing device and method of non-image absolute photoelectric encoder |
| CN111238548B (en) * | 2020-03-05 | 2021-03-23 | 中国科学院长春光学精密机械与物理研究所 | Signal acquisition processing device and method of non-image absolute photoelectric encoder |
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Application publication date: 20171229 |