CN107484334A - Circuit board and circuit board manufacturing method - Google Patents
Circuit board and circuit board manufacturing method Download PDFInfo
- Publication number
- CN107484334A CN107484334A CN201610398874.6A CN201610398874A CN107484334A CN 107484334 A CN107484334 A CN 107484334A CN 201610398874 A CN201610398874 A CN 201610398874A CN 107484334 A CN107484334 A CN 107484334A
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- Prior art keywords
- layer
- circuit board
- line
- sub
- adhesive
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/041—Stacked PCBs, i.e. having neither an empty space nor mounted components in between
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
The present invention relates to a kind of circuit board, the second sub-circuit board bonded including the first sub-circuit board and by adhesive-layer and first sub-circuit board, first sub-circuit board includes first line figure, second sub-circuit board includes the second line pattern corresponding with the first line figure, the adhesive-layer is dispersed with electrically independent conducting particles, the conducting particles punctures the adhesive-layer and ruptured, the first line figure conducts the line pattern to form the circuit board by the conducting particles ruptured in the adhesive-layer with second line pattern, the thickness of the line pattern of the circuit board is equal to the first line figure, the thickness sum of the adhesive-layer and second line pattern.The invention further relates to a kind of circuit board manufacturing method.
Description
Technical field
The present invention relates to a kind of circuit board and circuit board manufacturing method.
Background technology
With the development of electronic technology, electronic product gradually minimizes, and the wiring density of circuit board gradually increases, circuit board
Wire between spacing (line-spacing) be gradually reduced, be the overload of lifting lead wire simultaneously because the functional diversities of electronic product
Electric current, thickness (line is thick) gradually increase of the wire of circuit board.Limitation of the prior art due to making precision, the line of circuit board are thick
It is certain with the ratio of line-spacing.In the case that line-spacing is certain, during the thick ratio with line-spacing of increase line, easily because etch not to the utmost and caused by
Short circuit.
The content of the invention
In view of this, it is necessary to which a kind of circuit board and circuit board manufacturing method that can solve the problem that above-mentioned technical problem is provided.
A kind of circuit board, including the first sub-circuit board and pass through the second son that adhesive-layer and first sub-circuit board bond
Circuit board, first sub-circuit board include first line figure, and second sub-circuit board includes and the first line figure
Second line pattern corresponding to shape, the adhesive-layer are dispersed with electrically independent conducting particles, and the conducting particles punctures described
Adhesive-layer simultaneously ruptures, and the first line figure and second line pattern pass through the conducting particles that is ruptured in the adhesive-layer
The line pattern to form the circuit board is conducted, the thickness of the line pattern of the circuit board is equal to the first line figure
The thickness sum of shape, the adhesive-layer and second line pattern.
A kind of circuit board manufacturing method, including step：
The first sub-circuit board and the second sub-circuit board are made, first sub-circuit board includes first line figure, described
Second sub-circuit board includes the second line pattern corresponding with the first line figure；
Adhesive-layer is provided, electrically independent conducting particles is dispersed with the adhesive-layer；
Stack first sub-circuit board, the adhesive-layer and second sub-circuit board, the adhesive-layer and be arranged on institute
State between the first sub-circuit board and second sub-circuit board, the first line figure is corresponding with second line pattern；
And
Pressure makes first sub-circuit board be bonded by the adhesive-layer and second sub-circuit board, the conductive particle
Son punctures the adhesive-layer and ruptured, and the first line figure passes through broken in the adhesive-layer with second line pattern
The conducting particles split is electrically connected with the line pattern to form the circuit board, and the thickness of the line pattern of the circuit board is equal to institute
State the thickness sum of first line figure, the adhesive-layer and second line pattern.
Compared to prior art, circuit board and circuit board manufacturing method provided by the invention, due to first sub-circuit
Plate includes first line figure, and second sub-circuit board includes the second line pattern corresponding with the first line figure,
It so may be such that the line-spacing of the circuit board is certain, and the first line figure passes through adhesive-layer with second line pattern
Bond, and be electrically connected with by conducting particles in adhesive-layer, because first sub-circuit board and the second sub-circuit board can be
Completed under the limitation of the making precision of prior art, in this way, the line of the circuit board can be caused while etching is avoided not to the utmost
Thickness increase, so as to further increase the thick ratio with line-spacing of the line of the circuit board.
Brief description of the drawings
Fig. 1 is the sectional perspective schematic diagram for the circuit board that the specific embodiment of the invention provides.
Fig. 2 is the diagrammatic cross-section that the present invention makes the first sub-circuit board formed and the second sub-circuit board.
Fig. 3 is the diagrammatic cross-section of substrate provided by the invention.
Fig. 4 is that Fig. 3 copper foil layer is made to the diagrammatic cross-section after the first native copper layer to form first line figure.
Fig. 5 is the diagrammatic cross-section formed on Fig. 4 the first native copper layer after photosensitive material layer.
Fig. 6 is removed corresponding with the first native copper layer to make Fig. 5 photosensitive material layer to form the first dielectric layer
Diagrammatic cross-section after the photosensitive material layer of part.
Fig. 7 is the diagrammatic cross-section after forming the first copper plate on Fig. 6 the first native copper layer.
Fig. 8 is the diagrammatic cross-section of adhesive-layer provided by the invention.
Fig. 9 is to show the section of the first sub-circuit board in Fig. 2 and the second sub-circuit board and the adhesive-layer heap poststack in Fig. 8
It is intended to.
Figure 10 is that the section after being pressed to the first sub-circuit board, adhesive-layer and the second sub-circuit board that are stacked in Fig. 9 is illustrated
Figure.
Figure 11 is forms the first welding resisting layer and second anti-on Figure 10 the first sub-circuit board and the second sub-circuit board respectively
The diagrammatic cross-section of layer.
Main element symbol description
Circuit board 100
First sub-circuit board 11
Adhesive-layer 14
Second sub-circuit board 17
First dielectric layer 111
First line figure 115
First surface 112
Second surface 113
First native copper layer 116
First copper plate 117
Conducting particles 141
Second dielectric layer 171
Second line pattern 175
3rd surface 172
4th surface 173
Second native copper layer 176
Second copper plate 177
First welding resisting layer 18
Second welding resisting layer 19
Opening 181
Electric connection pad 182
Substrate 101
Insulating barrier 102
Copper foil layer 103
Photosensitive material layer 104
Following embodiment will combine above-mentioned accompanying drawing and further illustrate the present invention.
Embodiment
Circuit board provided by the invention and circuit board manufacturing method are described further with reference to embodiment.
Referring to Fig. 1, the circuit board 100 that the specific embodiment of the invention provides includes the first sub-circuit board 11, adhesive-layer
14 and second sub-circuit board 17.The circuit board 100 can be used for Rigid Flex.
First sub-circuit board 11 includes the first dielectric layer 111 and first line figure 115.
First dielectric layer 111 includes parallel and opposite first surface 112 and second surface 113.The First Line
Road figure 115 is embedded in first dielectric layer 111.The opposite both sides of the first line figure 115 are from described first
Dielectric layer 111 exposes.In present embodiment, the first line figure 115 includes the first native copper layer 116 and the first copper plate
117.The first native copper layer 116 exposes from the first surface 112.First copper plate 116 is from the second surface 113
Expose.In present embodiment, surface of the first native copper layer 116 away from first copper plate 117 and the first surface
112 is coplanar.Surface and the second surface 113 of first copper plate 117 away from the first native copper layer 116 are coplanar.Institute
State and be smaller than or equal to 50 microns between the wire of first line figure 115.The wire of the first line figure 115
Spacing between line width and the wire of first line figure 115 is roughly equal.In present embodiment, the first line figure
The line width of the wire of spacing and the first line figure 115 between 115 wire is equal to 50 microns.The first line
The thickness range of figure 115 is 9-90 microns.In present embodiment, the thickness of the first line figure 115 is 35 microns.
The adhesive-layer 14 is arranged between first sub-circuit board 11 and second sub-circuit board 17.The viscose glue
Conducting particles 141 is dispersed with layer 14.The conducting particles 141 is electrically independent between each other, so as not to it is short-circuit between causing circuit.
The conducting particles 141 punctures the adhesive-layer 14 with the part that the first line figure 115 is connected and ruptured.This embodiment party
In formula, the particle diameter of each conducting particles 141 is equal.The particle size range of the conducting particles 141 is 2-20 microns.
Second sub-circuit board 17 is bonded by the adhesive-layer 14 and first sub-circuit board 11.Second son
Circuit board 17 includes the second dielectric layer 171 and the second line pattern 175.Second line pattern 175 and the first line
The correspondence of figure 115.In present embodiment, second line pattern 175 first sub-circuit board 11 projection with it is described
First line figure 115 is overlapping.In present embodiment, throwing of second line pattern 175 in first sub-circuit board 11
Shadow is completely superposed with the first line figure 115.The leading by the implosion of adhesive-layer 14 of second line pattern 175
Charged particle 141 is electrically connected with the first line figure 115, forms the line pattern of the circuit board 100.
It is appreciated that in other embodiment, due to contraposition deviation be present, second line pattern 175 is described
The off normal of 0-20 microns may be present in projection and the first line figure 115 of one sub-circuit board 11.
Second dielectric layer 171 includes parallel and opposite the 3rd surface 172 and the 4th surface 173.Second line
Road figure 175 is embedded in second dielectric layer 171.The opposite both sides of second line pattern 175 are from described second
Dielectric layer 171 exposes.In present embodiment, second line pattern 175 includes the second native copper layer 176 and the second copper plate
177.The second native copper layer 176 exposes from the 3rd surface 171.Second copper plate 176 is from the 4th surface 173
Expose.In present embodiment, surface of the second native copper layer 176 away from second copper plate 177 and the 3rd surface
172 is coplanar.Surface and fourth surface 173 of second copper plate 177 away from the second native copper layer 176 are coplanar.This
In embodiment, the 3rd surface 172 of the first surface 112 of first dielectric layer 111 and second dielectric layer 171 is opposite
Set, the second native copper layer 176 is oppositely arranged with the first native copper layer 116.The first surface 112 passes through the viscose glue
Layer 14 bonds with the 3rd surface 172.The second native copper layer 176 passes through the adhesive-layer 14 and the first native copper layer
116 bond, and are electrically connected with by the conducting particles 141 and the first native copper layer 116 of the implosion of adhesive-layer 14.It is described
It is smaller than or equal to 50 microns between the wire of second line pattern 175.The line of the wire of second line pattern 175
The wide spacing between the wire of second line pattern 175 is roughly the same.In present embodiment, second line pattern
The line width of the wire of spacing and second line pattern 175 between 175 wire is equal to 50 microns.Second circuit
The thickness range of figure 175 is 9-90 microns.In present embodiment, the thickness of second line pattern 175 is 35 microns.Institute
The thickness for stating the line pattern of circuit board 100 is equal to the first line figure 115, the adhesive-layer 14 and described after pressing
The thickness sum of second line pattern 175.In present embodiment, the thickness of the line pattern of the circuit board 100 is about 70 micro-
Rice.The line width of the wire of the line pattern of the circuit board 100 and the first line figure 115 and second line pattern
The line width of 175 wire is identical, equal to 50 microns.Each length is the line pattern of 1002960 microns of the circuit board 100
The resistance value scope of wire be the Ω of 4.18 Ω~8.26.In present embodiment, each length is 1002960 microns of the electricity
The resistance value of the wire of the line pattern of road plate 100 is 5.01 Ω.
It is appreciated that in other embodiment, the second surface 113 of first dielectric layer 111 and second dielectric
4th surface 173 of layer 171 is oppositely arranged, and first copper plate 117 is oppositely arranged with second copper plate 177.It is described
Second surface 113 is bonded by the adhesive-layer 14 and the 4th surface 173.Second copper plate 177 passes through described viscous
Glue-line 14 bonds with first copper plate 117, and passes through the conducting particles 141 and described first of the implosion of adhesive-layer 14
Copper plate 117 is electrically connected with.
In present embodiment, the circuit board 100 also includes the first welding resisting layer 18 and the second welding resisting layer 19.Described first is anti-
Layer 18 is formed on first sub-circuit board 11.First welding resisting layer 18 covers first dielectric layer 111 and part
The first line figure 115.First welding resisting layer 18 offers opening 181.The part first line figure 115 is from institute
Opening 181 is stated to expose and be electrically connected pad 182.In present embodiment, first welding resisting layer 18 covers first dielectric
Second surface 113 and part first copper plate 117 of layer 111, and part first copper plate 117 is from the opening
181 expose.Second welding resisting layer 19 is formed on second sub-circuit board 17.Second welding resisting layer 19 covers described
Two dielectric layers 171 and second line pattern 175.In present embodiment, second welding resisting layer 19 covers described second and is situated between
4th surface 173 of electric layer 171 and second copper plate 177.
It is appreciated that in other embodiment, the circuit board 100 may include multiple sub-circuit boards and multiple viscose glues
Layer 14.The structure of each sub-circuit board is identical with the structure of first sub-circuit board 11.The multiple sub-circuit board
Mutually bonded by the adhesive-layer 14, and make it that the line pattern of the multiple sub-circuit board is mutually corresponding.Preferably, two
The native copper layer or copper plate of the adjacent sub-circuit board are oppositely arranged and bond and conduct by the adhesive-layer 14.
The specific embodiment of the invention also provides a kind of circuit board manufacturing method.The circuit board manufacturing method includes following
Step.
The first step, the first sub-circuit board 11 and the second sub-circuit board 17 are formed referring to Fig. 2, making.
First sub-circuit board 11 includes the first dielectric layer 111 and first line figure 115.
First dielectric layer 111 includes parallel and opposite first surface 112 and second surface 113.The First Line
Road figure 115 is embedded in first dielectric layer 111.The opposite both sides of the first line figure 115 are from described first
Dielectric layer 111 exposes.In present embodiment, the first line figure 115 includes the first native copper layer 116 and the first copper plate
117.The first native copper layer 116 exposes from the first surface 112.First copper plate 116 is from the second surface 113
Expose.In present embodiment, surface of the first native copper layer 116 away from first copper plate 117 and the first surface
112 is coplanar.Surface and the second surface 113 of first copper plate 117 away from the first native copper layer 116 are coplanar.
The structure of second sub-circuit board 17 is roughly the same with the structure of first sub-circuit board 11.Present embodiment
In, second sub-circuit board 17 includes the second dielectric layer 171 and the second line pattern 175.Second line pattern 175 with
The correspondence of first line figure 115.
Second dielectric layer 171 includes parallel and opposite the 3rd surface 172 and the 4th surface 173.Second line
Road figure 175 is embedded in second dielectric layer 171.The opposite both sides of second line pattern 175 are from described second
Dielectric layer 171 exposes.In present embodiment, second line pattern 175 includes the second native copper layer 176 and the second copper plate
177.The second native copper layer 176 exposes from the 3rd surface 171.Second copper plate 176 is from the 4th surface 173
Expose.In present embodiment, surface of the second native copper layer 176 away from second copper plate 177 and the 3rd surface
172 is coplanar.Surface and fourth surface 173 of second copper plate 177 away from the second native copper layer 176 are coplanar.
In present embodiment, first sub-circuit board 11 is obtained with second sub-circuit board 17 by identical method
.Method exemplified by making first sub-circuit board 11 to making the first sub-circuit board 11 and the second sub-circuit board 17 below
Illustrate.
First, referring to Fig. 3, providing substrate 101.
The substrate 101 includes insulating barrier 102 and copper foil layer 103.The insulating barrier 102 can be polyimides or polyester material
Material.In present embodiment, the thickness of the copper foil layer 103 is 18 microns.
It is appreciated that in other embodiment, the thickness of the copper foil layer 103 can be adjusted accordingly according to design needs.
Then, also referring to Fig. 2, Fig. 3 and Fig. 4, the copper foil layer 103 is made and forms the first line figure
115 the first native copper layer 116.
In present embodiment, the copper foil layer 103 is made by image transfer and etching mode and forms the First Line
First native copper floor 116 of road figure 115.
Then, referring to Fig. 5, forming photosensitive material layer 104 on the first native copper layer 116 and the insulating barrier 102.
The photosensitive material layer 104 covers the first native copper layer 116, and fills between the first native copper layer 116
Gap covering exposes the insulating barrier 102 from the gap of the first native copper layer 116.
Then, also referring to Fig. 5 and Fig. 6, the photosensitive material layer 104 is made to form the first dielectric layer 111, and move
Except with the corresponding part photosensitive material layer 104 of the first native copper layer 116, to expose the first native copper layer 116.
In present embodiment, the photosensitive material layer 104 is made to form the first dielectric layer by the way of exposure imaging
111, and remove and the corresponding part photosensitive material layer 104 of the first native copper layer 116.
Then, referring to Fig. 7, forming the of the first line figure 115 on the first native copper layer 116 exposed
One copper plate 117.In present embodiment, surface of first copper plate 117 away from the first native copper layer 116 and described the
Surface co-planar of one dielectric layer 111 away from the insulating barrier 102.Because first dielectric layer 111 is by photosensitive material layer 104
Formed by way of exposure imaging, and the side wall that the photosensitive material layer 104 is open in exposure imaging has preferable put down
Whole property, therefore, the side wall of the first copper plate 117 formed on the first native copper layer 116 exposed are approximately perpendicular to described
First native copper layer 116.
Then, referring to Fig. 2, the insulating barrier 102 is removed, obtains first sub-circuit board 11.
In present embodiment, the insulating barrier 102 is removed by chemolysis.
Second step, referring to Fig. 8, providing adhesive-layer 14.
Conducting particles 141 is dispersed with the adhesive-layer 14.The conducting particles 141 is electrically independent between each other.This reality
Apply in mode, the particle diameter of each conducting particles 141 is equal.The particle size range of the conducting particles 141 is 2-20 microns.
3rd step, referring to Fig. 9, stacking the first sub-circuit board 11, the adhesive-layer 14 and second sub-circuit
Plate 17, the adhesive-layer 14 are arranged between first sub-circuit board 11 and second sub-circuit board 17, the First Line
Road figure 115 is corresponding with second line pattern 175.
In present embodiment, during stacking, the first native copper layer 116 of the first line figure 115 and second circuit
Second native copper layer 176 of figure 175 is oppositely arranged.The adhesive-layer 14 is folded in the first native copper layer 116 and described second
Between native copper layer 176.
It is appreciated that in other embodiment, during stacking, the first copper plate 117 of the first line figure 115 and institute
The second copper plate 177 for stating the second line pattern 175 is oppositely arranged.The adhesive-layer 14 is folded in first copper plate 117
Between second copper plate 177.
4th step, referring to Fig. 10, pressure makes first sub-circuit board 11 pass through the adhesive-layer 14 and described second
Sub-circuit board 17 bonds, and the conducting particles 141 punctures the adhesive-layer 14 and pressure-rupturable, the first line figure 115
It is electrically connected with second line pattern 175 by the conducting particles 141 ruptured in the adhesive-layer 14 and forms the circuit
The line pattern of plate 100, the thickness of the line pattern of the circuit board are equal to the first line figure 115, the adhesive-layer
14 and the thickness sum of second line pattern 175.
In present embodiment, the first native copper layer 116 of the first line figure 115 and second line pattern 175
The second native copper layer 176 be electrically connected with by the conducting particles 141 in the adhesive-layer 14.Due to leading in the adhesive-layer 14
Charged particle 141 is electrically independent between each other, therefore, will not cause short circuit between circuit.
5th step, refers to Figure 11, the first welding resisting layer 18 is formed on first sub-circuit board 11 and described second
The second welding resisting layer 19 is formed on sub-circuit board 17.
First welding resisting layer 18 covers first dielectric layer 111 and part the first line figure 115.Described
One welding resisting layer 18 offers opening 181.The part first line figure 115 exposes from the opening 181 to be electrically connected
Pad 182.In present embodiment, first welding resisting layer 18 covers second surface 113 and the part institute of first dielectric layer 111
The first copper plate 117 is stated, and part first copper plate 117 exposes from the opening 181.Second welding resisting layer 19 covers
Second dielectric layer 171 and second line pattern 175.In present embodiment, second welding resisting layer 19 covers described
4th surface 173 of the second dielectric layer 171 and second copper plate 177.
It is appreciated that first sub-circuit board 11 is set to pass through the adhesive-layer 14 and second sub-circuit board in pressure
After 17 bond, and the first welding resisting layer 18 and the shape on second sub-circuit board 17 are formed on first sub-circuit board 11
Into before the second welding resisting layer 19, in addition to formed on first sub-circuit board 11 or second sub-circuit board 17 and alternately glued
The multiple sub-circuit boards and multiple adhesive-layers 14 of knot.The structure and the structure of the first sub-circuit board 11 of each sub-circuit board
It is identical.The native copper layer or copper plate of two neighboring sub-circuit board are oppositely arranged to be bonded by the adhesive-layer 14, and by described
Conducting particles 141 in adhesive-layer 14 is electrically connected with.
Compared to prior art, circuit board and circuit board manufacturing method provided by the invention, due to first sub-circuit
Plate includes first line figure, and second sub-circuit board includes the second line pattern corresponding with the first line figure,
It so may be such that the line-spacing of the circuit board is certain, and the first line figure passes through adhesive-layer with second line pattern
Bond, and be electrically connected with by conducting particles in adhesive-layer, because first sub-circuit board and the second sub-circuit board can be
Completed under the limitation of the making precision of prior art, in this way, the line of the circuit board can be caused while etching is avoided not to the utmost
Thickness increase, so as to further increase the thick ratio with line-spacing of the line of the circuit board.
In addition, the first native copper layer is by the way that the adhesive-layer and the second native copper layer be cohesive or first copper plate
Bonded by the adhesive-layer and second copper plate, may be such that the warp direction of circuit board is consistent, avoid because of warp direction
It is inconsistent and cause circuit board product stability reduce the problem of.
It is understood that for the person of ordinary skill of the art, it can be conceived with the technique according to the invention and done
Go out other various corresponding changes and deformation, and all these changes and deformation should all belong to the protection model of the claims in the present invention
Enclose.
Claims (10)
1. a kind of circuit board, including the first sub-circuit board and pass through the second son electricity that adhesive-layer bonds with first sub-circuit board
Road plate, first sub-circuit board include first line figure, and second sub-circuit board includes and the first line figure
Corresponding second line pattern, the adhesive-layer are dispersed with electrically independent conducting particles, and the conducting particles punctures described viscous
Glue-line simultaneously ruptures, and the first line figure is electric by the conducting particles ruptured in the adhesive-layer with second line pattern
Conducting forms the line pattern of the circuit board, the thickness of the line pattern of the circuit board be equal to the first line figure,
The thickness sum of the adhesive-layer and second line pattern.
2. circuit board as claimed in claim 1, it is characterised in that the first line figure includes the first native copper layer, described
Second line pattern includes the second native copper layer, and the second native copper layer is by puncturing the conduction of the adhesive-layer in the adhesive-layer
Particle is electrically connected with the first native copper layer.
3. circuit board as claimed in claim 1, it is characterised in that the first line figure includes the first copper plate, described
Second line pattern includes the second copper plate, and second copper plate is by puncturing the conduction of the adhesive-layer in the adhesive-layer
Particle is electrically connected with first copper plate.
4. circuit board as claimed in claim 1, it is characterised in that first sub-circuit board also includes the first dielectric layer, institute
State first line figure to be embedded in first dielectric layer, the opposite both sides of the first line figure are situated between from described first
Electric layer is exposed, and second sub-circuit board also includes the second dielectric layer, and second line pattern is embedded in second dielectric
In layer, the opposite both sides of second line pattern are exposed from second dielectric layer.
5. circuit board as claimed in claim 1, it is characterised in that the circuit board is also anti-welding including the first welding resisting layer and second
Layer, first welding resisting layer are formed on the first line figure, and second welding resisting layer is formed in second line map
In shape.
6. a kind of circuit board manufacturing method, including step：
Making the first sub-circuit board and the second sub-circuit board, first sub-circuit board includes first line figure, and described second
Sub-circuit board includes the second line pattern corresponding with the first line figure；
Adhesive-layer is provided, electrically independent conducting particles is dispersed with the adhesive-layer；
First sub-circuit board, the adhesive-layer and second sub-circuit board are stacked, the adhesive-layer is arranged on described
Between one sub-circuit board and second sub-circuit board, the first line figure is corresponding with second line pattern；And
Pressure makes first sub-circuit board be bonded by the adhesive-layer and second sub-circuit board, the conducting particles thorn
The adhesive-layer and pressure-rupturable are broken, the first line figure passes through broken in the adhesive-layer with second line pattern
The conducting particles split is electrically connected with the line pattern to form the circuit board, and the thickness of the line pattern of the circuit board is equal to institute
State the thickness sum of first line figure, the adhesive-layer and second line pattern.
7. circuit board manufacturing method as claimed in claim 6, it is characterised in that first sub-circuit board also includes first and is situated between
Electric layer, the first line figure are embedded in first dielectric layer, and the opposite both sides of the first line figure are from institute
State the first dielectric layer to expose, institute's first line figure includes the first native copper layer and the first copper plate, second sub-circuit
Plate also includes the second dielectric layer, and second line pattern is embedded in second dielectric layer, second line pattern
Opposite both sides are exposed from second dielectric layer, and second line pattern includes the second native copper layer and the second copper plate.
8. circuit board manufacturing method as claimed in claim 7, it is characterised in that make first sub-circuit board and the second son
Circuit board includes step：
Substrate, including copper foil layer are provided；
The copper foil layer is formed to the native copper layer of line pattern through image transfer and etching process；
Photosensitive material layer is formed in the native copper layer of the line pattern, the photosensitive material layer covers the native copper of the line pattern
Layer simultaneously fills the space between the line pattern native copper layer；
The photosensitive material layer is made to form dielectric layer, and removed described in part corresponding with the native copper layer of the line pattern
Photosensitive material layer, to expose the native copper layer of the line pattern；And
Electrodeposited coating is formed on the native copper layer of the line pattern exposed, obtains the line pattern.
9. circuit board manufacturing method as claimed in claim 7, it is characterised in that stack first sub-circuit board, described viscous
When glue-line and second sub-circuit board, the first native copper layer and the second native copper layer are oppositely arranged, the adhesive-layer
It is folded between the first native copper layer and the second native copper layer.
10. circuit board manufacturing method as claimed in claim 7, it is characterised in that stack first sub-circuit board, described viscous
When glue-line and second sub-circuit board, the first native copper layer and the second native copper layer are oppositely arranged, the adhesive-layer
It is folded between the first native copper layer and the second native copper layer.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610398874.6A CN107484334A (en) | 2016-06-07 | 2016-06-07 | Circuit board and circuit board manufacturing method |
| TW105119482A TWI637666B (en) | 2016-06-07 | 2016-06-21 | Printed circuit board and mthod for manufacturing same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610398874.6A CN107484334A (en) | 2016-06-07 | 2016-06-07 | Circuit board and circuit board manufacturing method |
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| Publication Number | Publication Date |
|---|---|
| CN107484334A true CN107484334A (en) | 2017-12-15 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610398874.6A Pending CN107484334A (en) | 2016-06-07 | 2016-06-07 | Circuit board and circuit board manufacturing method |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN107484334A (en) |
| TW (1) | TWI637666B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109257867A (en) * | 2018-09-11 | 2019-01-22 | 番禺得意精密电子工业有限公司 | circuit board |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110776899B (en) * | 2019-11-26 | 2022-09-13 | 西南石油大学 | High-temperature high-salinity oil reservoir in-situ emulsification and viscosification system and application thereof |
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| US20100243303A1 (en) * | 2006-08-22 | 2010-09-30 | Hitachi Chemical Company, Ltd. | Circuit connecting material, connection structure of circuit member, and method for manufacturing connection structure of circuit member |
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| WO2006067280A1 (en) * | 2004-12-23 | 2006-06-29 | Aspocomp Technology Oy | Conductive pattern, circuit board and their production method |
| CN101835342A (en) * | 2009-03-13 | 2010-09-15 | 住友电气工业株式会社 | The structure and the method and adhesive that connect printed substrate with anisotropic conductivity |
| CN102132636A (en) * | 2009-05-25 | 2011-07-20 | 住友电气工业株式会社 | Electrode structure, wiring body, adhesive connection structure, electronic device, and method for fabricating same |
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Also Published As
| Publication number | Publication date |
|---|---|
| TW201803417A (en) | 2018-01-16 |
| TWI637666B (en) | 2018-10-01 |
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