CN107422772B - A kind of regulated linear power adjustment pipe pressure drop circuit - Google Patents
A kind of regulated linear power adjustment pipe pressure drop circuit Download PDFInfo
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- CN107422772B CN107422772B CN201710600913.0A CN201710600913A CN107422772B CN 107422772 B CN107422772 B CN 107422772B CN 201710600913 A CN201710600913 A CN 201710600913A CN 107422772 B CN107422772 B CN 107422772B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Abstract
The invention discloses a kind of regulated linear power adjustment pipe pressure drop circuits; belong to linear stable field of circuit technology; including error amplifying circuit, current foldback circuit, metal-oxide-semiconductor adjustment circuit and power isolation circuit; metal-oxide-semiconductor adjustment circuit is electrically connected with error amplifying circuit, current foldback circuit and power isolation circuit respectively; current foldback circuit is electrically connected with error amplifying circuit and power isolation circuit respectively, and error amplifying circuit is electrically connected with power isolation circuit.The present invention is using metal-oxide-semiconductor as adjustment pipe; it is made of sample circuit, application condition amplifying circuit and current foldback circuit; use isolated from power technology; make linear power supply adjustment tube voltage drop control in 4V or so; significantly increase raising linear stabilized power supply output adjustable extent; adjustment pipe loss is reduced, extends power tube service life, the precision of adjustable stabilized voltage supply is greatly improved.
Description
Technical field
The present invention relates to a kind of pressure drop circuit, in particular to a kind of regulated linear power adjustment pipe pressure drop circuit belongs to line
Property source of stable pressure field of circuit technology.
Background technique
Linear stabilized power supply has many advantages, such as that ripple is small, noise is low, adjustable range is wide, is widely used in fine measuring instrument instrument
In table, but linear power supply adjustment pipe is generally adjusted with large power triode, and large power triode is in magnifying state, adjustment
The input supply voltage of pipe necessarily is greater than the maximum output voltage of source of stable pressure, when needing high voltage to export, then needs higher
Input supply voltage, therefore when conventional linear source of stable pressure output voltage is lower, just produced in adjustment pipe collector and transmitting interpolar
Raw higher pressure drop, causes pliotron very lossy, seriously affects service efficiency and the service life of adjustment pipe, it requires defeated
Out very wide-voltage range when, adjust pipe degree of regulation and efficiency and be difficult to improve, therefore need a kind of new technical solution to solve
State problem.
Summary of the invention
The main object of the present invention is to provide for a kind of regulated linear power adjustment pipe pressure drop circuit, and electricity can be effectively reduced
Path loss consumption, improves power supply output accuracy, extends the service life of circuit.
The purpose of the present invention can reach by using following technical solution:
A kind of regulated linear power adjustment pipe pressure drop circuit, including error amplifying circuit, current foldback circuit, metal-oxide-semiconductor tune
Whole circuit and power isolation circuit, the metal-oxide-semiconductor adjustment circuit respectively with the error amplifying circuit, the current foldback circuit
With the power isolation circuit be electrically connected, the current foldback circuit respectively with the error amplifying circuit and the isolated from power
Circuit electrical connection, the error amplifying circuit are electrically connected with the power isolation circuit.
Further, the metal-oxide-semiconductor adjustment circuit includes metal-oxide-semiconductor Q1, the second triode Q2 and first resistor R1, described
The drain D of metal-oxide-semiconductor Q1 is connect with power vd D, and the grid g of the metal-oxide-semiconductor Q1 passes through the first resistor R1 and the described 2nd 3
The emitter of pole pipe Q2 connects, and the collector of the second triode Q2 is connect with power supply VCC.
Further, the current foldback circuit includes the second triode Q2, third transistor Q3,3rd resistor R3 and the
The base stage of four resistance R4, the third transistor Q3 is connect by the 3rd resistor R3 with the source S of metal-oxide-semiconductor Q1, and described
The emitter of three triode Q3 is connect with the 4th resistance R4, the collector of the third transistor Q3 and the two or three pole
The base stage of pipe Q2 connects.
Further, the error amplifying circuit includes multiple triodes and multiple resistance, and the triode is by the four or three
Pole pipe Q4 and the 5th triode Q5 composition, the resistance is by the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance
R9 and the tenth resistance R10 composition.
Further, the tenth resistance R10 is connected to the base stage and the third transistor of the 5th triode Q5
Between the emitter of Q3；The emitter of the 5th triode Q5 connects with the 8th resistance R8 and the 9th resistance R9 respectively
It connects；One end of the 8th resistance R8 connects power supply VCC, the floating ground of a termination of the 9th resistance R9；5th triode
The collector of Q5 is connect with the base stage of the 4th triode Q4；The emitter of the 4th triode Q4 is respectively with the described 6th
Resistance R6 and the 5th resistance R5 connection, the collector of the 4th triode Q4 respectively with power supply VCC and the 7th resistance R7
Connection, the base stage of the 4th triode Q4 are connect with the other end of the 7th resistance R7.
Further, the power isolation circuit includes first capacitor C1, the first inductance L1, the second inductance L2, third electricity
Sense L3 and isolated from power chip U1,1 foot of the isolated from power chip U1 are connect with power supply and the first capacitor C1 respectively, institute
2 feet and 3 feet for stating isolated from power chip U1 are connect with the first capacitor C1 and the first inductance L1 respectively, the power supply
7 feet of isolating chip U1 are connect with the second inductance L2, and the second inductance L2 is connect with power supply VCC, the isolated from power
5 feet of chip U1 are connect with the third inductance L3, and the third inductance L3 connects floating ground, 4 feet of the isolated from power chip U1
It is hanging with 6 feet.
Further, the metal-oxide-semiconductor Q1 is N-channel enhancement mode FET, the second triode Q2, the described 3rd 3
Pole pipe Q3, the 4th triode Q4 and the 5th triode Q5 are NPN type triode.
Further, the isolated from power chip U1 is TDK-Lambda isolated power supply chip.
Further, the electric potential relation formula between the source S and grid g of the metal-oxide-semiconductor Q1 is fixed according to kirchhoff electric current
Lv Ke get:
Vg-Vs=Vgs (2)
Wherein: Vgs is to open threshold voltage, and Vs is sampling current potential, and Vg is metal-oxide-semiconductor Q1 grid potential, and Vbe is triode base
The pressure drop of pole and transmitting interpolar.
Further, the relationship of Vgs and Vs can be obtained by formula (1) and formula (2) formula, in initialization circuit the parameter of resistance and every
From power Vcc, just can obtain:
Metal-oxide-semiconductor Q1 is in adjustment switch state at work in circuit, and the metal-oxide-semiconductor is high speed powerMOS pipe, and Vgs is
Threshold voltage is opened, Vgs is 2~4V, and the metal-oxide-semiconductor source electrode is 4V to the current potential Vs on floating ground.
Advantageous effects of the invention: regulated linear power adjustment pipe pressure drop circuit according to the invention, the present invention mention
The regulated linear power adjustment pipe pressure drop circuit of confession realizes linear voltage stabilization electricity compared with prior art, the present invention the advantage is that
Source adjustment manages upper pressure drop and is maintained at+4V, therefore the working efficiency of linear power supply adjustment pipe can be improved, and reduces adjustment pipe loss,
Extend service life of the large power triode as adjustment pipe, it is effective to improve output voltage adjustable extent, to improve output
Voltage precision.
Detailed description of the invention
Fig. 1 is the adjustment tube voltage of a preferred embodiment of regulated linear power adjustment pipe pressure drop circuit according to the invention
Electric operation control circuit figure；
Fig. 2 is the isolated from power electricity of a preferred embodiment of regulated linear power adjustment pipe pressure drop circuit according to the invention
Lu Tu, the embodiment can be embodiment identical with Fig. 1, be also possible to the embodiment different from Fig. 1.
Specific embodiment
To make the more clear and clear technical solution of the present invention of those skilled in the art, below with reference to examples and drawings
The present invention is described in further detail, and embodiments of the present invention are not limited thereto.
As depicted in figs. 1 and 2, a kind of regulated linear power adjustment pipe pressure drop circuit provided in this embodiment, including error
Amplifying circuit, current foldback circuit, metal-oxide-semiconductor adjustment circuit and power isolation circuit, the metal-oxide-semiconductor adjustment circuit respectively with it is described
Error amplifying circuit, the current foldback circuit and the power isolation circuit electrical connection, the current foldback circuit respectively with
The error amplifying circuit and power isolation circuit electrical connection, the error amplifying circuit and power isolation circuit electricity
Connection.
Further, in the present embodiment, as shown in Figure 1, the metal-oxide-semiconductor adjustment circuit includes metal-oxide-semiconductor Q1, the two or three pole
Pipe Q2 and first resistor R1, the drain D of the metal-oxide-semiconductor Q1 are connect with power vd D, and the grid g of the metal-oxide-semiconductor Q1 passes through described the
One resistance R1 is connect with the emitter of the second triode Q2, and the collector of the second triode Q2 is connect with power supply VCC.
Further, in the present embodiment, as shown in Figure 1, the current foldback circuit includes the second triode Q2, third
The base stage of triode Q3,3rd resistor R3 and the 4th resistance R4, the third transistor Q3 pass through the 3rd resistor R3 and MOS
The source S of pipe Q1 connects, and the emitter of the third transistor Q3 is connect with the 4th resistance R4, the third transistor Q3
Collector connect with the base stage of the second triode Q2.
Further, in the present embodiment, as shown in Figure 1, the error amplifying circuit includes multiple triodes and multiple
Resistance, the triode are made of the 4th triode Q4 and the 5th triode Q5, and the resistance is by the 6th resistance R6, the 7th resistance
R7, the 8th resistance R8, the 9th resistance R9 and the tenth resistance R10 composition.
Further, in the present embodiment, as shown in Figure 1, the tenth resistance R10 is connected to the 5th triode Q5
Base stage and the third transistor Q3 emitter between；The emitter of the 5th triode Q5 is electric with the described 8th respectively
Resistance R8 is connected with the 9th resistance R9；One end of the 8th resistance R8 connects power supply VCC, one end of the 9th resistance R9
Connect floating ground；The collector of the 5th triode Q5 is connect with the base stage of the 4th triode Q4；The 4th triode Q4
Emitter connect respectively with the 6th resistance R6 and the 5th resistance R5, the collector of the 4th triode Q4 respectively with electricity
Source VCC is connected with the 7th resistance R7, and the base stage of the 4th triode Q4 is connect with the other end of the 7th resistance R7.
Further, in the present embodiment, as shown in Fig. 2, the power isolation circuit includes first capacitor C1, the first electricity
Feel L1, the second inductance L2, third inductance L3 and isolated from power chip U1,1 foot of the isolated from power chip U1 respectively with power supply
Connected with the first capacitor C1,2 feet and 3 feet of the isolated from power chip U1 respectively with the first capacitor C1 and described
First inductance L1 connection, 7 feet of the isolated from power chip U1 are connect with the second inductance L2, the second inductance L2 and electricity
Source VCC connection, 5 feet of the isolated from power chip U1 are connect with the third inductance L3, and the third inductance L3 meets floating ground, institute
4 feet and 6 feet for stating isolated from power chip U1 are hanging.
Further, in the present embodiment, described as shown in Figure 1, the metal-oxide-semiconductor Q1 is N-channel enhancement mode FET
Second triode Q2, the third transistor Q3, the 4th triode Q4 and the 5th triode Q5 are three pole of NPN type
Pipe；The isolated from power chip U1 is TDK-Lambda isolated power supply chip.
Further, in the present embodiment, the electric potential relation formula between the source S and grid g of the metal-oxide-semiconductor Q1 is according to base
You can obtain Hough current law:
Vg-Vs=Vgs (2)
Wherein: Vgs is to open threshold voltage, and Vs is sampling current potential, and Vg is metal-oxide-semiconductor Q1 grid potential, and Vbe is triode base
The pressure drop of pole and transmitting interpolar.
The relationship of Vgs and Vs can be obtained by formula (1) and formula (2) formula, the parameter and isolated power supply of resistance in initialization circuit
Vcc just can be obtained:
Metal-oxide-semiconductor Q1 is in adjustment switch state at work in circuit, and the metal-oxide-semiconductor is high speed powerMOS pipe, and Vgs is
Threshold voltage is opened, Vgs is 2~4V, and the metal-oxide-semiconductor source electrode is about 4V to the current potential Vs on floating ground.
Further, in the present embodiment, as shown in Figure 1, by isolated power supply chip U1 and first capacitor C1, the first inductance
The isolated power supply circuit that L1, the second inductance L2, third inductance L3 are formed will be converted into the earth float power+5V to floating ground
Power Vcc floatingly is connected with adjustment pipe output Vout, that is, the output end of final power supply；The third transistor Q3
Current foldback circuit, when metal-oxide-semiconductor Q1 source current increases to protection value, the 4th are constituted with 3rd resistor R3 and the 4th resistance R4
Voltage on resistance R4 increases to Vbe, keeps third transistor Q3 open-minded, the second triode Q2 base potential is dragged down, to also draw
Low metal-oxide-semiconductor Q1 grid potential controls its source S output voltage, completes overcurrent protection.
Further, in the present embodiment, as shown in Figure 1, the sampling and error amplifying circuit, by power Vcc and
The total radio amplifier that five triode Q5, the 7th resistance R7, the 9th resistance R9 and the tenth resistance R10 are constituted；Power Vcc and the 4th
Triode Q4 and the 6th resistance R6 constitutes emitter follower circuit；8th resistance R8 connection and power supply VCC and the 5th triode Q5 are sent out
Between emitter-base bandgap grading, as negative-feedback circuit；Sampling current potential Vs is inputted through the tenth resistance R10, and it is Vg+Vbe that follower, which exports current potential,
Further, the present embodiment can be avoided very high voltage-to-ground VDD, the tune being applied directly in circuit diagram 1
Whole circuit both ends, and effectively realize and the adjustment circuit both end voltage of linear stabilized power supply is controlled into certain value and not with output
Voltage and current changes, and adjustment circuit is that linear power supply realizes output adjustment partial circuit in circuit diagram 1 of the present invention.
In conclusion in the present embodiment, according to the regulated linear power adjustment pipe pressure drop circuit of the present embodiment, this implementation
The regulated linear power adjustment pipe pressure drop circuit that example provides, compared with prior art, the present invention the advantage is that realization is linear steady
Voltage source adjustment manages upper pressure drop and is maintained at+4V, therefore the working efficiency of linear power supply adjustment pipe can be improved, and reduces adjustment pipe damage
Consumption extends service life of the large power triode as adjustment pipe, effective to improve output voltage adjustable extent, to improve defeated
Voltage precision out.
The above, further embodiment only of the present invention, but scope of protection of the present invention is not limited thereto, and it is any
Within the scope of the present disclosure, according to the technique and scheme of the present invention and its design adds those familiar with the art
With equivalent substitution or change, protection scope of the present invention is belonged to.
Claims (3)
1. a kind of regulated linear power adjustment pipe pressure drop circuit, it is characterised in that: including error amplifying circuit, overcurrent protection electricity
Road, metal-oxide-semiconductor adjustment circuit and power isolation circuit, the metal-oxide-semiconductor adjustment circuit respectively with the error amplifying circuit, the mistake
Stream protection circuit and the power isolation circuit electrical connection, the current foldback circuit respectively with the error amplifying circuit and institute
Power isolation circuit electrical connection is stated, the error amplifying circuit is electrically connected with the power isolation circuit, the metal-oxide-semiconductor adjustment electricity
Road includes metal-oxide-semiconductor Q1, the second triode Q2 and first resistor R1, and the drain D of the metal-oxide-semiconductor Q1 is connect with power vd D, described
The grid g of metal-oxide-semiconductor Q1 is connect by the first resistor R1 with the emitter of the second triode Q2, second triode
The collector of Q2 is connect with power supply VCC, and the current foldback circuit includes the second triode Q2, third transistor Q3, third electricity
R3 and the 4th resistance R4 is hindered, the base stage of the third transistor Q3 is connected by the source S of the 3rd resistor R3 and metal-oxide-semiconductor Q1
It connects, the emitter of the third transistor Q3 is connect with the 4th resistance R4, the collector of the third transistor Q3 and institute
The base stage connection of the second triode Q2 is stated, the error amplifying circuit includes multiple triodes and multiple resistance, the triode
Be made of the 4th triode Q4 and the 5th triode Q5, the resistance by the 6th resistance R6, the 7th resistance R7, the 8th resistance R8,
9th resistance R9 and the tenth resistance R10 composition, the tenth resistance R10 be connected to the base stage of the 5th triode Q5 with it is described
Between the emitter of third transistor Q3；The emitter of the 5th triode Q5 respectively with the 8th resistance R8 and described
Nine resistance R9 connections；One end of the 8th resistance R8 connects power supply VCC, the floating ground of a termination of the 9th resistance R9；It is described
The collector of 5th triode Q5 is connect with the base stage of the 4th triode Q4；The emitter of the 4th triode Q4 is distinguished
Connect with the 6th resistance R6 and the 5th resistance R5, the collector of the 4th triode Q4 respectively with power supply VCC and described
7th resistance R7 connection, the base stage of the 4th triode Q4 are connect with the other end of the 7th resistance R7, the metal-oxide-semiconductor Q1
For N-channel enhancement mode FET, the second triode Q2, the third transistor Q3, the 4th triode Q4 and institute
Stating the 5th triode Q5 is NPN type triode, and the electric potential relation formula between the source S and grid g of the metal-oxide-semiconductor Q1 is according to base
You can obtain Hough current law:
Vg-Vs=Vgs (2)
Wherein: Vgs be open threshold voltage, Vs be sampling current potential, Vg be metal-oxide-semiconductor Q1 grid potential, Vbe be transistor base with
The pressure drop for emitting interpolar, the relationship of Vgs and Vs can be obtained by formula (1) and formula (2) formula, the parameter and isolation of resistance in initialization circuit
Power Vcc arrives:
Metal-oxide-semiconductor Q1 is in adjustment switch state at work in circuit, and the metal-oxide-semiconductor is high speed
PowerMOS pipe, Vgs are to open threshold voltage, and Vgs is 2~4V, and the metal-oxide-semiconductor source electrode is 4V to the current potential Vs on floating ground.
2. a kind of regulated linear power adjustment pipe pressure drop circuit according to claim 1, it is characterised in that: the power supply every
It include first capacitor C1, the first inductance L1, the second inductance L2, third inductance L3 and isolated from power chip U1, the electricity from circuit
The input pin 1 of source isolating chip U1 is connect with power supply and the first capacitor C1 respectively, and the isolated from power chip U1's answers
Position input pin 2 and input pin 3 are connect with the first capacitor C1 and the first inductance L1 respectively, the isolated from power
The output pin 7 of chip U1 is connect with the second inductance L2, and the second inductance L2 is connect with power supply VCC, the power supply every
The output pin 5 of off-chip piece U1 is connect with the third inductance L3, and the third inductance L3 connects floating ground, the isolated from power chip
The empty foot 4 and adjustable output pin 6 of U1 is hanging.
3. a kind of regulated linear power adjustment pipe pressure drop circuit according to claim 1, it is characterised in that: the power supply every
Off-chip piece U1 is TDK-Lambda isolated power supply chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710600913.0A CN107422772B (en) | 2017-07-21 | 2017-07-21 | A kind of regulated linear power adjustment pipe pressure drop circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710600913.0A CN107422772B (en) | 2017-07-21 | 2017-07-21 | A kind of regulated linear power adjustment pipe pressure drop circuit |
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| Publication Number | Publication Date |
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| CN107422772A CN107422772A (en) | 2017-12-01 |
| CN107422772B true CN107422772B (en) | 2019-09-10 |
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| CN201710600913.0A Active CN107422772B (en) | 2017-07-21 | 2017-07-21 | A kind of regulated linear power adjustment pipe pressure drop circuit |
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Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN100589058C (en) * | 2007-12-27 | 2010-02-10 | 北京中星微电子有限公司 | Current limitation circuit as well as voltage regulator and DC-DC converter including the same |
| CN202043075U (en) * | 2011-05-20 | 2011-11-16 | 四川九洲电器集团有限责任公司 | Back kicking prevention transistor-transistor logic (TTL) signal amplification circuit |
| CN202887038U (en) * | 2012-09-17 | 2013-04-17 | 江苏国石半导体有限公司 | Linear voltage regulator for frequency compensation |
| CN203204489U (en) * | 2013-04-26 | 2013-09-18 | 无锡中星微电子有限公司 | Low-dropout regulator with multi-power input |
| CN104122924B (en) * | 2014-07-18 | 2016-08-24 | 苏州华兴源创电子科技有限公司 | A kind of switching mode mu balanced circuit and the constant pressure and flow comprising this circuit produce circuit |
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Effective date of registration: 20230111 Address after: No. 1, Xinzhu Road, Xinbei District, Changzhou City, Jiangsu Province, 213002 Patentee after: CHANGZHOU TONGHUI ELECTRONICS Co.,Ltd. Address before: 213001 No. 1801 Wu Cheng Road, Changzhou, Jiangsu Patentee before: JIANGSU University OF TECHNOLOGY |