CN107393908A - Mos gate oxygen applied to chip device test cell protects system and method - Google Patents
Mos gate oxygen applied to chip device test cell protects system and method Download PDFInfo
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- CN107393908A CN107393908A CN201710773888.6A CN201710773888A CN107393908A CN 107393908 A CN107393908 A CN 107393908A CN 201710773888 A CN201710773888 A CN 201710773888A CN 107393908 A CN107393908 A CN 107393908A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/62—Protection against overvoltage, e.g. fuses, shunts
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2644—Adaptations of individual semiconductor devices to facilitate the testing thereof
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- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Semiconductor Integrated Circuits (AREA)
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Abstract
The present invention discloses a kind of mos gate oxygen applied to chip device test cell and protects system, including electric fuse, electric fuse one end to be connected with the grid of MOS device to be protected, and the other end is connected with protection diode.Before WAT tests; by the grid that predeterminated voltage is put on to MOS device to be protected; fuse electric fuse; disconnect the connection between MOS device grid to be protected and protection diode; due to there is no annexation between protection diode and MOS device to be protected; thus protection diode will no longer limit the voltage applied on MOS device grid to be protected, malleation or negative pressure can directly be put on to the grid of MOS device to be protected, and carry out the campaign.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of mos gate oxygen applied to chip device test cell
Protect system and method.
Background technology
In semiconductor process, it will usually some fixed positions on wafer set test cell (Test Key,
TK), so as to during semiconductor is manufactured, by carrying out wafer acceptance testing (Wafer to above-mentioned test cell
Acceptance Test, WAT), obtain WAT test electrical parameters, and the electrical parameter obtained in being tested according to above-mentioned WAT, monitoring half
Whether each several part manufacture craft reaches corresponding requirement in conductor production process.
During semiconductor is manufactured, the Plsma etch techniques of last part technology can produce largely removable electric charge, this
A little electric charges can be gathered on the gate of MOS device by metal wire due to antenna effect, when gathering a certain amount of can puncture even
Mos gate oxygen is damaged, in order to protect the grid oxygen of the device under test, typically one protection two of grid (gate) series connection in MOS device
Pole pipe (protection diode).
However, it is necessary to apply negative pressure to the grid of nmos device in some tests, but due to the grid of MOS device
It is in series with protection diode, thus limits the voltage applied to nmos device grid and be only positive voltage.Similarly, at some
, it is necessary to apply malleation to the grid of PMOS device in test, also due to limited by the protection diode being attached thereto, it is right
The voltage that the grid of the PMOS device applies is only negative voltage.Therefore, it is of the prior art to be applied to chip device test list
The mos gate oxygen protection system of member can not realize above-mentioned experiment.
The content of the invention
In order to solve above technical problem present in prior art, the invention provides one kind to be applied to device and circuit
The mos gate oxygen protection system of test cell, can realize and apply negative pressure to the grid of nmos device in test process, to PMOS
Device applies malleation, to realize the campaign.
The present invention provides a kind of mos gate oxygen applied to chip device test cell and protects system, it is characterised in that
During wafer acceptance testing WAT, the system includes：Electric fuse；
The first end of the electric fuse is connected with the grid of MOS device to be protected, and the second end of the electric fuse is with protecting
Shield diode is connected.
Optionally, the MOS device to be protected is nmos device.
Optionally, the second end of the electric fuse is connected with the negative pole of the protection diode.
Optionally, the MOS device to be protected is PMOS device.
Optionally, the second end of the electric fuse is connected with the positive pole of the protection diode.
Optionally, the electric fuse is made by first layer metal or second layer metal.
Optionally, it is characterised in that the material of the electric fuse is copper or aluminium.
The invention provides a kind of NMOS grid oxygen guard methods applied to chip device test cell, including：
Body where nmos device to be protected is grounded；
Default negative pressure is put on to the grid of nmos device to be protected, so that the electric fuse fuses；The preset negative
The negative voltage applied when pressure is more than test in the grid of the nmos device to be protected；
The default negative pressure is less than the grid oxic horizon breakdown voltage of the nmos device to be protected.
The invention provides a kind of PMOS grid oxygen guard methods applied to chip device test cell, including：
Body where PMOS device to be protected is grounded；
Default malleation is put on to the grid of PMOS device to be protected, so that the electric fuse fuses；It is described to preset just
The positive voltage applied when pressure is more than test in the grid of the PMOS device to be protected；
The default malleation is less than the grid oxic horizon breakdown voltage of the PMOS device to be protected.
Compared with prior art, the present invention at least has advantages below：
Mos gate oxygen provided by the invention applied to chip device test cell protects system, including electric fuse, electric fuse
One end is connected with the grid of MOS device to be protected, and the other end is connected with protection diode.Before WAT tests, by that will preset
Voltage puts on the grid of MOS device to be protected, and fuse electric fuse, disconnects MOS device grid to be protected and two poles of protection
Connection between pipe, due to not having annexation between protection diode and MOS device to be protected, thus protection diode will
The voltage applied on MOS device grid to be protected is no longer limited, directly can be put on malleation or negative pressure to be protected
The grid of MOS device, and carry out the campaign.
Brief description of the drawings
, below will be to embodiment or existing in order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments described in application, for those of ordinary skill in the art, on the premise of not paying creative work,
Other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the structure chart that a kind of mos gate oxygen applied to chip device test cell of the prior art protects system；
Fig. 2 is the structure chart that a kind of mos gate oxygen applied to chip device test cell provided by the invention protects system；
Fig. 3 is the structure that another mos gate oxygen for being applied to chip device test cell provided by the invention protects system
Figure；
Fig. 4 is the structure that another mos gate oxygen for being applied to chip device test cell provided by the invention protects system
Figure；
Fig. 5 is a kind of flow chart of mos gate oxygen guard method applied to chip device test cell provided by the invention；
Fig. 6 be it is provided by the invention another be applied to chip device test cell mos gate oxygen guard method flow
Figure.
Embodiment
In order that those skilled in the art more fully understand the present invention program, below in conjunction with the embodiment of the present invention
Accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only this
Invention part of the embodiment, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art exist
The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
In the prior art in order to protect the grid of MOS device in technical process, two are protected in the gate series of MOS device
Pole pipe, specifically it may refer to shown in Fig. 1, the figure is the schematic diagram that MOS device is protected in technical process.
In the technical process of MOS device, when plasma performs etching, electric charge can be produced, these electric charges are in MOS device
Grid aggregation to a certain extent when, because grid connects many metal levels (metal), it will the titanium dioxide below breakdown grid
Silicon.Therefore, in order to protect the grid of MOS device, in one protection diode of gate series.Plasma meeting in technical process
Luminous, for light irradiation in protection diode, protection diode can produce leakage current, and now protection diode is equivalent to semi-open shape
State, therefore, the electric charge that leakage current will accumulate in grid are guided by protection diode, so as to protect the grid of metal-oxide-semiconductor.
But the protection diode with the gate series of MOS device will produce to the voltage of MOS device grid in the prior art
Raw limitation, i.e. limitation can only apply malleation to the grid of nmos device, apply negative pressure to the grid of PMOS device.
But, it is necessary to apply negative pressure to the grid of nmos device, due to reversely cutting for protection diode in some experiments
Only the characteristic of forward conduction, which limits, puts on the voltage of nmos device grid and is only positive voltage, is applied when in nmos device grid
Protection diode reverse breakdown can be caused by adding during negative pressure.Therefore, the existing mos gate oxygen applied to chip device test cell is protected
Protecting system can not carry out the above-mentioned experiment for applying negative pressure in nmos device grid.
It is similarly, anti-due to protection diode in addition, need to apply malleation to the grid of PMOS device in some experiments
Limited to the characteristic of cut-off forward conduction and put on the voltage of PMOS device grid and be only negative voltage, when in PMOS device grid
When pole applies malleation, protection diode can be caused to puncture.Therefore, the existing mos gate oxygen applied to chip device test cell
Protection system can not carry out the experiment that above-mentioned PMOS device grid applies malleation.
Protection diode is only used for protecting grid in the technical process of metal-oxide-semiconductor, after technical process terminates,
Protection diode does not just work, and therefore, can be disconnected protection diode and grid by the electric fuse that the application provides.
Mos gate oxygen provided by the invention applied to chip device test cell protects system, grid and guarantor in metal-oxide-semiconductor
Connected electric fuse between shield diode.Electric fuse one end is connected with the grid of MOS device to be protected, the other end and protection two
Pole pipe is connected.Before WAT tests, by the way that default negative pressure to be put on to the grid of MOS device to be protected, fuse electric fuse,
The connection between the protection diode of MOS device to be protected is disconnected, due between protection diode and MOS device to be protected
There is no annexation, therefore protection diode will no longer limit the voltage applied on MOS device grid to be protected, Ke Yizhi
The grid that negative pressure or malleation are put on to MOS device to be protected is connect, and carries out the campaign.
Embodiment one
Referring to Fig. 2, the figure is that a kind of mos gate oxygen applied to chip device test cell that the present embodiment provides protects system
The structure chart of system.
This kind is applied to the mos gate oxygen protection system of chip device test cell, including：Electric fuse 201.
The first end of the electric fuse 201 is connected with the grid of MOS device 203 to be protected, and the of the electric fuse 201
Two ends are connected with the protection diode 202.
As shown in figure 1, MOS device 203 to be protected is connected with protection diode 202 by electric fuse 201, in chip system
During making, electric fuse 201 only plays connection function, for connecting MOS device 203 and protection diode 202 to be protected, protects
Shield diode 202 prevents PID from being damaged to MOS device 203 to be protected.
After the completion of chip manufacturing, protection diode 202 needs not continue to protect MOS device 203 to be protected, but existing skill
Still there is annexation between protection diode 202 and MOS device to be protected in art, thus protection diode is to be protected
The voltage that the grid of MOS device is applied is still restricted.
And the resistance to tested person protection system of voltage that the present embodiment provides, MOS device 203 to be protected and protection diode
Between 202, further there is provided electric fuse 201.
Apply negative pressure, or the grid application to PMOS device to be protected when needing the grid to nmos device to be protected
Malleation, when carrying out a series of experiments, first the body of MOS device 203 to be protected is grounded, that is, the body by protection diode
Ground connection, predeterminated voltage is put on the grid of MOS device 203 to be protected, after predeterminated voltage is put on into grid, protection two
Pole pipe 202 turns on so that larger electric current will be produced between the grid and ground connection body of MOS device 203 to be protected, due to electricity
Fuse 201 is on the path, and therefore, electric fuse 201 will be by the current fusing.Fuse electric fuse 201, that is, is disconnected protection two
Connection between pole pipe 202 and MOS device to be protected.And then when needs apply to the grid of nmos device to be protected
The experiment of negative pressure, or to protection PMOS device grid apply malleation when, wait to protect because protection diode 202 no longer limits
The grid voltage of the MOS device of shield, therefore, it can directly carry out applying negative pressure or just be pressed on the grid of MOS device to be protected.
It should be noted that the negative electricity applied when default negative pressure should be greater than test in the grid of nmos device to be protected
Pressure, and the default negative pressure should be less than the grid oxic horizon breakdown voltage of nmos device to be protected, to prevent the default negative pressure
Puncture nmos device to be protected.Similarly, default malleation should be greater than test when PMOS device to be protected grid apply
Positive voltage, and the default malleation should be less than the grid oxic horizon breakdown voltage of PMOS device to be protected, to prevent that this is default
Malleation punctures PMOS device to be protected.
, can also be by the it should be noted that electric fuse in the present embodiment can be to be fabricated by first layer metal
Two layers of metal are fabricated, and do not do any restriction herein.
It should be noted that the material of the electric fuse 201 in the present embodiment can be copper, or aluminium, can be with root
Other conductive materials are chosen according to being actually needed, do not do any restriction herein.
The mos gate oxygen applied to chip device test cell that the present embodiment provides protects system, including electric fuse, electric smelting
Silk one end is connected with the grid of MOS device to be protected, and the other end is connected with protection diode.Before WAT tests, by by advance
If voltage puts on the grid of MOS device to be protected, fuse electric fuse, disconnects MOS device grid to be protected and protection two
Connection between pole pipe, due to not having annexation, thus protection diode between protection diode and MOS device to be protected
The voltage applied on MOS device grid to be protected will be no longer limited, directly can put on negative pressure or malleation to be protected
The grid of MOS device, and carry out a series of experiments.
Embodiment two
Referring to Fig. 3, the mos gate oxygen that chip device test cell is applied to for the another kind that the present embodiment provides protects system
Structure chart.
MOS device 303 to be protected in the present embodiment is nmos device.
The first end of electric fuse 301 is connected with the grid of nmos device to be protected, the second end and the protection of electric fuse 301
The negative pole of diode 302 is connected.
When MOS device 303 to be protected is nmos device, the body of the nmos device should be p-well.And due to waiting to protect
The MOS device of shield is nmos device, and the grid of the nmos device should be connected with the negative pole of protection diode 302.Due to this reality
Applying the grid of example nmos device to be protected needs to be connected with protection diode 302 by electric fuse 301, therefore, electric fuse 301
One end be connected to the grid of MOS device to be protected, the other end is connected to the negative pole of protection diode 302.
In chip manufacturing proces, the grid of nmos device 303 to be protected passes through electric fuse 301 and protection diode
302 negative pole connection, protection diode 302 prevent PID from being damaged to nmos device to be protected.
After the completion of chip manufacturing, protection diode 302 needs not continue to protect nmos device to be protected.If
Negative pressure is applied to the grid of nmos device 303 to be protected, carry out a series of experiments, then need to disconnect NMOS devices to be protected
Connection between part 303 and protection diode 302.
Specifically, the body p-well (PW) of nmos device 303 to be protected is grounded, that is to say, that the p-well of protection diode
(PW) it is grounded, default negative pressure is applied with the grid of nmos device 303 to be protected, this being preset into negative pressure and puts on grid
Afterwards, the grid of nmos device 303 to be protected and ground connection p-well (PW) between due to protection diode turn on can produce it is larger
Electric current, the electric current will fuse the electric fuse 301 on the path, so disconnect the negative pole of protection diode 302 with it is to be protected
The grid of nmos device 303 between connection.
When needing the grid to nmos device 303 to be protected to apply negative pressure, when carrying out a series of experiments, will directly can bear
Pressure is put on the grid of the nmos device, it is no longer necessary to considers the limitation of protection diode 302.
It should be noted that the negative electricity applied when default negative pressure should be greater than test in the grid of nmos device to be protected
Pressure, and the default negative pressure should be less than the grid oxic horizon breakdown voltage of nmos device to be protected, to prevent the default negative pressure
Puncture nmos device to be protected.
The mos gate oxygen applied to chip device test cell that the present embodiment provides protects system, to be applied to be protected
MOS device be nmos device situation, in that case, by fusing be connected to nmos device to be protected and protection two
Electric fuse between pole pipe, the connection between nmos device to be protected and protection diode is disconnected, and then so as to be protected
Nmos device grid apply negative pressure experiment can directly carry out.
Embodiment three
Referring to Fig. 4, another mos gate oxygen for being applied to chip device test cell that the present embodiment provides protects system
Structure chart.
MOS device 403 to be protected in the present embodiment is PMOS device.
The first end of electric fuse 401 is connected with the grid of PMOS device to be protected, the second end and the protection of electric fuse 401
The positive pole of diode 402 is connected.
When MOS device 403 to be protected is PMOS device, the body of the PMOS device should be N traps.And due to waiting to protect
The MOS device of shield is PMOS device, and the grid of the PMOS device should be connected with the positive pole of protection diode 402.Due at this
In embodiment, the grid of PMOS device to be protected needs to be connected with protection diode 402 by electric fuse 401, therefore, electric smelting
One end of silk 401 is connected to the grid of PMOS device to be protected, and the other end is connected to the positive pole of protection diode 402.
In chip manufacturing proces, PMOS device 403 to be protected by electric fuse 401 and protection diode 402 just
Pole connects, and protection diode 402 prevents PID from being damaged to PMOS device 403 to be protected.
After the completion of chip manufacturing, protection diode 402 needs not continue to protect PMOS device to be protected.To
Malleation is applied to the grid of PMOS device 403 to be protected, a series of experiments is carried out, then needs to disconnect PMOS device to be protected
Connection between 403 grid and the positive pole of protection diode 402.
Specifically, the body N traps (NW) of PMOS device 403 to be protected are grounded, that is to say, that the N traps of protection diode
(NW) it is grounded, default malleation is put on the grid of PMOS device 403 to be protected, this is preset into malleation puts on grid
Afterwards, can be produced larger between the grid of PMOS device 403 to be protected and the N traps (NW) being grounded because protection diode turns on
Electric current, the electric current will be fused the electric fuse 401 on the path, and then the positive pole for disconnecting protection diode 402 is protected with waiting
Connection between the PMOS device grid of shield.
, can be directly by just when carrying out a series of experiments when needing the grid to PMOS device 403 to be protected to apply malleation
Pressure is put on the grid of the PMOS device, it is no longer necessary to considers the limitation of protection diode 402.
It should be noted that the negative electricity applied when default malleation should be greater than test in the grid of PMOS device to be protected
Pressure, and the default malleation should be less than the grid oxic horizon breakdown voltage of PMOS device to be protected, to prevent the default malleation
Puncture PMOS device to be protected.
The mos gate oxygen applied to chip device test cell that the present embodiment provides protects system, to be applied to be protected
MOS device be PMOS device situation, in that case, by fusing be connected to PMOS device to be protected grid and
Electric fuse between protection diode positive pole, the connection between PMOS device and protection diode to be protected is disconnected, and then, make
Obtain the experiment that can directly carry out applying malleation to the grid of nmos device to be protected.
Example IV
Referring to Fig. 5, a kind of NMOS grid oxygen guard methods applied to chip device test cell provided for the present embodiment
Flow chart, this kind be applied to chip device test cell the guard method of NMOS grid oxygens be applied to above-described embodiment in application
System is protected in the mos gate oxygen of chip device test cell.
Step 501：Body where nmos device to be protected is grounded.
Body where nmos device to be protected is p-well, and the body where the nmos device to be protected is grounded,
It is exactly to be grounded the p-well where protection diode so that form path between the nmos device and ground to be protected.
Step 502：Default negative pressure is put on to the grid of nmos device to be protected, so that the electric fuse fuses.
Default negative pressure is put on to the grid of nmos device to be protected, due to the body where nmos device to be protected
It is grounded, after applying the negative pressure, protection diode conducting so that the grid of nmos device to be protected is connected institute's shape with body
Into path in flow through larger electric current, and because electric fuse is also in above-mentioned path, therefore, the larger electric current will fuse
The electric fuse.
After electric fuse fusing, the connection between the grid and protection diode of nmos device to be protected correspondingly disconnects.
I.e. protection diode no longer limits the grid voltage of nmos device to be protected, and the grid of NMOS tube to be protected can be applied
Negative voltage, tested accordingly.
It should be noted that grid when default negative pressure should be greater than carrying out negative pressure test in nmos device to be protected applies
Negative voltage, and the default negative pressure should be less than the grid oxic horizon breakdown voltage of nmos device to be protected, to prevent that this is pre-
If negative pressure punctures nmos device to be protected.
The NMOS grid oxygen guard methods applied to chip device test cell that the present embodiment provides, applied to above-mentioned implementation
The mos gate oxygen applied to chip device test cell in example protects system, grid and protection in nmos device to be protected
Electric fuse is set between diode, it is necessary to when applying negative pressure to the grid of nmos device to be protected, can be above-mentioned by fusing
Electric fuse, disconnect the connection between the grid of nmos device to be protected and protection diode.Due to protection diode no longer with
The grid connection of nmos device to be protected, therefore, protection diode no longer limits the grid voltage of nmos device to be protected,
Negative pressure directly can be applied to the grid of nmos device to be protected, to carry out the campaign.
Embodiment five
Referring to Fig. 6, a kind of PMOS grid oxygen guard methods applied to chip device test cell provided for the present embodiment
Flow chart, this kind be applied to chip device test cell the guard method of PMOS grid oxygens be applied to above-described embodiment in application
System is protected in the mos gate oxygen of chip device test cell.
Step 601：Body where PMOS device to be protected is grounded.
Body where PMOS device to be protected is N traps, and the body where the PMOS device to be protected is grounded,
It is exactly to be grounded the N traps where protection diode so that form path between the PMOS device to be protected and ground.
Step 602：Default malleation is put on to the grid of PMOS device to be protected, so that the electric fuse fuses.
Default malleation is put on to the grid of PMOS device to be protected, due to the body where PMOS device to be protected
It is grounded, after applying the malleation, protection diode conducting so that the grid of PMOS device to be protected is connected institute's shape with body
Into path flow through larger electric current, and because electric fuse is also in above-mentioned path, therefore, the larger electric current will fuse should
Electric fuse.
After electric fuse fusing, the connection between the grid and protection diode of PMOS device to be protected correspondingly disconnects.
I.e. protection diode no longer limits the grid voltage of PMOS device to be protected, and the grid of PMOS to be protected can be applied
Positive voltage, tested accordingly.
It should be noted that grid when default malleation should be greater than carrying out positive pressure test in PMOS device to be protected applies
Positive voltage, and the default malleation should be less than the grid oxic horizon breakdown voltage of PMOS device to be protected, to prevent that this is pre-
If malleation punctures PMOS device to be protected.
The PMOS grid oxygen guard methods applied to chip device test cell that the present embodiment provides, applied to above-mentioned implementation
The mos gate oxygen applied to chip device test cell in example protects system, grid and protection in PMOS device to be protected
Electric fuse is set between diode, it is necessary to when applying malleation to the grid of PMOS device to be protected, can be above-mentioned by fusing
Electric fuse, disconnect the connection between the grid of PMOS device to be protected and protection diode.Due to protection diode no longer with
The grid connection of nmos device to be protected, therefore, protection diode no longer limits the grid voltage of nmos device to be protected,
Malleation directly can be applied to the grid of nmos device to be protected, to carry out the campaign.
The above described is only a preferred embodiment of the present invention, any formal limitation not is made to the present invention.Though
So the present invention is disclosed above with preferred embodiment, but is not limited to the present invention.It is any to be familiar with those skilled in the art
Member, without departing from the scope of the technical proposal of the invention, all using the methods and technical content of the disclosure above to the present invention
Technical scheme makes many possible changes and modifications, or is revised as the equivalent embodiment of equivalent variations.Therefore, it is every without departing from
The content of technical solution of the present invention, the technical spirit according to the present invention is to any simple modification made for any of the above embodiments, equivalent
Change and modification, still fall within technical solution of the present invention protection in the range of.
Claims (9)
1. a kind of mos gate oxygen applied to chip device test cell protects system, it is characterised in that is surveyed applied to wafer acceptance
During trying WAT, the system includes：Electric fuse；
The first end of the electric fuse is connected with the grid of MOS device to be protected, the second end and the protection two of the electric fuse
Pole pipe is connected.
2. system according to claim 1, it is characterised in that the MOS device to be protected is nmos device.
3. system according to claim 2, it is characterised in that the second end of the electric fuse and the protection diode
Negative pole is connected.
4. system according to claim 1, it is characterised in that the MOS device to be protected is PMOS device.
5. system according to claim 4, it is characterised in that the second end of the electric fuse and the protection diode
Positive pole is connected.
6. system according to claim 1, it is characterised in that the electric fuse is by first layer metal or second layer metal system
Form.
7. according to the system described in claim any one of 1-6, it is characterised in that the material of the electric fuse is copper or aluminium.
8. a kind of NMOS grid oxygen guard methods applied to chip device test cell, it is characterised in that applied to claim
The mos gate oxygen applied to chip device test cell described in any one of 1-7 protects system, including：
Body where nmos device to be protected is grounded；
Default negative pressure is put on to the grid of nmos device to be protected, so that the electric fuse fuses；The default negative pressure is big
The negative voltage applied when test in the grid of the nmos device to be protected；
The default negative pressure is less than the grid oxic horizon breakdown voltage of the nmos device to be protected.
9. a kind of PMOS grid oxygen guard methods applied to chip device test cell, it is characterised in that applied to claim
The mos gate oxygen applied to chip device test cell described in any one of 1-7 protects system, including：
Body where PMOS device to be protected is grounded；
Default malleation is put on to the grid of PMOS device to be protected, so that the electric fuse fuses；The default malleation is big
The positive voltage applied when test in the grid of the PMOS device to be protected；
The default malleation is less than the grid oxic horizon breakdown voltage of the PMOS device to be protected.
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| CN201710773888.6A CN107393908A (en) | 2017-08-31 | 2017-08-31 | Mos gate oxygen applied to chip device test cell protects system and method |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108398627A (en) * | 2018-02-06 | 2018-08-14 | 珠海市杰理科技股份有限公司 | Chip pin circuit, chip and chip detecting method |
| CN109860150A (en) * | 2019-02-28 | 2019-06-07 | 德淮半导体有限公司 | The test circuit and test method of semiconductor devices |
| CN110364511A (en) * | 2019-07-24 | 2019-10-22 | 德淮半导体有限公司 | Semiconductor device |
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