CN107391411A - A kind of interface circuit based on switch model selection - Google Patents
A kind of interface circuit based on switch model selection Download PDFInfo
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- CN107391411A CN107391411A CN201710492697.2A CN201710492697A CN107391411A CN 107391411 A CN107391411 A CN 107391411A CN 201710492697 A CN201710492697 A CN 201710492697A CN 107391411 A CN107391411 A CN 107391411A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4286—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0002—Serial port, e.g. RS232C
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
Present invention is disclosed a kind of interface circuit based on switch model selection; the interface circuit includes processor MCU, insulation blocking module, pattern gating module, modular converter, bypass protection module, binding post, and processor MCU, insulation blocking module, pattern gating module, modular converter, bypass protection module, binding post are sequentially connected.Interface circuit proposed by the present invention based on switch model selection, can solve the defects of existing equipment interoperability difference, can use any one pattern of RS232/RS485/RS422, practical.Interface circuit of the present invention is low in energy consumption, easy realization, using the chip of low-power consumption, and synchronization only has a kind of conversion chip work of a pattern, and other are in a dormant state, the power consumption index of whole system is had little influence on, solves the problems, such as the electricity shortage of the driving force of bus and system.
Description
Technical field
The invention belongs to serial port communication technology field, is related to a kind of interface circuit, more particularly to one kind is based on switch
The interface circuit of model selection.
Background technology
Because serial communication is simple and practical, it is widely used in each industrial circle, for serial communication, due to existing
The various agreements such as RS232, RS485, RS422, will realize the interconnection of equipment room, and user needs to be equipped with difference according to different agreements
Interface module.
In practical application, there is different degrees of defect in existing implementation method：
(1) existing equipment generally only supports one or both of RS232 interface, RS422 interfaces, RS485 interfaces, leads to
It is poor with property；
(2) due to the influence of the power supply of driving force and system of bus etc., it is sometimes difficult to solve while increase difference
The problem of interface convertor；
(3) existing conversion method is, it is necessary to write specific software control data stream, adds software development and debugging
Difficulty；
(4) toggle switch or wire jumper are set in equipment, it is necessary to open device housings operation, it has not been convenient to field application；
(5) requirement of industry spot adverse circumstances can not be met.
In view of this, nowadays there is an urgent need to design a kind of new interface circuit, to overcome existing for existing interface circuit
Drawbacks described above.
The content of the invention
The technical problems to be solved by the invention are：A kind of interface circuit based on switch model selection is provided, can
Solve the defects of existing equipment interoperability difference, any one pattern of RS232/RS485/RS422 can be used, it is practical.
In order to solve the above technical problems, the present invention adopts the following technical scheme that：
A kind of interface circuit based on switch model selection, the interface circuit include：Processor MCU, isolation are protected
Protect module, pattern gating module, modular converter, bypass protection module, binding post, processor MCU, insulation blocking module, mould
Formula gating module, modular converter, bypass protection module, binding post are sequentially connected；
The insulation blocking module is to by the receiving terminal MCU_RxD and transmitting terminal MCU_ of processor MCU UART interfaces
TxD is corresponded to be connected on the process chip U6 (ADuM1402ARW) of insulation blocking module respectively, and high voltage transient is transferred into isolation connects
On electricity isolated layer in mouthful, due to the high insulaion resistance of separation layer, the surge current of damaging will not be produced, plays protection interface
Effect；
The pattern gating module is to by switching SW, the second chip U2 and the corresponding communication mould of the 3rd chip U3 selections
Formula；Pattern gating module includes switch SW, the second chip U2 and the 3rd chip U3；
When the first pin and the 3rd pin that switch SW turn on, RS232 patterns are selected, make the first chip U1 pinFor high level, pinFor low level, then pin TxOUT and pin RxOUT is enabled, that is, activates the first chip U1, make
Fourth chip U4 pin DE is low level, then RS485 outputs do not enable, fourth chip U4 pinFor high level, then
RS485 is received and not enabled, i.e. fourth chip U4 in a dormant state, while makes fifth chip U5 pin DE be low level, then
RS485 outputs do not enable, i.e. fifth chip U5 is in a dormant state；
When the second pin and the 3rd pin that switch SW turn on, RS422 patterns are selected, make the first chip U1 pinFor low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in
Resting state, the pin DE for making fourth chip U4 are low level, then RS485 outputs do not enable, pinFor low level, then
RS485, which is received, to be enabled, i.e., only activation fourth chip U4 reception enables, while makes fifth chip U5 pin DE be high level,
Then RS485 outputs are enabled, i.e., only activation fifth chip U5 outputs are enabled；
When the 4th pin and the 3rd pin that switch SW turn on, RS485 patterns are selected, make the first chip U1 pinFor low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in
Resting state, make fourth chip U4 pin DE and pinThe output that short circuit receives RS485 jointly enables pin control, i.e.,
Fourth chip U4 is activated, is at half-duplex mode of operation, while makes fifth chip U5 pin DE be low level, then
RS485 outputs do not enable, i.e. fifth chip U5 is in a dormant state；
The modular converter includes the first chip U1, fourth chip U4, fifth chip U5；
In the first chip U1 pinFor high level, pinIn the state of low level, pin TxOUT and draw
Pin RxOUT is enabled；In pinFor low level, pinIn the state of high level, pin TxOUT and pin
RxOUT is not enabled；In pinFor high level, pinIn the state of high level, pin TxOUT is enabled, pin
RxOUT is not enabled；In pinFor low level, pinIn the state of low level, pin TxOUT is not enabled, pin
RxOUT is enabled；
In the state of fourth chip U4 pin DE is high level, RS485 outputs are enabled；In drawing for fourth chip U4
Pin DE is in the state of low level, RS485 outputs does not enable；In fourth chip U4 pinIn the state of high level,
RS485 is received and not enabled；In fourth chip U4 pinIn the state of low level, RS485 receives enabled；
In the state of fifth chip U5 pin DE is high level, RS485 outputs are enabled；In drawing for fifth chip U5
Pin DE is in the state of low level, RS485 outputs does not enable；In fifth chip U5 pinIn the state of high level,
RS485 is received and not enabled；In fifth chip U5 pinIn the state of low level, RS485 receives enabled；
The first order of the bypass protection is protected using GDT, and the second level is protected using TVS, higher obtaining
Relatively low clamp voltage can be obtained while carrying out surge protection grade, decoupling is done in centre using resettable fuse, allows above GDT is more
Easily action, has the function that leakage current；RS422/485 signal output parts have been connected two 20 Ω resistance, make A ends and B
End between bus with being isolated, and the hardware fault of this sample machine would not make the communication of whole bus be affected, RS422/
Plus drawing, B ends add drop-down at 485 signal A ends, and such RXD level is not during RS422/485 buses are sent, i.e. bus suspension
The unique high level of Shi Chengxian, it would not by mistake be interrupted and receive random character, increase stability, RS422/485 Network transmission lines
Top and end should respectively connect 1 120 Ω build-out resistor, to reduce the reflection of transmission signal on circuit；
Increase the common-anode ESD protection chip increase RS232/ of SOT23 encapsulation on RS232/422/485 signal wires
422/485 conversion chip, i.e. the first chip U1, fourth chip U4, fifth chip U5 antistatic capacity.
A kind of interface circuit based on switch model selection, the interface circuit include：Processor MCU, isolation are protected
Protect module, pattern gating module, modular converter, bypass protection module, binding post, processor MCU, insulation blocking module, mould
Formula gating module, modular converter, bypass protection module, binding post are sequentially connected.
As a preferred embodiment of the present invention, the insulation blocking module is to connecing processor MCU UART interfaces
Receiving end MCU_RxD and transmitting terminal MCU_TxD is corresponded to be connected in the process chip of insulation blocking module respectively, and high voltage transient is shifted
On electricity isolated layer into isolating interface, due to the high insulaion resistance of separation layer, the surge current of damaging will not be produced, is played
The effect of protection interface；
As a preferred embodiment of the present invention, the modular converter includes the first chip U1, fourth chip U4, the 5th core
Piece U5；
In the first chip U1 pinFor high level, pinIn the state of low level, pin TxOUT and draw
Pin RxOUT is enabled；In pinFor low level, pinIn the state of high level, pin TxOUT and pin
RxOUT is not enabled；In pinFor high level, pinIn the state of high level, pin TxOUT is enabled, pin
RxOUT is not enabled；In pinFor low level, pinIn the state of low level, pin TxOUT is not enabled, pin
RxOUT is enabled；
In the state of fourth chip U4 pin DE is high level, RS485 outputs are enabled；In drawing for fourth chip U4
Pin DE is in the state of low level, RS485 outputs does not enable；In fourth chip U4 pinIn the state of high level,
RS485 is received and not enabled；In fourth chip U4 pinIn the state of low level, RS485 receives enabled；
In the state of fifth chip U5 pin DE is high level, RS485 outputs are enabled；In drawing for fifth chip U5
Pin DE is in the state of low level, RS485 outputs does not enable；In fifth chip U5 pinIn the state of high level,
RS485 is received and not enabled；In fifth chip U5 pinIn the state of low level, RS485 receives enabled.
As a preferred embodiment of the present invention, the pattern gating module to by switch SW, the second chip U2 and
3rd chip U3 selects corresponding communication mode；Pattern gating module includes switch SW, the second chip U2 and the 3rd chip U3；
When the first pin and the 3rd pin that switch SW turn on, RS232 patterns are selected, make the first chip U1 pinFor high level, pinFor low level, then pin TxOUT and pin RxOUT is enabled, that is, activates the first chip U1, make
Fourth chip U4 pin DE is low level, then RS485 outputs do not enable, fourth chip U4 pinFor high level, then
RS485 is received and not enabled, i.e. fourth chip U4 in a dormant state, while makes fifth chip U5 pin DE be low level, then
RS485 outputs do not enable, i.e. fifth chip U5 is in a dormant state；
When the second pin and the 3rd pin that switch SW turn on, RS422 patterns are selected, make the first chip U1 pinFor low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in
Resting state, the pin DE for making fourth chip U4 are low level, then RS485 outputs do not enable, pinFor low level, then
RS485, which is received, to be enabled, i.e., only activation fourth chip U4 reception enables, while makes fifth chip U5 pin DE be high level,
Then RS485 outputs are enabled, i.e., only activation fifth chip U5 outputs are enabled；
When the 4th pin and the 3rd pin that switch SW turn on, RS485 patterns are selected, make the first chip U1 pinFor low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in
Resting state, make fourth chip U4 pin DE and pinThe output that short circuit receives RS485 jointly enables pin control, i.e.,
Fourth chip U4 is activated, is at half-duplex mode of operation, while makes fifth chip U5 pin DE be low level, then
RS485 outputs do not enable, i.e. fifth chip U5 is in a dormant state.
As a preferred embodiment of the present invention, the first order of the bypass protection is protected using GDT, and the second level is adopted
Protected with TVS, relatively low clamp voltage can be obtained while higher carrying out surge protection grade is obtained, centre uses self- recoverage
Fuse does decoupling, allow above GDT be easier act, have the function that leakage current；RS422/485 signal output parts are connected
Two 20 Ω resistance, make to be isolated between side a and b and bus, the hardware fault of this sample machine would not make entirely always
The communication of line is affected, and plus drawing, B ends add drop-down at RS422/485 signal A ends, and such RXD level is total in RS422/485
Line do not send during, i.e. bus suspension when unique high level is presented, would not by mistake be interrupted and receive random character, increase is stable
Property, the top and end of RS422/485 Network transmission lines should respectively connect 1 120 Ω build-out resistor, be transmitted with reducing on circuit
The reflection of signal；
Increase the common-anode ESD protection chip increase RS232/ of SOT23 encapsulation on RS232/422/485 signal wires
422/485 conversion chip, i.e. the first chip U1, fourth chip U4, fifth chip U5 antistatic capacity.
The beneficial effects of the present invention are：Interface circuit proposed by the present invention based on switch model selection, can be with
Solve the defects of existing equipment interoperability difference, any one pattern of RS232/RS485/RS422 can be used, it is practical.
Interface circuit of the present invention is low in energy consumption, easy realization, and using the chip of low-power consumption, and synchronization only has an one kind
The conversion chip work of pattern, other have little influence on the power consumption index of whole system, solve the drive of bus in a dormant state
The problem of electricity shortage of kinetic force and system.
Interface circuit of the present invention solves the difficulty of software development and debugging, it is not necessary to writes specific software control data
Stream, there is RS485 data flows to sentence automatically to function.
Interface circuit of the present invention solves the problems, such as troublesome in poeration, and facility switching is external, uses 1P3T toggle switch, convenient
Execute-in-place.Interface circuit of the present invention uses superpower ESD and SURGE safeguard functions, meets the requirement of industry spot adverse circumstances.
Brief description of the drawings
Fig. 1 is the composition schematic diagram of the interface circuit of the invention based on switch model selection.
Fig. 2 is the circuit diagram of the interface circuit of the invention based on switch model selection.
Fig. 3 is the circuit diagram of the interface circuit modular converter of the invention based on switch model selection.
Fig. 4 is the circuit diagram of the interface circuit pattern gating module of the invention based on switch model selection.
Fig. 5 is the circuit diagram of the interface circuit bypass protection module of the invention based on switch model selection.
Fig. 6 is the circuit diagram of the interface circuit binding post of the invention based on switch model selection.
Embodiment
The preferred embodiment that the invention will now be described in detail with reference to the accompanying drawings.
Embodiment one
Referring to Fig. 1, present invention is disclosed a kind of interface circuit based on switch model selection, the interface circuit
Including：Processor MCU, insulation blocking module, pattern gating module, modular converter, bypass protection module, binding post, processing
Device MCU, insulation blocking module, pattern gating module, modular converter, bypass protection module, binding post are sequentially connected.
Referring to Fig. 2, the insulation blocking module is to by the receiving terminal MCU_RxD and hair of processor MCU UART interfaces
Sending end MCU_TxD is corresponded to be connected in the process chip of insulation blocking module respectively, and high voltage transient is transferred in isolating interface
On electricity isolated layer, due to the high insulaion resistance of separation layer, the surge current of damaging will not be produced, plays the work of protection interface
With.
Referring to Fig. 3, the modular converter includes the first chip U1, fourth chip U4, fifth chip U5.
In the first chip U1 pinFor high level, pinIn the state of low level, pin TxOUT and draw
Pin RxOUT is enabled；In pinFor low level, pinIn the state of high level, pin TxOUT and pin
RxOUT is not enabled；In pinFor high level, pinIn the state of high level, pin TxOUT is enabled, pin
RxOUT is not enabled；In pinFor low level, pinIn the state of low level, pin TxOUT is not enabled, pin
RxOUT is enabled.
In the state of fourth chip U4 pin DE is high level, RS485 outputs are enabled；In drawing for fourth chip U4
Pin DE is in the state of low level, RS485 outputs does not enable；In fourth chip U4 pinIn the state of high level,
RS485 is received and not enabled；In fourth chip U4 pinIn the state of low level, RS485 receives enabled.
In the state of fifth chip U5 pin DE is high level, RS485 outputs are enabled；In drawing for fifth chip U5
Pin DE is in the state of low level, RS485 outputs does not enable；In fifth chip U5 pinIn the state of high level,
RS485 is received and not enabled；In fifth chip U5 pinIn the state of low level, RS485 receives enabled.
Referring to Fig. 4, the pattern gating module is to by switching SW, the second chip U2 and the 3rd chip U3 selections
Corresponding communication mode；Pattern gating module includes switch SW, the second chip U2 and the 3rd chip U3.
When the first pin and the 3rd pin that switch SW turn on, RS232 patterns are selected, make the first chip U1 pinFor high level, pinFor low level, then pin TxOUT and pin RxOUT is enabled, that is, activates the first chip U1, make
Fourth chip U4 pin DE is low level, then RS485 outputs do not enable, fourth chip U4 pinFor high level, then
RS485 is received and not enabled, i.e. fourth chip U4 in a dormant state, while makes fifth chip U5 pin DE be low level, then
RS485 outputs do not enable, i.e. fifth chip U5 is in a dormant state.
When the second pin and the 3rd pin that switch SW turn on, RS422 patterns are selected, make the first chip U1 pinFor low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in
Resting state, the pin DE for making fourth chip U4 are low level, then RS485 outputs do not enable, pinFor low level, then
RS485, which is received, to be enabled, i.e., only activation fourth chip U4 reception enables, while makes fifth chip U5 pin DE be high level,
Then RS485 outputs are enabled, i.e., only activation fifth chip U5 outputs are enabled.
When the 4th pin and the 3rd pin that switch SW turn on, RS485 patterns are selected, make the first chip U1 pinFor low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in
Resting state, make fourth chip U4 pin DE and pinThe output that short circuit receives RS485 jointly enables pin control, i.e.,
Fourth chip U4 is activated, is at half-duplex mode of operation, while makes fifth chip U5 pin DE be low level, then
RS485 outputs do not enable, i.e. fifth chip U5 is in a dormant state.
Referring to Fig. 5, the first order of the bypass protection is protected using GDT, the second level is protected using TVS,
Relatively low clamp voltage can be obtained while higher carrying out surge protection grade is obtained, decoupling is done in centre using resettable fuse,
Allow above GDT be easier act, have the function that leakage current；RS422/485 signal output parts have been connected two 20 Ω electricity
Resistance, makes to be isolated between side a and b and bus, the hardware fault of this sample machine would not make the communication of whole bus by
Influence, RS422/485 signal A ends are plus drawing, and B ends add drop-down, and such RXD level does not send the phase in RS422/485 buses
Between, i.e. bus suspension when unique high level is presented, would not by mistake be interrupted and receive random character, increase stability, RS422/
The top and end of 485 Network transmission lines should respectively connect 1 120 Ω build-out resistor, to reduce the reflection of transmission signal on circuit.
Increase the common-anode ESD protection chip increase RS232/ of SOT23 encapsulation on RS232/422/485 signal wires
422/485 conversion chip, i.e. the first chip U1, fourth chip U4, fifth chip U5 antistatic capacity.
Referring to Fig. 6, the binding post that the output of RS232/RS485/RS422 signals uses as shown in fig. 6, also may be used certainly
With using other structures.
In summary, the interface circuit proposed by the present invention based on switch model selection, can solve existing set
The defects of standby poor universality, any one pattern of RS232/RS485/RS422 can be used, it is practical.
Interface circuit of the present invention is low in energy consumption, easy realization, and using the chip of low-power consumption, and synchronization only has an one kind
The conversion chip work of pattern, other have little influence on the power consumption index of whole system, solve the drive of bus in a dormant state
The problem of electricity shortage of kinetic force and system.
Interface circuit of the present invention solves the difficulty of software development and debugging, it is not necessary to writes specific software control data
Stream, there is RS485 data flows to sentence automatically to function.
Interface circuit of the present invention solves the problems, such as troublesome in poeration, and facility switching is external, uses 1P3T toggle switch, convenient
Execute-in-place.Interface circuit of the present invention uses superpower ESD and SURGE safeguard functions, meets the requirement of industry spot adverse circumstances.
Here description of the invention and application are illustrative, are not wishing to limit the scope of the invention to above-described embodiment
In.The deformation and change of embodiments disclosed herein are possible, real for those skilled in the art
The replacement and equivalent various parts for applying example are known.It should be appreciated by the person skilled in the art that the present invention is not being departed from
Spirit or essential characteristics in the case of, the present invention can in other forms, structure, arrangement, ratio, and with other components,
Material and part are realized.In the case where not departing from scope and spirit of the present invention, embodiments disclosed herein can be entered
The other deformations of row and change.
Claims (6)
1. a kind of interface circuit based on switch model selection, it is characterised in that the interface circuit includes：Processor
MCU, insulation blocking module, pattern gating module, modular converter, bypass protection module, binding post, processor MCU, isolation are protected
Shield module, pattern gating module, modular converter, bypass protection module, binding post are sequentially connected；
The insulation blocking module to by the receiving terminal MCU_RxD of MCU processor UART interfaces and transmitting terminal MCU_TxD difference
It is corresponding to be connected on the four-way digital isolator chip U6 of insulation blocking module, electricity high voltage transient being transferred in isolating interface
On separation layer, due to the high insulaion resistance of separation layer, the surge current of damaging will not be produced, plays a part of protection interface；
The pattern gating module is to by switching SW, the second chip U2 and the corresponding communication mode of the 3rd chip U3 selections；
Pattern gating module includes switch SW, the second chip U2 and the 3rd chip U3；
When the first pin and the 3rd pin that switch SW turn on, RS232 patterns are selected, make the first chip U1 pinFor
High level, pinFor low level, then pin TxOUT and pin RxOUT is enabled, that is, activates the first chip U1, make the 4th core
Piece U4 pin DE is low level, then RS485 outputs do not enable, fourth chip U4 pinFor high level, then RS485 receptions
Do not enable, i.e. fourth chip U4 in a dormant state, while makes fifth chip U5 pin DE be low level, then RS485 is exported
Do not enable, i.e. fifth chip U5 is in a dormant state；
When the second pin and the 3rd pin that switch SW turn on, RS422 patterns are selected, make the first chip U1 pinFor
Low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in dormancy shape
State, the pin DE for making fourth chip U4 are low level, then RS485 outputs do not enable, pinFor low level, then RS485 receptions
Enabled, i.e., only activation fourth chip U4 reception enables, while makes fifth chip U5 pin DE be high level, then RS485 is defeated
Go out enabled, i.e., only activation fifth chip U5 outputs are enabled；
When the 4th pin and the 3rd pin that switch SW turn on, RS485 patterns are selected, make the first chip U1 pinFor
Low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in dormancy shape
State, make fourth chip U4 pin DE and pinThe output that short circuit is jointly subjected to RS485 enables pin control, that is, activates the 4th
Chip U4, half-duplex mode of operation is at, while makes fifth chip U5 pin DE be low level, then RS485 is exported not
Enabled, i.e. fifth chip U5 is in a dormant state；
The modular converter includes the first chip U1, fourth chip U4, fifth chip U5；
In the first chip U1 pinFor high level, pinIn the state of low level, pin TxOUT and pin
RxOUT is enabled；In pinFor low level, pinIn the state of high level, pin TxOUT and pin RxOUT are
Do not enable；In pinFor high level, pinIn the state of high level, pin TxOUT is enabled, and pin RxOUT does not make
Energy；In pinFor low level, pinIn the state of low level, pin TxOUT is not enabled, and pin RxOUT is enabled；
In the state of fourth chip U4 pin DE is high level, RS485 outputs are enabled；It is in fourth chip U4 pin DE
In the state of low level, RS485 outputs do not enable；In fourth chip U4 pinIn the state of high level, RS485 is received
Do not enable；In fourth chip U4 pinIn the state of low level, RS485 receives enabled；
In the state of fifth chip U5 pin DE is high level, RS485 outputs are enabled；It is in fifth chip U5 pin DE
In the state of low level, RS485 outputs do not enable；In fifth chip U5 pinIn the state of high level, RS485 connects
Receipts do not enable；In fifth chip U5 pinIn the state of low level, RS485 receives enabled；
The first order of the bypass protection is protected using GDT, and the second level is protected using TVS, is obtaining higher surge
Can obtain relatively low clamp voltage while degree of protection, decoupling is done in centre using resettable fuse, allow above GDT be easier
Action, has the function that leakage current；RS422/485 signal output parts have been connected two 20 Ω resistance, make side a and b with
Isolated between bus, the hardware fault of this sample machine would not make the communication of whole bus be affected, RS422/485 letters
Plus drawing, B ends add drop-down, presented when such RXD level is during RS422/485 buses are not sent, i.e. bus suspension for number A ends
Unique high level, it would not by mistake be interrupted and receive random character, increase stability, the top of RS422/485 Network transmission lines
1 120 Ω build-out resistor should be respectively connect with end, to reduce the reflection of transmission signal on circuit；
Increase the common-anode ESD protection chip increase RS232/422/485 of SOT23 encapsulation on RS232/422/485 signal wires
Conversion chip, i.e. the first chip U1, fourth chip U4, fifth chip U5 antistatic capacity.
2. a kind of interface circuit based on switch model selection, it is characterised in that the interface circuit includes：Processor
MCU, insulation blocking module, pattern gating module, modular converter, bypass protection module, binding post, processor MCU, isolation are protected
Shield module, pattern gating module, modular converter, bypass protection module, binding post are sequentially connected.
3. the interface circuit according to claim 2 based on switch model selection, it is characterised in that：
The insulation blocking module is to by the receiving terminal MCU_RxD of processor MCU UART interfaces and transmitting terminal MCU_TxD points
It Dui Ying not be connected in the process chip of insulation blocking module, high voltage transient is transferred on the electricity isolated layer in isolating interface, by
In the high insulaion resistance of separation layer, the surge current of damaging will not be produced, plays a part of protection interface.
4. the interface circuit according to claim 2 based on switch model selection, it is characterised in that：
The modular converter includes the first chip U1, fourth chip U4, fifth chip U5；
In the first chip U1 pinFor high level, pinIn the state of low level, pin TxOUT and pin
RxOUT is enabled；In pinFor low level, pinIn the state of high level, pin TxOUT and pin RxOUT are
Do not enable；In pinFor high level, pinIn the state of high level, pin TxOUT is enabled, and pin RxOUT does not make
Energy；In pinFor low level, pinIn the state of low level, pin TxOUT is not enabled, and pin RxOUT is enabled；
In the state of fourth chip U4 pin DE is high level, RS485 outputs are enabled；It is in fourth chip U4 pin DE
In the state of low level, RS485 outputs do not enable；In fourth chip U4 pinIn the state of high level, RS485 is received
Do not enable；In fourth chip U4 pinIn the state of low level, RS485 receives enabled；
In the state of fifth chip U5 pin DE is high level, RS485 outputs are enabled；It is in fifth chip U5 pin DE
In the state of low level, RS485 outputs do not enable；In fifth chip U5 pinIn the state of high level, RS485 is received
Do not enable；In fifth chip U5 pinIn the state of low level, RS485 receives enabled.
5. the interface circuit according to claim 4 based on switch model selection, it is characterised in that：
The pattern gating module is to by switching SW, the second chip U2 and the corresponding communication mode of the 3rd chip U3 selections；
Pattern gating module includes switch SW, the second chip U2 and the 3rd chip U3；
When the first pin and the 3rd pin that switch SW turn on, RS232 patterns are selected, make the first chip U1 pinFor
High level, pinFor low level, then pin TxOUT and pin RxOUT is enabled, that is, activates the first chip U1, make the 4th core
Piece U4 pin DE is low level, then RS485 outputs do not enable, fourth chip U4 pinFor high level, then RS485 receptions
Do not enable, i.e. fourth chip U4 in a dormant state, while makes fifth chip U5 pin DE be low level, then RS485 is exported
Do not enable, i.e. fifth chip U5 is in a dormant state；
When the second pin and the 3rd pin that switch SW turn on, RS422 patterns are selected, make the first chip U1 pinFor
Low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in dormancy shape
State, the pin DE for making fourth chip U4 are low level, then RS485 outputs do not enable, pinFor low level, then RS485 receptions
Enabled, i.e., only activation fourth chip U4 reception enables, while makes fifth chip U5 pin DE be high level, then RS485 is defeated
Go out enabled, i.e., only activation fifth chip U5 outputs are enabled；
When the 4th pin and the 3rd pin that switch SW turn on, RS485 patterns are selected, make the first chip U1 pinFor
Low level, pinFor high level, then pin TxOUT and pin RxOUT are not enabled, i.e., the first chip U1 is in dormancy shape
State, make fourth chip U4 pin DE and pinThe output that short circuit receives RS485 jointly enables pin control, that is, activates the 4th
Chip U4, half-duplex mode of operation is at, while makes fifth chip U5 pin DE be low level, then RS485 is exported not
Enabled, i.e. fifth chip U5 is in a dormant state.
6. the interface circuit according to claim 2 based on switch model selection, it is characterised in that：
The first order of the bypass protection is protected using GDT, and the second level is protected using TVS, is obtaining higher surge
Can obtain relatively low clamp voltage while degree of protection, decoupling is done in centre using resettable fuse, allow above GDT be easier
Action, has the function that leakage current；RS422/485 signal output parts have been connected two 20 Ω resistance, make side a and b with
Isolated between bus, the hardware fault of this sample machine would not make the communication of whole bus be affected, RS422/485 letters
Plus drawing, B ends add drop-down, presented when such RXD level is during RS422/485 buses are not sent, i.e. bus suspension for number A ends
Unique high level, it would not by mistake be interrupted and receive random character, increase stability, the top of RS422/485 Network transmission lines
1 120 Ω build-out resistor should be respectively connect with end, to reduce the reflection of transmission signal on circuit；
Increase the common-anode ESD protection chip increase RS232/422/485 of SOT23 encapsulation on RS232/422/485 signal wires
Conversion chip, i.e. the first chip U1, fourth chip U4, fifth chip U5 antistatic capacity.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112955826A (en) * | 2020-04-26 | 2021-06-11 | 深圳市大疆创新科技有限公司 | Gating circuit, communication control method and device |
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