CN107390600B - Data acquisition device and collecting method with a variety of link modes - Google Patents
Data acquisition device and collecting method with a variety of link modes Download PDFInfo
- Publication number
- CN107390600B CN107390600B CN201710797498.2A CN201710797498A CN107390600B CN 107390600 B CN107390600 B CN 107390600B CN 201710797498 A CN201710797498 A CN 201710797498A CN 107390600 B CN107390600 B CN 107390600B
- Authority
- CN
- China
- Prior art keywords
- data
- signal
- interface controller
- data selector
- link
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
- G05B19/0425—Safety, monitoring
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/26—Pc applications
- G05B2219/2612—Data acquisition interface
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Optical Communication System (AREA)
Abstract
The present invention provides a kind of data acquisition device and method with a variety of link modes, which includes: analog-digital converter, for signal to be carried out analog-to-digital conversion；First data selector, the input link for being accessed according to the outlet selector of interface controller；First demodulating unit, for demodulating microwave signal link output two-way solution adjusting data；Second demodulating unit, for demodulating laser signal link output two-way solution adjusting data；Second data selector, third data selector, the 4th data selector are used to select input link according to the output of interface controller and export；Interface controller, the instruction for decomposing peripheral bus transmission generate the input that corresponding control logic signal controls demodulating unit and data selector respectively；It is also used to receive and cache solution adjusting data and reads data so that peripheral bus accesses.The present invention considerably reduce the consumption of storage resource, the complexity of system development, CPU software demodulation load, system power consumption.
Description
Technical field
The invention belongs to precise measurement and control technical fields, more particularly to a kind of precise measurement and control piece applied to chip atomic clock
Upper system has the data acquisition device of a variety of link modes.
Background technique
Currently, precise measurement and control system on chip (SoC, System on Chip) is mainly using single-chip microcontroller, such as Dezhou instrument
The data of the MSP430 series monolithic of device (TI), SPCE061A single-chip microcontroller of Ling Yang etc., above-mentioned single-chip microcontroller acquire transmission link
Input is analog signal, and analog signal is converted to digital signal through ADC and is transferred to bus, waiting for CPU by interface controller
Processing.As shown in Figure 1, this data acquisition transmission link can satisfy general precise measurement and control application demand, but object chip
When atomic clock precision controls, since the light inspection signal that the physical system of chip atomic clock exports is DC stacked two tune
The distinctive signal of frequency point (5KHz and 125Hz) processed, in order to extract chip atomic clock from the light inspection signal that physical system exports
Microwave and laser changed power information, need to demodulate the light inspection signal of acquisition respectively, this just needs single-chip microcontroller to connect
Continuous acquisition input signal, and be stored in on-chip memory, waiting for CPU carries out the data of acquisition soft to different frequency points respectively
Part demodulation.
However, the on piece storage resource of enough capacity is needed using the single-chip microcontroller of traditional data acquisition transmission link, and
And need using software demodulation mode, to increase the complexity of system development, increase cpu load and system operation function
Consumption.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of with a variety of link modes
Data acquisition device, system development complexity height big for storage resource needed for solving data acquisition device in the prior art,
CPU meets runs greatly the high problem of power consumption with system.
In order to achieve the above objects and other related objects, the present invention provides a kind of data acquisition with a variety of link modes
Device, comprising:
Analog-digital converter, input terminal connects analog signal, for the analog signal to be converted into digital signal；
First data selector, input terminal and control terminal are separately connected interface controller, input terminal and the modulus
Converter is connected, for selecting the access digital signal or the interface controller defeated according to the output of the interface controller
The instruction entered；
First demodulating unit, input terminal connect first data selector, and control terminal connects the Interface Controller
Device, for demodulating microwave signal link output two-way solution adjusting data；
Second demodulating unit, input terminal connect the first data selector, and control terminal connects the interface controller, use
Two-way solution adjusting data is exported in demodulation laser signal link；
Second data selector, input terminal connect the two-way solution adjusting data of first demodulating unit, output end with
Control terminal is separately connected the interface controller, for according to the control logic signal behavior output from the interface controller
The solution adjusting data of first demodulating unit is to interface controller all the way；
Third data selector, input terminal connect the two-way solution adjusting data of second demodulating unit, and control terminal connects
The interface controller is connect, for according to the control logic signal behavior output all the way described second from the interface controller
The solution adjusting data of demodulating unit；
4th data selector, input terminal are separately connected the defeated of the third data selector and the analog-digital converter
Outlet, output end and control terminal are separately connected the interface controller, for according to the control from the interface controller
The input link of logical signal selection connection, its signal is exported to the interface controller；
The interface controller, is connected with peripheral bus, generates phase for decomposing the instruction from the peripheral bus
The control logic signal answered to control the input of each demodulating unit and data selector respectively；It is also used to receive and delay
It deposits the solution adjusting data and reads data so that the peripheral bus accesses.
Another object of the present invention is to provide a kind of data using the data acquisition device with a variety of link modes
Acquisition method, comprising:
The analog signal of input is converted to digital signal output by analog-digital converter；
Interface controller parsing the instruction from peripheral interface obtain control logic signal, with to each data selector,
Demodulating unit carries out logic control, controls the digital signal and is output to peripheral data interface three kinds of transmission link modes of formation；
When control logic signal makes the digital signal successively through the first data selector, the first demodulating unit, second
When between data selector, interface controller and peripheral data interface, the demodulation link of HZ grades of frequencies is formed；
When control logic signal makes the digital signal successively through the first data selector, the second demodulating unit, second
When between data selector, the 4th data selector, interface controller and peripheral data interface, the demodulation of KHZ grades of frequencies is formed
Link；
When control logic signal connects the digital signal in the 4th data selector, interface controller and peripheral data
When between mouthful, common transmission link is formed.
As described above, the data acquisition device and method with a variety of link modes of the invention, has below beneficial to effect
Fruit:
The present invention controls the switch of multiple data selectors by interface controller, by the biography of analog signal to peripheral bus
Transmission link is configured to three kinds of transmission link modes, the first carries out analog-to-digital conversion for HZ grades of frequency demodulations, and second is KHZ grades of frequencies
Rate demodulation carries out analog-to-digital conversion, the third directly carries out analog-to-digital conversion for common transmission link.Conventional one-piece machine is overcome in face
Single data acquisition transmission link bring storage resource consumption is big when control processing dedicated to chip atomic clock, system development
Complexity is high, CPU software demodulates the problem that load is big, system power dissipation is high.So that the on-chip system chip based on invention design
Not only has the function of general single chip, additionally it is possible to meet the special applications demand of similar chip atomic clock precision control.
Detailed description of the invention
Fig. 1 is shown as traditional system on chip data acquisition transmission link structural frames schematic diagram provided by the invention；
Fig. 2 is shown as the precise measurement and control system on chip provided by the invention applied to chip atomic clock with a variety of link moulds
The data acquisition device structural schematic diagram of formula；
Fig. 3 is shown as the structural schematic diagram of the first demodulating unit in Fig. 2 provided by the invention；
Fig. 4 is shown as the structural schematic diagram of the second demodulating unit in Fig. 2 provided by the invention；
Fig. 5 is shown as the structural schematic diagram of interface controller in Fig. 2 provided by the invention；
Fig. 6 is shown as a kind of acquisition method process of data acquisition device with a variety of link modes provided by the invention
Figure.
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.It should be noted that in the absence of conflict, following embodiment and implementation
Feature in example can be combined with each other.
It should be noted that illustrating the basic structure that only the invention is illustrated in a schematic way provided in following embodiment
Think, only shown in schema then with related component in the present invention rather than component count, shape and size when according to actual implementation
Draw, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its assembly layout kenel
It is likely more complexity.
Embodiment 1
Referring to Fig. 2, to have the data of a variety of link modes applied to the precise measurement and control system on chip of chip atomic clock
Acquisition device structural schematic diagram, comprising:
Analog-digital converter 1, input terminal connects analog signal, for the analog signal to be converted into digital signal；
Wherein, which can be ADC or ADC IP, and ADC IP is preferably general 16 9 channel analogies number
Converter is configured to sample rate when single channel and is greater than 50Kbps.And the analog signal connected is the physical system of chip atomic clock
The light inspection signal of output is the distinctive signal of DC stacked two modulation frequency point (5KHz and 125Hz), in order to from object
The microwave of chip atomic clock and the changed power information of laser are extracted in the light inspection signal of reason system output, needs a variety of demodulation
Unit is combined.
First data selector 21, input terminal and control terminal are separately connected interface controller, and input terminal and modulus turn
Parallel operation is connected, and the finger of the digital signal or interface controller input is accessed for the output selection according to the interface controller
It enables；
In Fig. 2, shown in MUX1, the control logic to control terminal of interface controller output is instructed, by peripheral interface
CPU output, and the instruction of interface controller parsing CPU output generates corresponding control signal, the instruction of interface controller output
It can also be demodulated by subsequent demodulating unit.
First demodulating unit 3, input terminal connect first data selector, and control terminal connects the Interface Controller
Device, for demodulating microwave signal link output two-way solution adjusting data；
Second demodulating unit 4, input terminal connect the first data selector, and control terminal connects the interface controller,
For demodulating laser signal link output two-way solution adjusting data；
Meanwhile first the input terminal of demodulating unit and the second demodulating unit can be directly under the control of interface controller, will
The instruction of APB bus output is directly inputted to two demodulating units through interface controller.
Second data selector 22, input terminal connect the two-way solution adjusting data of first demodulating unit, output end
It is separately connected the interface controller with control terminal, for defeated according to the control logic signal behavior from the interface controller
Out all the way the solution adjusting data of first demodulating unit to interface controller；
In Fig. 2, shown in MUX2, the control logic to control terminal of interface controller output is instructed, by peripheral interface
CPU output, and the instruction of interface controller parsing CPU output generates corresponding control signal.
Third data selector 23, input terminal connect the two-way solution adjusting data of second demodulating unit, control terminal
The interface controller is connected, for according to the control logic signal behavior output from the interface controller all the way described the
The solution adjusting data of two demodulating units；
In Fig. 2, shown in MUX3, the control logic to control terminal of interface controller output is instructed, by peripheral interface
CPU output, and the instruction of interface controller parsing CPU output generates corresponding control signal.
4th data selector 24, input terminal are separately connected the third data selector and the analog-digital converter
Output end, output end and control terminal are separately connected the interface controller, for according to the control from the interface controller
The input link of logical signal selection connection processed, its signal is exported to the interface controller；
In Fig. 2, shown in MUX4, the control logic to control terminal of interface controller output is instructed, by peripheral interface
CPU output, and the instruction of interface controller parsing CPU output generates corresponding control signal.
Interface controller 5 is connected with peripheral bus (APB) 6, generates for decomposing the instruction from the peripheral bus
The corresponding control logic signal to control the input of each demodulating unit and data selector respectively；It is also used to receive simultaneously
It caches the solution adjusting data and reads data so that the peripheral bus accesses.
Specifically, it is controlled in system on chip when data acquisition device is integrated in applied to the accurate of chip atomic clock, at least
It is manufactured using 0.18um CMOS technology.
In the present embodiment, the present invention controls the switch of multiple data selectors by interface controller, by analog signal
Transmission link to peripheral bus is configured to three kinds of transmission link modes, the first for the first demodulating unit of ADC IP+MUX1++
MUX2+ interface controller, realize analog signal acquisition conversion, Hz grade frequency demodulations, second be ADC IP+MUX1+ second
Demodulating unit+MUX3+MUX4+ interface controller, realize analog signal acquisition conversion, kHz grades of frequency demodulations, the third is logical
With transmission link, i.e. ADC IP+MUX4+ interface controller directly carries out analog-to-digital conversion.Conventional one-piece machine is overcome towards core
Piece atomic clock dedicated control data acquisition transmission link bring storage resource consumption single when handling is big, system development is complicated
Degree is high, CPU software demodulates the problem that load is big, system power dissipation is high.So that the on-chip system chip based on invention design is not only
Has the function of general single chip, additionally it is possible to meet the special applications demand of similar chip atomic clock precision control.
Embodiment 2
Referring to Fig. 3, for the structural schematic diagram of the first demodulating unit 3 in Fig. 2 provided by the invention, comprising:
First frequency mixer 301, input terminal are separately connected the output end of the first data selector and the first quadrature demodulator,
Signal for exporting to the first data selector carries out being mixed place with the first road quadrature demodulator output end I cosine wave signal
Reason；
First quadrature demodulator (NCO1) 303, input terminal connecting interface controller, it is mixed that output end is separately connected first
Frequency device and the second frequency mixer, control logic signal for being exported according to the interface controller generate the road I, the road Q it is corresponding it is remaining,
Sinusoidal signal；
Specifically, the first quadrature demodulator generate frequency be 125HZ just, cosine signal.
Second frequency mixer 302, input terminal are separately connected the output end and the first quadrature demodulator of the first data selector
Output end, signal and the first quadrature demodulator output end Q road sine wave signal for being exported to the first data selector into
Row Frequency mixing processing；
Filter chain I is connected to form I branch with first frequency mixer, for the signal exported through the first frequency mixer
It is filtered extraction processing；
Filter chain Q is connected to form Q branch with second frequency mixer, for the signal exported through the second frequency mixer
It is filtered extraction processing.
The filter chain I and filter chain Q includes: the first low-pass filter group 304 being sequentially connected, the first extracting unit
305, the second low-pass filter group 306, the second extracting unit 307, third low-pass filter group 308 and third extracting unit 309,
Wherein, first extracting unit 305 is 10 times of extractions, and second extracting unit 307 is 10 times of extractions, and the third extracts
Unit 309 is 4 times of extractions.
Wherein, 400 times of filter chain I and filter chain Q extract the hierarchical approaches using 10 × 10 × 4, can reduce extraction filter
The design difficulty and design complexities of wave device, and then save area and power consumption.
In the present embodiment, microwave signal in light inspection signal is carried out demodulation process according to demand by the first demodulating unit, defeated
I/Q two-way solution adjusting data orthogonal each other is transferred to data selector out, for user's selection.
Embodiment 3
Referring to Fig. 4, for the structural schematic diagram of the second demodulating unit 4 in Fig. 2 provided by the invention, comprising:
Third frequency mixer 401, input terminal are separately connected the output end and the second quadrature demodulator of the first data selector
Output end, signal and the second quadrature demodulator output end I road cosine wave signal for being exported to the first data selector into
Row Frequency mixing processing；
Second quadrature demodulator (NOC2) 403, input terminal connecting interface controller, it is mixed that output end is separately connected third
Frequency device and the 4th frequency mixer, control logic signal for being exported according to the interface controller generate the road I, the road Q it is corresponding it is remaining,
Sinusoidal signal；
4th frequency mixer 402, input terminal are separately connected the output end of the first data selector and the second quadrature demodulator,
Signal for exporting to the first data selector carries out being mixed place with the second road quadrature demodulator output end Q sine wave signal
Reason；
Filtering group I is connected to form I branch with the third frequency mixer, for the signal exported through third frequency mixer
It is filtered extraction processing；
Filtering group Q is connected to form Q branch with the 4th frequency mixer, for the signal exported through the 4th frequency mixer
It is filtered extraction processing.
The filtering group I and filtering group Q includes: that the 4th low-pass filter group 404 and the 4th being sequentially connected extracts list
Member 405, wherein the 4th extracting unit 404 is 20 times of extractions.
Wherein, 400 times of filtering group I and filtering group Q extract the hierarchical approaches using 10 × 10 × 4, can reduce extraction filter
The design difficulty and design complexities of wave device, and then save area and power consumption.
In the present embodiment, laser signal in light inspection signal is carried out demodulation process according to demand by the second demodulating unit, defeated
I/Q two-way solution adjusting data orthogonal each other is transferred to data selector out, for user's selection.
Embodiment 4
Referring to Fig. 5, for the structural schematic diagram of interface controller 5 in Fig. 2 provided by the invention, comprising:
Peripheral bus (APB bus interface) 501 is also used to connect for receiving the instruction sent from peripheral bus
Receive the access from the peripheral bus；
Master control logic module 502, is connected with peripheral bus, controlled for disassembly instruction each data selector,
Interrupt logic and fifo control logic module；
Interrupt logic 503, input terminal are connected with the second data selector, the 4th data selector, are used for basis
The input link of the control logic instruction selection connection of master control logic module, and when the demodulation number for receiving the input link transmission
According to when generate interrupt logic signal be sent to peripheral bus；
Fifo control logic module 504 is connected with fifo module, peripheral bus respectively, the number for will read
According to being transferred to peripheral bus；
Fifo module 505, input terminal and output end are connected with fifo control logic module, input terminal connection the 4th
Data selector output end, for caching the data of the 4th data selector output.
Wherein, fifo module is preferably general dual-ported memory, and memory capacity can be adjusted according to user demand；
In the present embodiment, on the one hand interface controller passes through APB bus interface and APB (Advanced Peripheral
Bus) interconnection communication；On the other hand, it the APB control command exported is transferred to master control logic module carries out being parsed into control and patrol
Instruction is collected, control logic instruction is successively transferred to each data selector, interrupt logic and fifo control logic mould respectively
Block controls their operating mode；In addition, interrupt logic is used to receive the demodulation that the transmission of second, four data selectors comes
Data, meanwhile, it generates interrupt logic signal and is sent to peripheral bus；The data transmission that fifo control logic module is used to read
It is used to cache the data of the 4th data selector output to peripheral bus and fifo module, to control entire data
Three kinds of different modes of formation of acquisition device demodulate link.
Embodiment 5
Referring to Fig. 6, being a kind of acquisition method of the data acquisition device with a variety of link modes provided by the invention
Flow chart, comprising:
Step 1, the analog signal of input is converted to digital signal output by analog-digital converter；
Analog signal is light inspection signal, but is not limited solely to light inspection signal, further includes other types of analog signal.
Step 2, instruction of the interface controller parsing from peripheral interface obtains control logic signal, for each data
Selector, demodulating unit carry out logic control, control the digital signal and are output to peripheral data interface three kinds of chains of formation
Road mode；
Wherein, the instruction of peripheral interface is inputted by CPU, and interface controller selects each data according to the instruction of parsing
Device, demodulating unit carry out logic control, to form three kinds of simultaneous transmission link modes.
Step 2.1, when control logic signal makes the digital signal successively single through the first data selector, the first demodulation
When between member, the second data selector, interface controller and peripheral data interface, the demodulation link of HZ grades of frequencies is formed；
Specifically, by the 125HZ sine and cosine of the signal generation orthogonal with the first demodulating unit of the first data selector output
Signal carries out orthogonal mixing, and output successively carries out low-pass filtering respectively and extracts the orthogonal signalling that processing generates two-way HZ grades；
Wherein HZ grades of orthogonal signalling are demodulation all the way for the control logic signal behavior connection generated according to interface controller
Data generate interrupt logic signal when the interface controller receives the solution adjusting data and are transferred to peripheral bus, directly
Until CPU response.
Step 2.2, when control logic signal makes the digital signal successively single through the first data selector, the second demodulation
When between member, the second data selector, the 4th data selector, interface controller and peripheral data interface, KHZ grades of frequencies are formed
Demodulation link；
Specifically, the 5KHZ sine and cosine by the signal generation orthogonal with the second demodulating unit of the first data selector output is believed
Number orthogonal mixing is carried out, output successively carries out low-pass filtering respectively and extracts the orthogonal signalling that processing generates two-way KHZ grades；
Wherein KHZ grades of orthogonal signalling are demodulation number all the way for the control signal behavior connection generated according to interface controller
According to being written and read and stored when the interface controller receives the solution adjusting data；
When monitoring solution adjusting data storage to volume space half, generates interrupt logic signal and be sent to periphery always
Line interface, waiting for CPU response；
When CPU response, it is when reading demodulation data command that interface controller, which parses it and instructs, and generating reading control sequential will solve
Adjusting data is transferred to peripheral bus.
Step 2.3, when control logic signal makes the digital signal in the 4th data selector, interface controller and outer
When enclosing between data-interface, common transmission link is formed.
Specifically, the digital signal is direct through the 4th data selector by digital signal according to the control of interface controller
It is transferred to peripheral bus.
In the present embodiment, step 2.1,2.2,2.3 are based on step 2 while to occur, that is, the demodulation of three kinds of link modes
Link is to exist simultaneously.The microwave of chip atomic clock and the changed power information of laser are extracted by the light inspection signal of input,
Collected light inspection signal is demodulated respectively, different frequent points are directed to by the first demodulating unit, the second demodulating unit respectively
It is demodulated, is not necessarily to software demodulation, reduce cpu load and system operation power consumption.Will demodulation data buffer storage to interface controller,
When the solution adjusting data of caching accounts for volume space half, interrupt logic signal is sent to peripheral bus, and waiting for CPU is rung
It answers, when CPU response, it is when reading demodulation data command that interface controller, which parses it and instructs, and generating reading control sequential will demodulate
Data are transferred to peripheral bus.Even if, can also proper solution tune light inspection signal in the state that on piece storage resource is insufficient.Separately
Outside, it is designed by specific control logic and transmission link, forms the demodulation link of three kinds of link modes, reduce system development
Complexity.
Embodiment 6
For aforesaid way, the working principle that selection is applied to the data acquisition transmission multi-mode link of system on chip is carried out
Simple illustration.Chip periphery inputs analog signal and samples the analog signal to ADC IP, ADC IP and turn the analog signal
It is changed to 16 digital signals in parallel output, which is transferred to the APB bus of system on chip, and there are three types of chains
Road mode.Interface controller receives the order of APB bus transfer by APB bus interface, after being parsed in master control logic,
The master control logic of interface controller issues MUX1, MUX2, MUX3, MUX4, the first demodulating unit and the second demodulating unit and controls
Signal, to realize the selection control of three kinds of transmission link modes.
The first transmission link mode are as follows: the output of ADC IP is transferred to the first demodulating unit by MUX1, in interface
Under the control of controller, the NCO1 of the first demodulating unit generate orthogonal 125Hz just, cosine signal and ADC IP output 16
Position data carry out orthogonal mixing in the first frequency mixer and the second frequency mixer in the first demodulating unit, through the first demodulating unit
The respective low-pass filtering of filter chain I/Q and extraction processing, finally, the first demodulating unit exports 16 orthogonal I/Q two paths of signals,
This two-way i/q signal is transferred in interface controller, then pass through interface control under the selection control of interface controller by MUX2
Interrupt logic in device processed generates interrupt signal and is transmitted to APB bus interface, waiting for CPU response processing.
Second of transmission link mode are as follows: ADC IP output data is transferred to the second demodulating unit by interface controller,
Under the control of interface controller, the NCO2 of the second demodulating unit generates the 16 of orthogonal 5kHz cosine and sine signal and ADC IP output
Position data carry out orthogonal mixing in the third frequency mixer and the 4th frequency mixer in the second demodulating unit, by the second demodulating unit
The respective low-pass filtering of filtering group I/Q and extraction processing, finally, the second demodulating unit exports orthogonal 16 I/Q two-way letter
Number.This two-way i/q signal is transferred in interface controller under the selection control of interface controller by MUX3 and MUX4
FIFO, the control by the master control logic module of interface controller to fifo control logic module, generate fifo module writes behaviour
Make to enable, write address, write the signals such as clock, so that the data of the second demodulating unit processing are stored to fifo module, meanwhile, lead to
Fifo control logic module and the interrupt logic in interface controller are crossed, the common solution adjusting data monitored in fifo module is deposited
Situation is stored up, waiting is stored until fifo module to when occupying half volume space, is passed through interrupt logic, is generated FIFO mould
The full reading data interrupt requests of the solution adjusting data cached in block, are transmitted to APB bus, waiting for CPU by APB bus interface
Response processing；After CPU response, the instruction that master control logic parses CPU is that after reading the data command of fifo module, will control
The reading control sequential for the fifo module that fifo control logic module generates, including read operation is enabled, read address, reads clock etc., from
And it is total that the solution adjusting data in fifo module by the control of master control logic module and fifo control logic module is transmitted to APB
Line interface.
The third transmission link mode are as follows: ADC IP output data is under the master control logic control of interface controller, directly
It is transmitted to APB bus, that is, ADC IP is directly integrated in APB bus, and this mode is that traditional system on chip data are adopted
Collect transmission link.
In conclusion the present invention controls the switch of multiple data selectors by interface controller, by analog signal outside
The transmission link for enclosing bus is configured to three kinds of transmission link modes, the first is HZ grade frequency demodulations progress analog-to-digital conversions, and second
Kind carries out analog-to-digital conversions for KHZ grades of frequency demodulations, the third directly carries out analog-to-digital conversion for common transmission link.Overcome biography
The system single-chip microcontroller data acquisition transmission link bring storage resource single in the dedicated control processing of object chip atomic clock disappears
Consumption is big, system development complexity is high, the CPU software demodulation problem that load is big, system power dissipation is high.So that based on invention design
On-chip system chip not only has the function of general single chip, additionally it is possible to meet special the answering of similar chip atomic clock precision control
Use demand.So the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (10)
1. a kind of data acquisition device with a variety of link modes characterized by comprising
Analog-digital converter, input terminal connects analog signal, for the analog signal to be converted into digital signal；
First data selector, input terminal and control terminal are separately connected interface controller, input terminal and the analog-to-digital conversion
Device is connected, for what is inputted according to the output selection access digital signal of the interface controller or the interface controller
Instruction；
First demodulating unit, input terminal connect first data selector, and control terminal connects the interface controller, use
Two-way solution adjusting data is exported in demodulation microwave signal link；
Second demodulating unit, input terminal connect the first data selector, and control terminal connects the interface controller, for solving
Laser signal link is adjusted to export two-way solution adjusting data；
Second data selector, input terminal connect the two-way solution adjusting data of first demodulating unit, output end and control
End is separately connected the interface controller, for being exported all the way according to the control logic signal behavior from the interface controller
The solution adjusting data of first demodulating unit is to interface controller；
Third data selector, input terminal connect the two-way solution adjusting data of second demodulating unit, and control terminal connects institute
Interface controller is stated, for according to second demodulation all the way of the control logic signal behavior output from the interface controller
The solution adjusting data of unit；
4th data selector, input terminal are separately connected the output of the third data selector and the analog-digital converter
End, output end and control terminal are separately connected the interface controller, for being patrolled according to the control from the interface controller
The input link for collecting signal behavior connection, its signal is exported to the interface controller；
The interface controller, is connected with peripheral bus, generates accordingly for decomposing the instruction from the peripheral bus
The control logic signal to control the input of each demodulating unit and data selector respectively；It is also used to receive and cache institute
It states solution adjusting data and reads data so that the peripheral bus accesses.
2. the data acquisition device according to claim 1 with a variety of link modes, which is characterized in that first solution
Adjusting unit includes two kinds of solution adjusting datas of the corresponding output of two branches of I, Q, wherein first demodulating unit includes:
First frequency mixer, input terminal are separately connected the output of the output end and the first quadrature demodulator of the first data selector
End, signal and the road the first quadrature demodulator output end I cosine wave signal for being exported to first data selector
Carry out Frequency mixing processing；
First quadrature demodulator, input terminal connecting interface controller, output end are separately connected first frequency mixer and
Two frequency mixers, the control logic signal for being exported according to the interface controller generate the road I, corresponding remaining, the sinusoidal letter in the road Q
Number；
Second frequency mixer, input terminal are separately connected the output of first data selector and the first quadrature demodulator
End, signal and the first quadrature demodulator output end Q road sine wave signal for exporting to first data selector carry out
Frequency mixing processing；
Filter chain I is connected to form I branch with first frequency mixer, for the signal exported through first frequency mixer
It is filtered extraction processing；
Filter chain Q is connected to form Q branch with second frequency mixer, for the signal exported through second frequency mixer
It is filtered extraction processing.
3. the data acquisition device according to claim 2 with a variety of link modes, which is characterized in that the filter chain
I and filter chain Q include: the first low-pass filter group being sequentially connected, the first extracting unit, the second low-pass filter group, the
Two extracting units, third low-pass filter group and third extracting unit, wherein first extracting unit, the second extracting unit
It is 10 times of extractions, the third extracting unit is 4 times of extractions.
4. the data acquisition device according to claim 1 with a variety of link modes, which is characterized in that second solution
Adjusting unit includes two branches of I, Q, two kinds of solution adjusting datas of corresponding output, wherein second demodulating unit includes:
Third frequency mixer, input terminal are separately connected the output end of the first data selector and the second quadrature demodulator, for pair
The signal and the second quadrature demodulator output end I road cosine wave signal of the first data selector output carry out Frequency mixing processing；
Second quadrature demodulator, input terminal connecting interface controller, output end are separately connected third frequency mixer and the 4th and mix
Frequency device, the control logic signal for being exported according to the interface controller generate the road I, the corresponding remaining, sinusoidal signal in the road Q；
4th frequency mixer, input terminal are separately connected the output end of the first data selector and the second quadrature demodulator, for pair
The signal and the second quadrature demodulator output end Q road sine wave signal of first data selector output carry out Frequency mixing processing；
Filtering group I is connected to form I branch with the third frequency mixer, for carrying out to the signal exported through third frequency mixer
Filtering extraction processing；
Filtering group Q is connected to form Q branch with the 4th frequency mixer, for carrying out to the signal exported through the 4th frequency mixer
Filtering extraction processing.
5. the data acquisition device according to claim 4 with a variety of link modes, which is characterized in that the filtering group
I and filtering group Q includes: the 4th low-pass filter group being sequentially connected and the 4th extracting unit, wherein the described 4th extracts list
Member is 20 times of extractions.
6. the data acquisition device according to claim 1 with a variety of link modes, which is characterized in that the interface control
Device processed includes:
Peripheral bus is also used to receive from the peripheral bus for receiving the instruction sent from peripheral bus
Access；
Master control logic module is connected with the peripheral bus, and each data selector, interruption are controlled for disassembly instruction
Logic module and fifo control logic module；
The interrupt logic, input terminal are connected with the second data selector, the 4th data selector, for according to master control
The input link of the control logic instruction selection connection of logic module, and when receiving the solution adjusting data of the input link transmission
It generates interrupt logic signal and is sent to peripheral bus；
The fifo control logic module, is connected with fifo module, peripheral bus respectively, and the data for that will read pass
It is defeated to arrive peripheral bus；
The fifo module, input terminal and output end are connected with fifo control logic module, the 4th number of input terminal connection
According to the output end of selector, for caching the solution adjusting data of the 4th data selector output.
7. a kind of number using the data acquisition device described in any one of claim 1 to 6 with a variety of link modes
According to acquisition method characterized by comprising
The analog signal of input is converted to digital signal output by analog-digital converter；
Instruction of the interface controller parsing from peripheral interface obtains control logic signal, to each data selector, demodulation
Unit carries out logic control, controls the digital signal and is output to peripheral data interface three kinds of transmission link modes of formation；
When control logic signal makes the digital signal successively through the first data selector, the first demodulating unit, the second data
When between selector, interface controller and peripheral data interface, the demodulation link of HZ grades of frequencies is formed；
When control logic signal makes the digital signal successively through the first data selector, the second demodulating unit, the second data
When between selector, the 4th data selector, interface controller and peripheral data interface, the demodulation link of KHZ grades of frequencies is formed；
When control logic signal make the digital signal the 4th data selector, interface controller and peripheral data interface it
Between when, formed common transmission link.
8. the collecting method of the data acquisition device according to claim 7 with a variety of link modes, feature
It is, it is described when control logic signal makes the digital signal successively through the first data selector, the first demodulating unit, second
When between data selector, interface controller and peripheral data interface, formed HZ grades of frequencies demodulation link the step of, comprising:
The 125HZ cosine and sine signal of the signal generation orthogonal with the first demodulating unit of first data selector output is carried out orthogonal
Mixing, output successively carry out low-pass filtering respectively and extract the orthogonal signalling that processing generates two-way HZ grades；
Wherein HZ grades of orthogonal signalling are solution adjusting data all the way for the control logic signal behavior connection generated according to interface controller,
Interrupt logic signal is generated when the interface controller receives the solution adjusting data and is transferred to peripheral bus, until CPU
Until response.
9. the collecting method of the data acquisition device according to claim 7 with a variety of link modes, feature
It is, it is described when control logic signal makes the digital signal successively through the first data selector, the second demodulating unit, second
When between data selector, the 4th data selector, interface controller and peripheral data interface, the demodulation of KHZ grades of frequencies is formed
The step of link, comprising:
The 5KHZ cosine and sine signal of the signal generation orthogonal with the second demodulating unit of first data selector output is carried out orthogonal
Mixing, output successively carry out low-pass filtering respectively and extract the orthogonal signalling that processing generates two-way KHZ grades；
Wherein KHZ grades of orthogonal signalling are solution adjusting data all the way for the control signal behavior connection generated according to interface controller, when
The interface controller is written and read and is stored when receiving the solution adjusting data；
When monitoring solution adjusting data storage to volume space half, generation interrupt logic signal is sent to peripheral bus and connects
Mouthful, waiting for CPU response；
When CPU response, it is when reading demodulation data command that interface controller, which parses it and instructs, and number will be demodulated by generating reading control sequential
According to being transferred to peripheral bus.
10. the acquisition method of the data acquisition device according to claim 7 with a variety of link modes, feature exist
In described when control logic signal connects the digital signal in the 4th data selector, interface controller and peripheral data
Mouthful between when, formed common transmission link the step of, comprising:
Digital signal is transmitted directly to periphery through the 4th data selector according to the control of interface controller by the digital signal
Bus interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710797498.2A CN107390600B (en) | 2017-09-04 | 2017-09-04 | Data acquisition device and collecting method with a variety of link modes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710797498.2A CN107390600B (en) | 2017-09-04 | 2017-09-04 | Data acquisition device and collecting method with a variety of link modes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107390600A CN107390600A (en) | 2017-11-24 |
| CN107390600B true CN107390600B (en) | 2019-05-14 |
Family
ID=60351906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710797498.2A Active CN107390600B (en) | 2017-09-04 | 2017-09-04 | Data acquisition device and collecting method with a variety of link modes |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107390600B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110083564B (en) * | 2019-06-14 | 2024-11-08 | 北京锐达芯集成电路设计有限责任公司 | Control chip and application method thereof |
| CN110764736B (en) * | 2019-10-29 | 2021-11-26 | 中昊芯英(杭州)科技有限公司 | Matrix processing device, method and equipment |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1367635A (en) * | 2001-01-22 | 2002-09-04 | 上海大唐移动通信设备有限公司 | Equipment for detecting speech signal and making speaking transmission in communication system |
| CN101277121A (en) * | 2008-05-22 | 2008-10-01 | 高拓讯达（北京）科技有限公司 | Low-power consumption receiver capable of dynamically detecting barrage jamming signal |
| WO2009059840A1 (en) * | 2007-11-08 | 2009-05-14 | Continental Automotive Gmbh | Method for producing a control programme for an electronic control or regulation appliance |
| CN102523596A (en) * | 2011-12-13 | 2012-06-27 | 北京北方烽火科技有限公司 | High speed frequency sweep apparatus and realization method thereof |
| CN203520081U (en) * | 2013-09-29 | 2014-04-02 | 成都天奥测控技术有限公司 | Time-based synchronous multichannel data acquisition instrument |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002064145A (en) * | 2000-06-09 | 2002-02-28 | Fujitsu Ltd | Integrated circuit chip having redundancy element, multiprocessor and method of manufacturing the same |
-
2017
- 2017-09-04 CN CN201710797498.2A patent/CN107390600B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1367635A (en) * | 2001-01-22 | 2002-09-04 | 上海大唐移动通信设备有限公司 | Equipment for detecting speech signal and making speaking transmission in communication system |
| WO2009059840A1 (en) * | 2007-11-08 | 2009-05-14 | Continental Automotive Gmbh | Method for producing a control programme for an electronic control or regulation appliance |
| CN101277121A (en) * | 2008-05-22 | 2008-10-01 | 高拓讯达（北京）科技有限公司 | Low-power consumption receiver capable of dynamically detecting barrage jamming signal |
| CN102523596A (en) * | 2011-12-13 | 2012-06-27 | 北京北方烽火科技有限公司 | High speed frequency sweep apparatus and realization method thereof |
| CN203520081U (en) * | 2013-09-29 | 2014-04-02 | 成都天奥测控技术有限公司 | Time-based synchronous multichannel data acquisition instrument |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107390600A (en) | 2017-11-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104020691B (en) | It is applicable to the signals collecting board of multibus agreement, many expansion interfaces | |
| CN109308283B (en) | SoC (system on chip) system and peripheral bus switching method thereof | |
| CN107390600B (en) | Data acquisition device and collecting method with a variety of link modes | |
| CN107153622B (en) | A kind of drive control method based on spi bus | |
| CN106713804B (en) | A kind of triple channel image transmitting interface conversion method | |
| CN105786741B (en) | SOC high-speed low-power-consumption bus and conversion method | |
| CN103176037A (en) | Alternating-current signal acquisition board for flexible alternating-current transmission device | |
| CN111857016A (en) | SoC chip structure applied to fuze control system | |
| CN206147623U (en) | Gather processing card device based on large capacity FPGA | |
| CN102355264B (en) | A kind of analog to digital conversion circuit for portable electric energy monitoring device | |
| CN207650989U (en) | A kind of intelligence instrument data collection architecture | |
| CN207909123U (en) | A kind of CAN bus and PCIE bus interface conversion equipments | |
| CN208044374U (en) | A kind of multi-path data collecting device | |
| CN203351026U (en) | Optical fiber sensing signal acquiring and processing device | |
| CN201689133U (en) | Electric energy quality monitoring device | |
| CN103309798B (en) | A kind of DSP debugging apparatus | |
| CN206292769U (en) | A kind of embedded testing storage system | |
| CN203084719U (en) | SJA1000 interface IP core based on processor local bus (PLB) | |
| CN201107404Y (en) | Radar signal baseband processing chip based on SOC design | |
| CN208241654U (en) | A kind of communication system data flow transmitting device | |
| CN104777391A (en) | Power quality detection device of novel structure | |
| CN207529165U (en) | A kind of electric network data handles acquisition system | |
| CN214831695U (en) | Continuous compaction quality monitoring device of road bed road surface | |
| CN207070076U (en) | A kind of power communication interface switching device with automatic switching function | |
| CN104794087A (en) | Processing unit interface circuit in multi-core processor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |