CN107390113A - A kind of method of ATE tests differential signal level - Google Patents
A kind of method of ATE tests differential signal level Download PDFInfo
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- CN107390113A CN107390113A CN201710701801.4A CN201710701801A CN107390113A CN 107390113 A CN107390113 A CN 107390113A CN 201710701801 A CN201710701801 A CN 201710701801A CN 107390113 A CN107390113 A CN 107390113A
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- differential signal
- voltage
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- negative terminal
- signal level
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
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- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a kind of method of ATE test differential signal level, comprising the following steps has：The anode of the differential signal of device and negative terminal are connected in the dedicated tunnel of ATE test respectively；The output of device differential signal is set, presets the output work mode voltage that Vt voltages are device differential signal, the anode and negative terminal of differential signal export corresponding voltage V respectivelySE+And VSE‑；Variable V t Do statement is set；Define a data structure；The related setting of test action；Vt values based on Do statement most initial, respectively obtain the anode V of first pair of Difference signal pairSE+With negative terminal VSE‑Voltage；VSE+And VSE‑Respectively computing is carried out with Vt；Vt values are being backed among program setting, continue to calculate, output differential mode and common-mode voltage of the requirement error of measurement sub-signal under the conditions of 100 Ω terminal resistances are met can fast and accurately be drawn by such a method, without by the bridging resistance for actually increasing by 100 Ω on differential signal, increasing external circuit and hardware cost.
Description
Technical field
The present invention relates to signal testing field, specially a kind of method of ATE tests differential signal level.
Background technology
ATE is Automatic Test Equipment (automated test device) english abbreviation, is that one kind passes through meter
The equipment that the control of calculation machine carries out the tests such as device, circuit board and subsystem, hand labor, automation are substituted by computer programming
Completion cycle tests；High-speed differential signal is transferred to next stage from upper level in general, in order to eliminate on transmission line
Signal reflex caused by impedance discontinuity, then the receiving terminal of next stage can bridge the resistance of one and Impedance Matching on Transmission Line, than
Such as LVDS 100 Ω (as shown in Figure 1), differential signal is applied to the transmission of high speed signal, the differential mode electricity of transmission signal due to it
Flat all smaller, as lvds signals only have hundreds of millivolts, the generally electric signal in high-speed figure application environment passes through coaxial
Cable or the transmission of controlled impedance printed circuit, line one-end characteristic impedance is 50 Ω, the Ω of differential impedance 100, in the prior art
It is by being connected resistance with negative terminal in the anode of differential signal, high-speed digital signals, mainly making terminal coupling using resistance
To reduce reflection.And the terminal resistance of differential signal, typically all it is connected across between two signals, but this method is in pcb board row
Resistance is added, adds PCB surface product and cost, secondly because secure resistance, some terminal electricity is not needed if to measure
The parameter of resistance, then it can not realize.
The content of the invention
For problem present in background technology, the invention provides a kind of method of ATE test differential signal level.
To achieve the above object, the present invention provides following technical scheme：A kind of method of ATE tests differential signal level,
Comprise the following steps：
S10：The anode of the differential signal of device and negative terminal are connected in the dedicated tunnel of ATE test respectively；
S20：The output of device differential signal is set, presets the output work mode voltage that Vt voltages are device differential signal, difference
The anode and negative terminal of signal export corresponding voltage V respectivelySE+And VSE-；
S30：Variable V t Do statement is set；
S40：Define a data structure；
S50：The related setting of test action；
S60：Vt values based on Do statement most initial, one-shot measurement action is performed, respectively obtains first pair of differential signal
To anode VSE+With negative terminal VSE-Voltage, value is put into data structure；
S70：VSE+And VSE-Respectively computing is carried out with Vt；
S80：Judge test result, backed within again among program setting after Vt values are adjusted if not meeting, continue to survey
Amount is calculated according to step S70；Terminate computing if meeting；
As a kind of preferable technical scheme of the present invention, starting constant, end constant and stepping are additionally provided with S30 and is become
Amount, the starting constant change scope with terminating the voltage that constant is respectively variable V t.
As a kind of preferable technical scheme of the present invention, the data structure in S40 include differential signal anode pinname1,
Differential signal negative terminal pinname2, differential signal anode measurement magnitude of voltage value1 and differential signal negative terminal measurement magnitude of voltage
Value2, and all Difference signal pairs to be tested all first are put into data structure；
As a kind of preferable technical scheme of the present invention, related set that measurement acts in S50 includes：Measure the electricity applied
Stream, clamp voltages and the number of measurement；
As a kind of preferable technical scheme of the present invention, the computing mode in S60 is as follows：
ISE+=(VSE+-Vt)/50ΩISE-=(Vt-VSE+)/50Ω
As a kind of preferable technical scheme of the present invention, according to obtained ISE+And ISE+Compare both sizes, if
ISE+-ISE-Absolute value be more than a standard, such as 10uA, then adjust Vt value, adjustment mode is Vt=0.5* (VSE++
VSE-)。
As a kind of preferable technical scheme of the present invention, in addition to S90 steps, S90 is to be carried out down according to S10-S80 steps
The measurement of a pair of Difference signal pairs, the test until completing all Difference signal pairs.
Compared with prior art, the beneficial effects of the invention are as follows：Requirement error of measurement sub-signal can fast and accurately be drawn
Meet the output differential mode and common-mode voltage under the conditions of 100 Ω terminal resistances, without actually increasing by differential signal
100 Ω bridging resistance, increase external circuit and hardware cost, and all Difference signal pairs be configured and measured one by one,
Reduce the error influence for measuring and bringing simultaneously.
Brief description of the drawings
Fig. 1 is differential signal transmission schematic diagram in the prior art；
Fig. 2 is flow chart of steps of the present invention；
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
Embodiment：
Referring to Fig. 2, the present invention provides a kind of method of ATE tests differential signal level, comprise the following steps：
S10：The anode of the differential signal of device and negative terminal are connected in the dedicated tunnel of ATE test respectively；
S20：The output of device differential signal is set, presets the output work mode voltage that Vt voltages are device differential signal, difference
The anode and negative terminal of signal export corresponding voltage V respectivelySE+And VSE-；
S30：Variable V t Do statement is set；
S40：Define a data structure；
S50：The related setting of test action；
S60：Vt values based on Do statement most initial, one-shot measurement action is performed, respectively obtains first pair of differential signal
To anode VSE+With negative terminal VSE-Voltage, value is put into data structure；
S70：VSE+And VSE-Respectively computing is carried out with Vt；
S80：Judge test result, backed within again among program setting after Vt values are adjusted if not meeting, continue to survey
Amount is calculated according to step S70；Terminate computing if meeting；
Specifically, being additionally provided with starting constant in S30, terminating constant and stepping variable, the starting constant is with terminating often
Amount is respectively that variable V t voltage changes scope.
Specifically, data structure in S40 include differential signal anode pinname1, differential signal negative terminal pinname2,
Differential signal anode measures magnitude of voltage value1 and differential signal negative terminal measurement magnitude of voltage value2, and by all differences to be tested
Sub-signal is to being all first put into data structure；
Specifically, related set that measurement acts in S50 includes：Measure the electric current applied, clamp voltages and measurement
Number；
Specifically, the computing mode in S60 is as follows：
ISE+=(VSE+-Vt)/50Ω；ISE-=(Vt-VSE+The Ω of)/50, it is further according to obtained ISE+And ISE+Compare
Both sizes, if ISE+-ISE-Absolute value be more than a standard, such as 10uA, then adjust Vt value, adjustment mode Vt
=0.5* (VSE++VSE-), the V until being met conditionSE+And VSE-, V this momentSE+And VSE-It is that this exists to differential signal
Output plus terminal and negative terminal voltage in the case of 100 Ω terminal resistances；Corresponding 0.5* (VSE++VSE-) it is output common mode voltage；
The present invention can fast and accurately show that requirement error of measurement sub-signal meets 100 Ω terminals electricity by above step
Output differential mode and common-mode voltage under the conditions of resistance, without by the bridging resistance for actually increasing by 100 Ω on differential signal,
Increase external circuit and hardware cost, and all Difference signal pairs are configured and measured one by one, reduce measurement simultaneously and bring
Error influence, solve device output difference signal in the case of not by connecting terminal resistance, by using ATE50 Ω's
Termination resistance test components are programmed and set, and dynamic changes VT magnitudes of voltage, so as to realize to differential signal level
Accurate measurement.
Specifically, also including S90 steps, S90 is the measurement that a pair of Difference signal pairs are carried out down according to S10-S80 steps,
Test until completing all Difference signal pairs.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement made within refreshing and principle etc., should be included in the scope of the protection.
Claims (7)
- A kind of 1. method of ATE tests differential signal level, it is characterised in that：Comprise the following steps：S10：The anode of the differential signal of device and negative terminal are connected in the dedicated tunnel of ATE test respectively；S20：The output of device differential signal is set, presets the output work mode voltage that Vt voltages are device differential signal, differential signal Anode and negative terminal export corresponding voltage V respectivelySE+And VSE-；S30：Variable V t Do statement is set；S40：Define a data structure；S50：The related setting of test action；S60：Vt values based on Do statement most initial, one-shot measurement action is performed, respectively obtains first pair of Difference signal pair Anode VSE+With negative terminal VSE-Voltage, value is put into data structure；S70：VSE+And VSE-Respectively computing is carried out with Vt；S80：Judge test result, if if not meeting adjust Vt values after back within again among program setting, continue measure by Calculated according to step S70；Terminate computing if meeting.
- A kind of 2. method of ATE tests differential signal level according to claim 2, it is characterised in that：Also set up in S30 There is starting constant, terminate constant and stepping variable, the starting constant changes model with terminating the voltage that constant is respectively variable V t Enclose.
- A kind of 3. method of ATE tests differential signal level according to claim 1, it is characterised in that：Data in S40 Structure includes differential signal anode pinname1, differential signal negative terminal pinname2, differential signal anode measurement magnitude of voltage Value1 and differential signal negative terminal measurement magnitude of voltage value2, and all Difference signal pairs to be tested all first are put into data In structure.
- A kind of 4. method of ATE tests differential signal level according to claim 1, it is characterised in that：Measured in S50 dynamic Related set of work includes：Measure electric current, clamp voltages and the number of measurement applied.
- A kind of 5. method of ATE tests differential signal level according to claim 1, it is characterised in that：Computing in S60 Mode is as follows：ISE+=(VSE+-Vt)/50ΩISE-=(Vt-VSE+)/50Ω。
- A kind of 6. method of ATE tests differential signal level according to claim 5, it is characterised in that：According to what is obtained ISE+And ISE+Compare both sizes, if ISE+-ISE-Absolute value be more than a standard, such as 10uA, then adjust Vt value, Adjustment mode is Vt=0.5* (VSE++VSE-)。
- A kind of 7. method of ATE tests differential signal level according to claim 1, it is characterised in that：Also include S90 to walk Suddenly, S90 is the measurement that a pair of Difference signal pairs are carried out down according to S10-S80 steps, the survey until completing all Difference signal pairs Examination.
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| CN201710701801.4A CN107390113A (en) | 2017-08-16 | 2017-08-16 | A kind of method of ATE tests differential signal level |
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| CN201710701801.4A CN107390113A (en) | 2017-08-16 | 2017-08-16 | A kind of method of ATE tests differential signal level |
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020180414A1 (en) * | 2001-06-05 | 2002-12-05 | Koji Isodono | Tester and testing method for differential data drivers |
| CN1486432A (en) * | 2000-12-12 | 2004-03-31 | ̩ | Calibrating single ended channels for differential performance |
| CN1677640A (en) * | 2004-03-31 | 2005-10-05 | 泰瑞达公司 | Test system with differential signal measurement |
| US20050235189A1 (en) * | 2004-04-02 | 2005-10-20 | Samsung Electronics Co., Ltd. | Measurement circuit and method for serially merging single-ended signals to analyze them |
| JP2007040849A (en) * | 2005-08-03 | 2007-02-15 | Advantest Corp | Measuring equipment and test equipment |
| CN102128968A (en) * | 2010-01-13 | 2011-07-20 | 鸿富锦精密工业（深圳）有限公司 | Low voltage differential signal testing system and method thereof |
| JP4924231B2 (en) * | 2007-06-22 | 2012-04-25 | 横河電機株式会社 | Semiconductor test equipment |
| CN103377962A (en) * | 2012-04-27 | 2013-10-30 | 辉达公司 | Method and system for testing low-voltage differential signals |
| US20150204933A1 (en) * | 2014-01-21 | 2015-07-23 | Samsung Electronics Co., Ltd. | Differential signal transmission system for detecting state of transmission lines |
-
2017
- 2017-08-16 CN CN201710701801.4A patent/CN107390113A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1486432A (en) * | 2000-12-12 | 2004-03-31 | ̩ | Calibrating single ended channels for differential performance |
| US20020180414A1 (en) * | 2001-06-05 | 2002-12-05 | Koji Isodono | Tester and testing method for differential data drivers |
| CN1677640A (en) * | 2004-03-31 | 2005-10-05 | 泰瑞达公司 | Test system with differential signal measurement |
| US20050235189A1 (en) * | 2004-04-02 | 2005-10-20 | Samsung Electronics Co., Ltd. | Measurement circuit and method for serially merging single-ended signals to analyze them |
| JP2007040849A (en) * | 2005-08-03 | 2007-02-15 | Advantest Corp | Measuring equipment and test equipment |
| JP4924231B2 (en) * | 2007-06-22 | 2012-04-25 | 横河電機株式会社 | Semiconductor test equipment |
| CN102128968A (en) * | 2010-01-13 | 2011-07-20 | 鸿富锦精密工业（深圳）有限公司 | Low voltage differential signal testing system and method thereof |
| CN103377962A (en) * | 2012-04-27 | 2013-10-30 | 辉达公司 | Method and system for testing low-voltage differential signals |
| US20150204933A1 (en) * | 2014-01-21 | 2015-07-23 | Samsung Electronics Co., Ltd. | Differential signal transmission system for detecting state of transmission lines |
Non-Patent Citations (2)
| Title |
|---|
| 苏洋: "基于UltraFlex系统进行LVDS接口芯片的测试方法", 《电子与封装》 * |
| 陈新军: "基于ATE的LVDS芯片测试技术", 《计算机科学与技术》 * |
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Application publication date: 20171124 |
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