CN113625215B - Voltage transformer abnormity calibration method and device based on sectional test - Google Patents

Voltage transformer abnormity calibration method and device based on sectional test Download PDF

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CN113625215B
CN113625215B CN202111187298.8A CN202111187298A CN113625215B CN 113625215 B CN113625215 B CN 113625215B CN 202111187298 A CN202111187298 A CN 202111187298A CN 113625215 B CN113625215 B CN 113625215B
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error
voltage
direct
merging unit
current voltage
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CN113625215A (en
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周仕豪
谢国强
汤汉松
万勇
钟逸铭
桂小智
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State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/02Testing or calibrating of apparatus covered by the other groups of this subclass of auxiliary devices, e.g. of instrument transformers according to prescribed transformation ratio, phase angle, or wattage rating

Abstract

The invention discloses a voltage transformer abnormity calibration method and device based on sectional test, wherein the calibration method comprises the following steps: connecting a tester into the direct current voltage transformer, and constructing an abnormal test loop of the direct current voltage transformer; respectively solving errors of a direct-current voltage divider, errors of a secondary voltage dividing plate and errors of a merging unit based on the calculated correction coefficient of the tester after the tester is connected to the direct-current voltage transformer; and judging whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are consistent or not and whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are lower than a preset error value or not. The output precision of each module of the direct current voltage transformer is synchronously detected by applying primary direct current voltage to the direct current voltage transformer, simultaneously testing the output of the direct current voltage divider, the output of the secondary voltage dividing plate and the output digital quantity of the merging unit, so that the purpose of determining the abnormal fault reason of the direct current voltage transformer is realized.

Description

Voltage transformer abnormity calibration method and device based on sectional test
Technical Field
The invention belongs to the technical field of anomaly detection of direct-current voltage transformers, and particularly relates to a voltage transformer anomaly calibration method and device based on sectional testing.
Background
The direct current transformer is an important primary device in the construction and operation processes of a direct current transmission system, provides accurate and reliable measurement information for a direct current control and protection system, and the operation reliability and the measurement accuracy of the direct current transformer are directly related to the safe and stable operation of the direct current transmission system. At present, the design, test, debugging and production of a full series of core technologies of direct current transmission complete equipment are mastered in China, but the research on the direct current electronic transformer is relatively lagged behind. Compared with direct-current power transmission equipment, the domestication process of the direct-current electronic transformer is slow, corresponding product development experience and fault detection means are lacked, and the abnormal reason and abnormal points of the direct-current electronic transformer cannot be searched through field testing. Particularly, the current localization rate of the direct current voltage transformer is low, the primary part is mainly a snewint direct current voltage divider, the secondary part is basically localized for matching with control protection, and the distribution of the functions brings great troubles to field test and fault detection. In recent years, the phenomenon of low direct current voltage drop in the operation process of each converter station appears for many times, which seriously influences the operation safety of the converter stations.
The existing testing technology of the direct current voltage transformer basically tests the direct current voltage transformer body, the secondary voltage dividing plate, the remote end module and the merging unit as a whole, and the abnormal points and the abnormal reasons of the direct current voltage transformer cannot be searched and analyzed.
Disclosure of Invention
The invention provides a voltage transformer abnormity calibration method and device based on a sectional test, which are used for solving at least one of the technical problems.
In a first aspect, the present invention provides a voltage transformer anomaly calibration method based on a segment test, including: the method comprises the following steps that a tester is connected into a direct-current voltage transformer, and an abnormal test loop of the direct-current voltage transformer is constructed, wherein the abnormal test loop of the direct-current voltage transformer comprises a direct-current voltage generator for generating direct-current voltage, a standard voltage divider, the direct-current voltage divider, a secondary voltage dividing plate, a merging unit and the tester, and the tester simultaneously collects a standard voltage signal of the standard voltage divider, a secondary voltage signal of the direct-current voltage divider, a small voltage signal of the secondary voltage dividing plate and a digital signal of the merging unit; respectively solving a direct current voltage divider error, a secondary voltage division plate error and a merging unit error based on a correction coefficient after the tester is connected into the direct current voltage transformer, wherein the expression for calculating the correction coefficient is as follows:
Figure 28656DEST_PATH_IMAGE001
in the formula (I), wherein,
Figure 106334DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 748668DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 211879DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 914256DEST_PATH_IMAGE005
inputting impedance for the tester; judging whether the error of the direct current voltage divider, the error of the secondary voltage divider and/or the error of the merging unit are consistent or not and whether the error of the direct current voltage divider, the error of the secondary voltage divider and/or the error of the merging unit are lower than a preset error value or not(ii) a If the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are consistent and the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are not lower than a preset error value, the direct current voltage divider has defects; if the error of the secondary voltage division plate is consistent with the error of the merging unit, the error of the direct current voltage divider is lower than a preset error value, and the error of the secondary voltage division plate and the error of the merging unit are not lower than the preset error value, the secondary voltage division plate has a set fault; if the error of the direct-current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are different, the error of the direct-current voltage divider and the error of the secondary voltage dividing plate are lower than a preset error value, and the error of the merging unit is not lower than the preset error value, the merging unit has a set fault; constructing a secondary debugging and verifying loop of the direct-current voltage transformer, wherein the secondary debugging and verifying loop of the direct-current voltage transformer comprises a direct-current voltage divider, a secondary voltage dividing plate, a merging unit and a tester, the tester generates secondary direct-current voltage and sends the secondary direct-current voltage to the secondary voltage dividing plate, and the tester simultaneously collects small voltage signals of the secondary voltage dividing plate and digital signals of the merging unit; when the secondary voltage division plate has a set fault, adjusting the secondary direct current voltage to a rated voltage value output by the direct current voltage divider, and adjusting a sampling resistor of the secondary voltage division plate to enable the error of the secondary voltage division plate to be lower than a preset error value; and when the setting fault exists in the merging unit, the output voltage is added to the rated secondary voltage value, and the voltage coefficient of the merging unit is adjusted to enable the error of the merging unit to be lower than the preset error value.
In a second aspect, the present invention provides a voltage transformer abnormality calibration apparatus based on a segment test, including: the first construction module is configured to connect the tester into the direct-current voltage transformer and construct an abnormal direct-current voltage transformer test loop, wherein the abnormal direct-current voltage transformer test loop comprises a direct-current voltage generator for generating direct-current voltage, a standard voltage divider, a direct-current voltage divider, a secondary voltage divider plate, a merging unit and the tester, and the tester collects the standard voltage of the standard voltage divider at the same timeA voltage signal, a secondary voltage signal of the DC voltage divider, a small voltage signal of the secondary voltage divider, and a digital signal of the merging unit; the calculation module is configured to calculate a correction coefficient after the tester is connected to the dc voltage transformer, and separately obtain a dc voltage divider error, a secondary voltage divider plate error, and a merging unit error, where an expression for calculating the correction coefficient is:
Figure 479229DEST_PATH_IMAGE001
in the formula (I), wherein,
Figure 659675DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 977393DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 585091DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 902940DEST_PATH_IMAGE005
inputting impedance for the tester; the judging module is configured to judge whether the error of the direct-current voltage divider, the error of the secondary voltage divider and/or the error of the merging unit are consistent and whether the error of the direct-current voltage divider, the error of the secondary voltage divider and/or the error of the merging unit are lower than a preset error value; the first output module is configured to determine that the direct-current voltage divider has a defect if the error of the direct-current voltage divider, the error of the secondary voltage divider and the error of the merging unit are consistent and the error of the direct-current voltage divider, the error of the secondary voltage divider and the error of the merging unit are not lower than a preset error value; the second output module is configured to determine that the secondary voltage division plate has a set fault if the error of the secondary voltage division plate is consistent with the error of the merging unit, the error of the direct-current voltage divider is lower than a preset error value, and the error of the secondary voltage division plate is not lower than the preset error value; a third output module configured to determine if the DC voltage divider is faultyThe error of the direct-current voltage divider and the error of the secondary voltage dividing plate are lower than a preset error value, and the error of the merging unit is not lower than the preset error value, so that the merging unit has a set fault; the second construction module is configured to construct a secondary debugging and verifying loop of the direct-current voltage transformer, wherein the secondary debugging and verifying loop of the direct-current voltage transformer comprises a direct-current voltage divider, a secondary voltage dividing plate, a merging unit and a tester, the tester generates secondary direct-current voltage and sends the secondary direct-current voltage to the secondary voltage dividing plate, and the tester simultaneously collects small voltage signals of the secondary voltage dividing plate and digital signals of the merging unit; the first adjusting module is configured to adjust the secondary direct-current voltage to a rated voltage value output by the direct-current voltage divider and adjust a sampling resistor of the secondary voltage dividing plate when the secondary voltage dividing plate has a set fault, so that the error of the secondary voltage dividing plate is lower than a preset error value; and the second adjusting module is configured to add the output voltage to the rated secondary voltage value and adjust the voltage coefficient of the merging unit to enable the error of the merging unit to be lower than the preset error value when the merging unit has the setting fault.
In a third aspect, an electronic device is provided, comprising: the voltage transformer anomaly calibration method comprises at least one processor and a memory which is in communication connection with the at least one processor, wherein the memory stores instructions which can be executed by the at least one processor, and the instructions are executed by the at least one processor so as to enable the at least one processor to execute the steps of the voltage transformer anomaly calibration method based on the segmented test according to any embodiment of the invention.
In a fourth aspect, the present invention further provides a computer-readable storage medium, on which a computer program is stored, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the steps of a method for calibrating anomaly of a voltage transformer based on a section test according to any one of the embodiments of the present invention.
According to the voltage transformer abnormity calibration method and device based on the sectional test, the primary direct-current voltage (without high voltage) is applied to the direct-current voltage transformer, the output of a direct-current voltage divider, the output of a secondary voltage dividing plate and the output digital quantity of a merging unit are tested simultaneously, the output precision of each module of the direct-current voltage transformer is detected synchronously, the fault reason of the abnormity of the direct-current voltage transformer is determined, the secondary direct-current rated voltage is applied to the output end of the direct-current voltage divider, the output of the secondary voltage dividing plate and the output digital quantity of the merging unit are collected simultaneously, and the adjustable resistance of the secondary voltage dividing plate or the voltage coefficient of the merging unit is corrected to eliminate the abnormity.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a flowchart of a voltage transformer anomaly calibration method based on a segment test according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a troubleshooting test circuit of a dc voltage transformer according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating correction and automatic calibration of a secondary circuit of a dc voltage transformer according to an embodiment of the present invention;
fig. 4 is a diagram of a secondary sampling signal conditioning circuit of a dc voltage divider according to an embodiment of the present invention;
fig. 5 is a block diagram of a voltage transformer abnormality calibration apparatus based on a segment test according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, a flowchart of a voltage transformer anomaly calibration method based on a segmented test according to the present application is shown.
As shown in fig. 1, in step S101, a tester is connected to a dc voltage transformer, and an abnormal test loop of the dc voltage transformer is constructed, where the abnormal test loop of the dc voltage transformer includes a dc voltage generator for generating a dc voltage, a standard voltage divider, a dc voltage divider, a secondary voltage divider, a merging unit, and the tester simultaneously collects a standard voltage signal of the standard voltage divider, a secondary voltage signal of the dc voltage divider, a small voltage signal of the secondary voltage divider, and a digital signal of the merging unit;
in step S102, based on a correction coefficient after the tester is connected to the dc voltage transformer, a dc voltage divider error, a secondary voltage divider plate error, and a merging unit error are respectively obtained, where an expression for calculating the correction coefficient is:
Figure 621498DEST_PATH_IMAGE001
in the formula (I), the compound is shown in the specification,
Figure 324880DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 103480DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 643046DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 165294DEST_PATH_IMAGE005
inputting impedance for the tester;
in step S103, determining whether the dc voltage divider error, the secondary voltage divider plate error and/or the merging unit error are consistent and whether the dc voltage divider error, the secondary voltage divider plate error and/or the merging unit error are lower than a preset error value;
in step S104, if the dc voltage divider error, the secondary voltage divider plate error, and the merging unit error are consistent and the dc voltage divider error, the secondary voltage divider plate error, and the merging unit error are not lower than a preset error value, the dc voltage divider has a defect;
in step S105, if the error of the secondary voltage divider is consistent with the error of the merging unit and the error of the dc voltage divider is lower than a preset error value, and the error of the secondary voltage divider and the error of the merging unit are not lower than the preset error value, a setting fault exists in the secondary voltage divider;
in step S106, if the dc voltage divider error, the secondary voltage divider plate error, and the merging unit error are not consistent, the dc voltage divider error and the secondary voltage divider plate error are both lower than a preset error value, and the merging unit error is not lower than the preset error value, a setup fault exists in the merging unit.
In step S107, a secondary debugging and verifying circuit of the dc voltage transformer is constructed, where the secondary debugging and verifying circuit of the dc voltage transformer includes a dc voltage divider, a secondary voltage divider, a merging unit, and a tester, the tester generates a secondary dc voltage and sends the secondary dc voltage to the secondary voltage divider, and the tester simultaneously collects a small voltage signal of the secondary voltage divider and a digital signal of the merging unit;
in step S108, when a setting fault exists in the secondary voltage divider, adjusting the secondary dc voltage to a rated voltage value output by the dc voltage divider, and adjusting a sampling resistor of the secondary voltage divider, so that an error of the secondary voltage divider is lower than a preset error value;
in step S109, when there is a setting failure in the merging unit, the output voltage is added to the rated secondary voltage value, and the voltage coefficient of the merging unit is adjusted so that the merging unit error is lower than the preset error value.
In the method of this embodiment, the primary dc voltage (without high voltage) is applied to the dc voltage transformer, and the output of the dc voltage divider, the output of the secondary voltage divider, and the output digital quantity of the merging unit are simultaneously tested, so as to synchronously detect the output accuracy of each module of the dc voltage transformer, and determine the cause of the abnormal fault of the dc voltage transformer. And applying a secondary DC rated voltage at the output end of the DC voltage divider, collecting the output of the secondary voltage dividing plate and the output digital quantity of the merging unit, correcting the adjustable resistor of the secondary voltage dividing plate or the voltage coefficient of the merging unit after checking, and eliminating the abnormity.
In a specific embodiment, a voltage transformer anomaly calibration method based on a segment test comprises the following steps:
the method comprises the following steps: building an abnormal test loop of a direct current voltage transformer
A DC voltage transformer abnormity test loop is set up according to figure 2, a DC voltage generator sends out 10kV DC voltage, a standard voltage divider adopts resistance voltage division to divide the 10kV voltage into small voltage which can be sampled by a tester, and the voltage division ratio is 10000/5. The sampling conditioning circuit shown in fig. 4 is connected behind the dc voltage divider, wherein RA and RB are both voltage dividing resistors, OP1 is an operational amplifier, R is an output resistor, and C1 is a filter capacitor, so that the input impedance of the whole test circuit is fixed to RA + RB. The secondary voltage division plate divides voltage into small voltage signals, and the small voltage signals can be directly connected to a tester and input impedance is approximate to infinity after passing through a signal conditioning loop. The sampling value digital signal output by the merging unit is output by an optical fiber and is directly connected to a tester. The tester simultaneously acquires a standard signal of the standard device, a secondary voltage signal of the direct-current voltage divider, a small voltage signal of the secondary voltage divider plate and a digital signal of the merging unit.
Step two: finding outliers
1. Coefficient conversion
The tester needs to perform secondary voltage division when accessing a direct current voltage divider signal, so that the tester inevitably changes the wholeIn an impedance loop of the voltage division loop, the resistance of a high-voltage arm of the voltage divider is equivalent to R1, the resistance of a low-voltage arm is equivalent to R2, and the resistance of the secondary voltage division plate is equivalent to R2
Figure 723184DEST_PATH_IMAGE006
The tester input impedance is RC = RA + RB.
So that the low voltage arm has an equivalent resistance of
Figure 672685DEST_PATH_IMAGE007
The equivalent resistance after being connected into the tester is
Figure 433968DEST_PATH_IMAGE008
A DC voltage division ratio of
Figure 759907DEST_PATH_IMAGE009
. Due to R1>>R22, so the change of the voltage division ratio is the change of R22, so the correction coefficient is equal to
Figure 437882DEST_PATH_IMAGE010
2. Anomaly point determination
And respectively solving three point errors of the direct current voltage divider, the secondary voltage dividing plate and the merging unit according to the converted coefficients, if the three point errors are consistent and meet the precision requirement, the direct current transformer is considered to have no abnormity, and if the three point errors are consistent and do not meet the precision requirement, the direct current voltage divider is considered to have defects and the impedance of a secondary arm of the direct current voltage divider needs to be tested. If the direct-current voltage divider meets the precision requirement, the precision of the secondary voltage dividing plate and the precision of the merging unit do not meet the requirement, and the errors are consistent, the secondary voltage dividing plate is judged to have a set fault. And if only the merging unit has errors, the acquisition unit is considered to have a setting fault.
Step three: building secondary debugging verification loop of direct current voltage transformer
And (3) building a secondary debugging and verifying loop of the direct-current voltage transformer according to the figure 3, sending a secondary direct-current voltage by the tester, adding the voltage to the front end of a secondary voltage dividing plate of the direct-current voltage transformer, and enabling a subsequent loop to be consistent with the step one.
Step four: debug verification
When the voltage dividing plate has a set fault, the output direct current voltage is added to a rated secondary voltage value, and the sampling resistance of the secondary voltage dividing plate is adjusted, so that the precision is close to 0. The output voltage value is automatically adjusted according to the test specification of the direct-current voltage transformer through feedback, and the full-range automatic test of the direct-current voltage transformer is completed.
When the merging unit has a set fault, the voltage coefficient is adjusted in the merging unit after the output voltage is added to the rated secondary voltage value because the acquisition unit cannot adjust, so that after the precision is close to 0, the output voltage value is automatically adjusted according to the test specification of the direct-current voltage transformer through feedback, and the full-range automatic test of the direct-current voltage transformer is completed.
In summary, the method of the present embodiment has the following technical effects:
1) the experiment can be completed by applying 10kV direct-current voltage to one end without applying direct-current high voltage (plus or minus 800 kV), so that the test cost is greatly saved, and the experiment field is reduced;
2) the abnormal points of the direct current voltage transformer with abnormal precision are judged by utilizing the precision relation among the multiple points, so that the troubleshooting time is greatly reduced;
3) applying full-range secondary voltage to meet the requirement of on-site test precision, and simultaneously adjusting the voltage coefficient of a sampling resistor or a merging unit of the secondary voltage dividing plate to meet the requirement of on-site operation precision;
4) the software compensates the sampling deviation caused by the load impedance change brought by the sampling loop, and the original direct current transformer wiring loop does not need to be changed during the sectional test;
5) the tester collects the secondary voltage signal of the direct-current voltage divider through the sampling conditioning loop, and can fix the input impedance of the sampling loop, so that the system impedance loop is not influenced by the input impedance of the AD sampling loop.
Referring to fig. 5, a block diagram of a voltage transformer abnormality calibration apparatus based on a segment test according to the present application is shown.
As shown in fig. 5, the apparatus 300 for calibrating an abnormality of a voltage transformer includes a first constructing module 310, a calculating module 320, a determining module 330, a first outputting module 340, a second outputting module 350, a third outputting module 360, a second constructing module 370, a first adjusting module 380, and a second adjusting module 390.
The first building module 310 is configured to connect a tester into a dc voltage transformer, and build an abnormal test loop of the dc voltage transformer, where the abnormal test loop of the dc voltage transformer includes a dc voltage generator generating a dc voltage, a standard voltage divider, a dc voltage divider, a secondary voltage divider, a merging unit, and the tester collects a standard voltage signal of the standard voltage divider, a secondary voltage signal of the dc voltage divider, a small voltage signal of the secondary voltage divider, and a digital signal of the merging unit at the same time; the calculating module 320 is configured to calculate a correction coefficient after the tester is connected to the dc voltage transformer, and separately obtain a dc voltage divider error, a secondary voltage divider plate error, and a merging unit error, where an expression for calculating the correction coefficient is:
Figure 558284DEST_PATH_IMAGE001
in the formula (I), wherein,
Figure 72442DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 936493DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 203395DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 760279DEST_PATH_IMAGE005
inputting impedance for the tester; a determining module 330 configured to determine whether the dc voltage divider error, the secondary voltage divider plate error and/or the merging unit error are consistent and whether the dc voltage divider error, the secondary voltage divider plate error and/or the merging unit error are consistentWhether the error is lower than a preset error value or not; a first output module 340 configured to determine that the dc voltage divider has a defect if the dc voltage divider error, the secondary voltage divider plate error and the merging unit error are the same and the dc voltage divider error, the secondary voltage divider plate error and the merging unit error are not lower than a preset error value; a second output module 350, configured to determine that a setting fault exists in the secondary voltage divider board if the error of the secondary voltage divider board is consistent with the error of the merging unit, and the error of the dc voltage divider is lower than a preset error value, and the error of the secondary voltage divider board is not lower than the preset error value; a third output module 360, configured to determine that a setup fault exists in the merging unit if the dc voltage divider error, the secondary voltage divider plate error, and the merging unit error are not consistent, and the dc voltage divider error and the secondary voltage divider plate error are both lower than a preset error value, and the merging unit error is not lower than the preset error value; a second building module 370, configured to build a secondary debugging and verifying loop of the dc voltage transformer, where the secondary debugging and verifying loop of the dc voltage transformer includes a dc voltage divider, a secondary voltage divider, a merging unit, and a tester, the tester generates a secondary dc voltage and sends the secondary dc voltage to the secondary voltage divider, and the tester collects a small voltage signal of the secondary voltage divider and a digital signal of the merging unit at the same time; the first adjusting module 380 is configured to adjust the secondary dc voltage to a rated voltage value output by the dc voltage divider and adjust a sampling resistor of the secondary voltage divider when a setting fault exists in the secondary voltage divider, so that an error of the secondary voltage divider is lower than a preset error value; the second adjusting module 390 is configured to add the output voltage to the rated secondary voltage value and adjust the voltage coefficient of the merging unit so that the error of the merging unit is lower than the preset error value when the merging unit has a setting fault.
It should be understood that the modules recited in fig. 5 correspond to various steps in the method described with reference to fig. 1. Thus, the operations and features described above for the method and the corresponding technical effects are also applicable to the modules in fig. 5, and are not described again here.
In other embodiments, the present invention further provides a computer-readable storage medium, where computer-executable instructions are stored, where the computer-executable instructions may execute the voltage transformer abnormality calibration method based on the segment test in any of the above method embodiments;
as one embodiment, the computer-readable storage medium of the present invention stores computer-executable instructions configured to:
the method comprises the following steps that a tester is connected into a direct-current voltage transformer, and an abnormal test loop of the direct-current voltage transformer is constructed, wherein the abnormal test loop of the direct-current voltage transformer comprises a direct-current voltage generator for generating direct-current voltage, a standard voltage divider, the direct-current voltage divider, a secondary voltage dividing plate, a merging unit and the tester, and the tester simultaneously collects a standard voltage signal of the standard voltage divider, a secondary voltage signal of the direct-current voltage divider, a small voltage signal of the secondary voltage dividing plate and a digital signal of the merging unit;
respectively solving a direct current voltage divider error, a secondary voltage division plate error and a merging unit error based on a correction coefficient after the tester is connected into the direct current voltage transformer, wherein the expression for calculating the correction coefficient is as follows:
Figure 496153DEST_PATH_IMAGE001
in the formula (I), the compound is shown in the specification,
Figure 163895DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 285304DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 13088DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 236259DEST_PATH_IMAGE005
inputting impedance for the tester;
judging whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are consistent or not and whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are lower than a preset error value or not;
if the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are consistent and the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are not lower than a preset error value, the direct current voltage divider has defects;
if the error of the secondary voltage division plate is consistent with the error of the merging unit, the error of the direct current voltage divider is lower than a preset error value, and the error of the secondary voltage division plate and the error of the merging unit are not lower than the preset error value, the secondary voltage division plate has a set fault;
if the error of the direct-current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are different, the error of the direct-current voltage divider and the error of the secondary voltage dividing plate are lower than a preset error value, and the error of the merging unit is not lower than the preset error value, the merging unit has a set fault;
constructing a secondary debugging and verifying loop of the direct-current voltage transformer, wherein the secondary debugging and verifying loop of the direct-current voltage transformer comprises a direct-current voltage divider, a secondary voltage dividing plate, a merging unit and a tester, the tester generates secondary direct-current voltage and sends the secondary direct-current voltage to the secondary voltage dividing plate, and the tester simultaneously collects small voltage signals of the secondary voltage dividing plate and digital signals of the merging unit;
when the secondary voltage division plate has a set fault, adjusting the secondary direct current voltage to a rated voltage value output by the direct current voltage divider, and adjusting a sampling resistor of the secondary voltage division plate to enable the error of the secondary voltage division plate to be lower than a preset error value;
and when the setting fault exists in the merging unit, the output voltage is added to the rated secondary voltage value, and the voltage coefficient of the merging unit is adjusted to enable the error of the merging unit to be lower than the preset error value.
The computer-readable storage medium may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created from use of the voltage transformer abnormality calibration apparatus based on the segment test, and the like. Further, the computer-readable storage medium may include high speed random access memory, and may also include memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, the computer readable storage medium optionally includes memory remotely located from the processor, and the remote memory may be connected to the segment test based voltage transformer anomaly calibration apparatus via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, and as shown in fig. 6, the electronic device includes: a processor 410 and memory 420. The electronic device may further include: an input device 430 and an output device 440. The processor 410, the memory 420, the input device 430, and the output device 440 may be connected by a bus or other means, such as the bus connection in fig. 6. The memory 420 is the computer-readable storage medium described above. The processor 410 executes various functional applications and data processing of the server by running nonvolatile software programs, instructions and modules stored in the memory 420, namely, implementing the voltage transformer abnormality calibration method based on the segment test of the above method embodiment. The input device 430 may receive input numeric or character information and generate key signal inputs related to user settings and function control of the voltage transformer abnormality calibration device based on the segment test. The output device 440 may include a display device such as a display screen.
The electronic device can execute the method provided by the embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method. For technical details that are not described in detail in this embodiment, reference may be made to the method provided by the embodiment of the present invention.
As an embodiment, the electronic device is applied to a voltage transformer abnormality calibration device based on a segment test, and is used for a client, and the electronic device includes: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to cause the at least one processor to:
the method comprises the following steps that a tester is connected into a direct-current voltage transformer, and an abnormal test loop of the direct-current voltage transformer is constructed, wherein the abnormal test loop of the direct-current voltage transformer comprises a direct-current voltage generator for generating direct-current voltage, a standard voltage divider, the direct-current voltage divider, a secondary voltage dividing plate, a merging unit and the tester, and the tester simultaneously collects a standard voltage signal of the standard voltage divider, a secondary voltage signal of the direct-current voltage divider, a small voltage signal of the secondary voltage dividing plate and a digital signal of the merging unit;
respectively solving a direct current voltage divider error, a secondary voltage division plate error and a merging unit error based on a correction coefficient after the tester is connected into the direct current voltage transformer, wherein the expression for calculating the correction coefficient is as follows:
Figure 707692DEST_PATH_IMAGE001
in the formula (I), the compound is shown in the specification,
Figure 699919DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 847872DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 292760DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 302304DEST_PATH_IMAGE005
inputting impedance for the tester;
judging whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are consistent or not and whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are lower than a preset error value or not;
if the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are consistent and the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are not lower than a preset error value, the direct current voltage divider has defects;
if the error of the secondary voltage division plate is consistent with the error of the merging unit, the error of the direct current voltage divider is lower than a preset error value, and the error of the secondary voltage division plate and the error of the merging unit are not lower than the preset error value, the secondary voltage division plate has a set fault;
if the error of the direct-current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are different, the error of the direct-current voltage divider and the error of the secondary voltage dividing plate are lower than a preset error value, and the error of the merging unit is not lower than the preset error value, the merging unit has a set fault;
constructing a secondary debugging and verifying loop of the direct-current voltage transformer, wherein the secondary debugging and verifying loop of the direct-current voltage transformer comprises a direct-current voltage divider, a secondary voltage dividing plate, a merging unit and a tester, the tester generates secondary direct-current voltage and sends the secondary direct-current voltage to the secondary voltage dividing plate, and the tester simultaneously collects small voltage signals of the secondary voltage dividing plate and digital signals of the merging unit;
when the secondary voltage division plate has a set fault, adjusting the secondary direct current voltage to a rated voltage value output by the direct current voltage divider, and adjusting a sampling resistor of the secondary voltage division plate to enable the error of the secondary voltage division plate to be lower than a preset error value;
and when the setting fault exists in the merging unit, the output voltage is added to the rated secondary voltage value, and the voltage coefficient of the merging unit is adjusted to enable the error of the merging unit to be lower than the preset error value.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods of the various embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (6)

1. A voltage transformer abnormity calibration method based on segment test is characterized by comprising the following steps:
the method comprises the following steps that a tester is connected into a direct-current voltage transformer, and an abnormal test loop of the direct-current voltage transformer is constructed, wherein the abnormal test loop of the direct-current voltage transformer comprises a direct-current voltage generator for generating direct-current voltage, a standard voltage divider, the direct-current voltage divider, a secondary voltage dividing plate, a merging unit and the tester, and the tester simultaneously collects a standard voltage signal of the standard voltage divider, a secondary voltage signal of the direct-current voltage divider, a small voltage signal of the secondary voltage dividing plate and a digital signal of the merging unit;
respectively solving a direct current voltage divider error, a secondary voltage division plate error and a merging unit error based on a correction coefficient after the tester is connected into the direct current voltage transformer, wherein the expression for calculating the correction coefficient is as follows:
Figure 421812DEST_PATH_IMAGE001
in the formula (I), the compound is shown in the specification,
Figure 72236DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 730751DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 348683DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 383635DEST_PATH_IMAGE005
inputting impedance for the tester;
judging whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are consistent or not and whether the error of the direct current voltage divider, the error of the secondary voltage dividing plate and/or the error of the merging unit are lower than a preset error value or not;
if the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are consistent and the error of the direct current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are not lower than a preset error value, the direct current voltage divider has defects;
if the error of the secondary voltage division plate is consistent with the error of the merging unit, the error of the direct current voltage divider is lower than a preset error value, and the error of the secondary voltage division plate and the error of the merging unit are not lower than the preset error value, the secondary voltage division plate has a set fault;
if the error of the direct-current voltage divider, the error of the secondary voltage dividing plate and the error of the merging unit are different, the error of the direct-current voltage divider and the error of the secondary voltage dividing plate are lower than a preset error value, and the error of the merging unit is not lower than the preset error value, the merging unit has a set fault;
constructing a secondary debugging and verifying loop of the direct-current voltage transformer, wherein the secondary debugging and verifying loop of the direct-current voltage transformer comprises a direct-current voltage divider, a secondary voltage dividing plate, a merging unit and a tester, the tester generates secondary direct-current voltage and sends the secondary direct-current voltage to the secondary voltage dividing plate, and the tester simultaneously collects small voltage signals of the secondary voltage dividing plate and digital signals of the merging unit;
when the secondary voltage division plate has a set fault, adjusting the secondary direct current voltage to a rated voltage value output by the direct current voltage divider, and adjusting a sampling resistor of the secondary voltage division plate to enable the error of the secondary voltage division plate to be lower than a preset error value;
and when the setting fault exists in the merging unit, the output voltage is added to the rated secondary voltage value, and the voltage coefficient of the merging unit is adjusted to enable the error of the merging unit to be lower than the preset error value.
2. The method for calibrating the anomaly of the voltage transformer based on the segment test according to claim 1, wherein after the DC voltage divider has a defect, the method further comprises: the dc voltage divider is tested for secondary arm impedance.
3. The voltage transformer abnormality calibration method based on the segment test as claimed in claim 1, wherein the tester collects the secondary voltage signal of the dc voltage divider through a sampling conditioning loop.
4. The utility model provides a voltage transformer abnormal calibration device based on segmentation test which characterized in that includes:
the device comprises a first building module, a second building module and a third building module, wherein the first building module is configured to connect a tester into a direct-current voltage transformer and build an abnormal test loop of the direct-current voltage transformer, the abnormal test loop of the direct-current voltage transformer comprises a direct-current voltage generator for generating direct-current voltage, a standard voltage divider, a direct-current voltage divider, a secondary voltage dividing plate, a merging unit and the tester, and the tester simultaneously collects a standard voltage signal of the standard voltage divider, a secondary voltage signal of the direct-current voltage divider, a small voltage signal of the secondary voltage dividing plate and a digital signal of the merging unit;
the calculation module is configured to calculate a correction coefficient after the tester is connected to the dc voltage transformer, and separately obtain a dc voltage divider error, a secondary voltage divider plate error, and a merging unit error, where an expression for calculating the correction coefficient is:
Figure 154145DEST_PATH_IMAGE001
in the formula (I), the compound is shown in the specification,
Figure 983561DEST_PATH_IMAGE002
in order to correct the coefficients of the coefficients,
Figure 823210DEST_PATH_IMAGE003
is the equivalent resistance of the low-voltage arm of the dc voltage divider,
Figure 661853DEST_PATH_IMAGE004
is the equivalent resistance of the secondary voltage dividing plate,
Figure 755711DEST_PATH_IMAGE005
inputting impedance for the tester;
the judging module is configured to judge whether the error of the direct-current voltage divider, the error of the secondary voltage divider and/or the error of the merging unit are consistent and whether the error of the direct-current voltage divider, the error of the secondary voltage divider and/or the error of the merging unit are lower than a preset error value;
the first output module is configured to determine that the direct-current voltage divider has a defect if the error of the direct-current voltage divider, the error of the secondary voltage divider and the error of the merging unit are consistent and the error of the direct-current voltage divider, the error of the secondary voltage divider and the error of the merging unit are not lower than a preset error value;
the second output module is configured to determine that the secondary voltage division plate has a set fault if the error of the secondary voltage division plate is consistent with the error of the merging unit, the error of the direct-current voltage divider is lower than a preset error value, and the error of the secondary voltage division plate is not lower than the preset error value;
a third output module configured to determine that a setup fault exists in the merging unit if the error of the dc voltage divider, the error of the secondary voltage divider, and the error of the merging unit are not consistent, and the error of the dc voltage divider and the error of the secondary voltage divider are both lower than a preset error value, and the error of the merging unit is not lower than the preset error value;
the second construction module is configured to construct a secondary debugging and verifying loop of the direct-current voltage transformer, wherein the secondary debugging and verifying loop of the direct-current voltage transformer comprises a direct-current voltage divider, a secondary voltage dividing plate, a merging unit and a tester, the tester generates secondary direct-current voltage and sends the secondary direct-current voltage to the secondary voltage dividing plate, and the tester simultaneously collects small voltage signals of the secondary voltage dividing plate and digital signals of the merging unit;
the first adjusting module is configured to adjust the secondary direct-current voltage to a rated voltage value output by the direct-current voltage divider and adjust a sampling resistor of the secondary voltage dividing plate when the secondary voltage dividing plate has a set fault, so that the error of the secondary voltage dividing plate is lower than a preset error value;
and the second adjusting module is configured to add the output voltage to the rated secondary voltage value and adjust the voltage coefficient of the merging unit to enable the error of the merging unit to be lower than the preset error value when the merging unit has the setting fault.
5. An electronic device, comprising: at least one processor, and a memory communicatively coupled to the at least one processor, wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any of claims 1 to 3.
6. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the method of any one of claims 1 to 3.
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