CN107369632A - A kind of method for testing reliability and system of unencapsulated power device chip - Google Patents
A kind of method for testing reliability and system of unencapsulated power device chip Download PDFInfo
- Publication number
- CN107369632A CN107369632A CN201710564701.1A CN201710564701A CN107369632A CN 107369632 A CN107369632 A CN 107369632A CN 201710564701 A CN201710564701 A CN 201710564701A CN 107369632 A CN107369632 A CN 107369632A
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- Prior art keywords
- power device
- unencapsulated
- reliability
- testing
- unencapsulated power
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention provides a kind of method for testing reliability and system of unencapsulated power device chip.The method for testing reliability of the unencapsulated power device chip includes:Including:(A) after power device is made, first time performance test is carried out to unencapsulated power device;(B) after the first time test passes of the unencapsulated power device, reliability test system is formed by being conductively connected;(C) to the drain electrode making alive of the unencapsulated power device under the first temperature conditionss, and after being kept for the scheduled time, second of performance test is carried out to the unpackaged devices under the conditions of second temperature;(D) according to the test result of the first time performance test and second of performance test, judge whether the unencapsulated power device passes through reliability testing.The method for testing reliability and system of unencapsulated power device chip provided by the invention can shorten the testing time and reduce testing cost.
Description
【Technical field】
The present invention relates to semiconductor die testing technical field, especially, is related to a kind of unencapsulated power device chip
Method for testing reliability and system.
【Background technology】
The most important performance of semiconductor power device is exactly to block high pressure, and device can be in PN junction, metal-half by design
Conductor contact interface, MOS interfaces depletion layer on bear high pressure;But with the increase of applied voltage, depletion layer electric-field intensity
Also it can increase, eventually exceed material limits and avalanche breakdown occur.
Respectively in the both sides of device, it can be with drain-source the two poles of the earth of trench vertical bilateral diffusion field-effect tranisistor (VDMOS)
Electric current is vertically circulated in device inside, add current density, improve rated current, the conducting resistance of unit area also compared with
It is small, it is a kind of very extensive power device of purposes.
It is mobile ion migration and the outer steam infiltration of chip, electric current injection, potential perturbation, miscellaneous in the application process of device
Matter diffusion can all influence the ability that device blocks high pressure, cause component failure.Therefore reliability testing is carried out to device and seems outstanding
To be important.
Currently used method for testing reliability is as follows:After device is made, performance test is carried out, is carried out after test passes
Section and encapsulation step.After the completion of encapsulation, device performance test is carried out again under the conditions of specific reliability testing, if reliability
The front and rear device performance of test declines thinks that the device reliability passes through test within allowed band.The shortcomings that this method
It is:Reliability testing, encapsulation flow time length, it is impossible to carry out reliability immediately after device is made could be carried out after needing encapsulation
Test.Also, packaging cost is high, the development cost of device is added.
In view of this, it is necessary to a kind of method for testing reliability and system of unencapsulated power device chip are provided, with solution
Certainly above mentioned problem existing for prior art.
【The content of the invention】
One of purpose of the present invention is to provide a kind of unencapsulated power device chip to solve the above problems
Method for testing reliability and system.
The method for testing reliability of unencapsulated power device chip provided by the invention, including:(A) it is made in power device
Afterwards, first time performance test is carried out to unencapsulated power device;(B) test and close in the first time of the unencapsulated power device
After lattice, reliability test system is formed by being conductively connected;(C) to the unencapsulated power device under the first temperature conditionss
Drain electrode making alive, and after being kept for the scheduled time, second of property is carried out to the unpackaged devices under the conditions of second temperature
Can test;(D) according to the test result of the first time performance test and second of performance test, judge described unencapsulated
Whether power device passes through reliability testing.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, the unencapsulated power device includes active area and partial pressure region;The active area is positioned at described unencapsulated
The intermediate region of power device, the partial pressure region are arranged on around the active area and surround the active area;It is described
Active area includes grid, source electrode and drain electrode, wherein the grid and source electrode are arranged on the front of the active area, and the drain electrode
It is arranged on the back side of the active area.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, the unencapsulated power device also includes dicing lane, and the dicing lane is arranged on the unencapsulated power device
The outer peripheral areas of part.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, the step (B) includes:The grid and source electrode of the unencapsulated power device are mutual by metallic conduction glue
Short circuit, and connect the metallic conduction glue using the first plain conductor;The drain electrode of the unencapsulated power device is led by metal
Electric gemel connection is to the second plain conductor.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, the step (C) includes:Under conditions of 150 DEG C, by second plain conductor to described unencapsulated
The drain electrode of power device applies voltage and kept for 500 hours;The unencapsulated power device is cooled to 20 DEG C or so, Ran Houzai
Second of performance test is carried out to the unencapsulated power device.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, the step (D) includes:After second of performance test completion, second of performance is surveyed
Examination obtains the second performance test parameter and analyzed compared with the first performance parameter that the first time performance test obtains, to sentence
Whether the hydraulic performance decline of the unencapsulated power device before and after reliability testing that breaks exceeds preset range.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, if the hydraulic performance decline of the unencapsulated power device is without departing from the preset range, then it is assumed that it is described not
Power device is encapsulated by reliability testing, otherwise, then it is assumed that the unencapsulated power device does not pass through the reliability testing.
The reliability test system of unencapsulated power device chip provided by the invention, applied to reliability as described above
Method of testing, the reliability test system include unencapsulated power device, the first plain conductor and the second plain conductor, its
In, the unencapsulated power device includes active area and partial pressure region;The partial pressure region is arranged on around the active area;
The active area includes grid, source electrode and drain electrode, wherein the grid and source electrode are arranged on the front of the active area, and it is described
Drain electrode is arranged on the back side of the active area;The grid and source electrode are by the mutual short circuit of metallic conduction glue, and first gold medal
Category wire passes through the metallic conduction gemel connection to the source electrode and grid;Second plain conductor is connected by metallic conduction glue
It is connected to the drain electrode.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, grid source connecting line of first plain conductor as the unencapsulated power device, second metal
Drain bond wires of the wire as the unencapsulated power device.
One kind as the method for testing reliability in unencapsulated power device chip provided by the invention is improved, in one kind
In preferred embodiment, the reliability connection system includes multiple unencapsulated power devices, and same row or same row simultaneously
Unencapsulated power device can be by metallic conduction gemel connection in same grid source connecting line.
Compared to prior art, the method for testing reliability of unencapsulated power device chip provided by the invention is in power device
Part chip by special is conductively connected design to form reliability test system and carry out corresponding in the state of being in unencapsulated
Reliability testing, so as to shorten the testing time and reduce testing cost.
【Brief description of the drawings】
Technical scheme in order to illustrate the embodiments of the present invention more clearly, embodiment will be described below used in
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for ability
For the those of ordinary skill of domain, on the premise of not paying creative work, it can also be obtained according to these accompanying drawings other attached
Figure, wherein:
Fig. 1 is that a kind of flow of embodiment of method for testing reliability of unencapsulated power device chip provided by the invention is shown
It is intended to;
Fig. 2 is the planar structure schematic diagram of unencapsulated power device chip;
Fig. 3 is the cross-sectional view of the unencapsulated power device chip shown in Fig. 2;
Fig. 4 is that a kind of structure of embodiment of reliability test system of unencapsulated power device chip provided by the invention is shown
It is intended to.
【Embodiment】
The technical scheme in the embodiment of the present invention will be clearly and completely described below, it is clear that described implementation
Example is only the part of the embodiment of the present invention, rather than whole embodiments.It is common based on the embodiment in the present invention, this area
All other embodiment that technical staff is obtained under the premise of creative work is not made, belong to the model that the present invention protects
Enclose.
To solve the problems, such as that the power device chip of prior art needs that reliability testing could be carried out after encapsulation, this
Invention provides a kind of method for testing reliability of unencapsulated power device chip, and it is mainly in power device chip and not sealed
Design is conductively connected to form reliability test system and carry out corresponding reliability testing by special in the state of dress, from
And the testing time can be shortened and reduce testing cost.
A kind of referring to Fig. 1, its implementation of method for testing reliability for unencapsulated power device chip provided by the invention
The flow chart of example.The method for testing reliability of the unencapsulated power device chip can apply to power device chip, such as
The reliability testing of trench vertical bilateral diffusion field-effect tranisistor (VDMOS).Specifically, the unencapsulated power device chip
Method for testing reliability mainly include the following steps that:
Step S1, after power device is made, first time performance test is carried out to unencapsulated power device;
Specifically, Fig. 2 and Fig. 3 are referred to, it is respectively the planar structure of the unencapsulated power device after formation
Schematic diagram.The unencapsulated power device includes active area, partial pressure region and dicing lane;The active area is positioned at described unencapsulated
The intermediate region of power device, the partial pressure region are arranged on around the active area and surround the active area;It is described
Dicing lane is arranged on the outer peripheral areas of the power device.Wherein, the active area includes grid, source electrode and drain electrode, wherein institute
State grid and source electrode is arranged on the front of the active area, and described drain is arranged on the back side of the active area.
In step sl, first time performance test is carried out to the unencapsulated power device to survey according to traditional performance
Examination mode is carried out, and here is omitted;Also, corresponding the can be obtained after step S1 first time performance test is completed
One performance test parameter, the described first new energy test parameter can carry out being saved in order to follow-up reliability testing analysis use.
Step S2, after the first time test passes of the unencapsulated power device, to be formed reliably by being conductively connected
Property test system, wherein the grid and source electrode of the unencapsulated power device pass through metallic conduction glue short circuit and connect the first metal
Wire, and its drain electrode passes through the plain conductor of metallic conduction gemel connection second;
Specifically, after step S1 is qualified for the first time performance test of the unencapsulated power device, described
Reliability test system as shown in Figure 4 is formed by conduction design on the basis of unencapsulated power device.
Specifically, first, by metallic conduction glue by the positive grid of the active area and the mutual short circuit of draining, the gold
Category conducting resinl can be particularly formed as extending to the strips of conductive glue of the grid from the source electrode;Then, the first metal is passed through
Wire connects the metallic conduction glue, wherein first plain conductor can connect as the grid source of the unencapsulated power device
Wiring;Also, the second plain conductor is connected to the drain electrode of the active area by metallic conduction glue, wherein second metal
Wire can be as the drain bond wires of the unencapsulated power device.It is conductively connected, and can be formed such as Fig. 4 institutes by above-mentioned
The reliability test system shown.
It should be noted that because the reliability test system is that connection is formed after the power device is made
, now also the power device is not cut into slices and encapsulated, therefore reliability connection system can be wrapped simultaneously
Multiple unencapsulated power devices are included, and the unencapsulated power device of same row (or same row) can be connected by metallic conduction glue
It is connected on same grid source connecting line.
Step S3, pass through drain electrode of second plain conductor to the unencapsulated power device under the first temperature conditionss
The unpackaged devices are carried out second of performance test by making alive and after being kept for the scheduled time under the conditions of second temperature;
Specifically, in step s3, first temperature conditionss can be 150 DEG C or so, and the second temperature condition
Can be 20 DEG C or so, typically 500 hours or so the scheduled time.In other words, in step s3, exist first
Under conditions of 150 DEG C, voltage and holding 500 are applied by drain electrode of second plain conductor to the unencapsulated power device
Hour or so;Then, the unencapsulated power device is cooled to 20 DEG C or so, then the unencapsulated power device entered again
Second of performance test of row and obtain the second performance test parameter.
Step S4, according to the test result of the first time performance test and second of performance test, described in judgement
Whether unencapsulated power device passes through reliability testing.
Specifically, after step S3 second of performance test is completed, by the second performance test parameter and step
The first performance test parameter that rapid S1 is obtained is compared analysis, to judge the unencapsulated power before and after the reliability testing
Whether the hydraulic performance decline of device exceeds preset range, such as, whether hydraulic performance decline exceeds 5%-10%;It is if pre- without departing from described
If scope, then it is assumed that the unencapsulated power device is by reliability testing, otherwise, then it is assumed that the unencapsulated power device is not
Pass through the reliability testing.
Compared to prior art, the method for testing reliability of unencapsulated power device chip provided by the invention is in power device
Part chip by special is conductively connected design to form reliability test system and carry out corresponding in the state of being in unencapsulated
Reliability testing, so as to shorten the testing time and reduce testing cost.
Above-described is only embodiments of the present invention, it should be noted here that for one of ordinary skill in the art
For, without departing from the concept of the premise of the invention, improvement can also be made, but these belong to the protection model of the present invention
Enclose.
Claims (10)
- A kind of 1. method for testing reliability of unencapsulated power device chip, it is characterised in that including:(A) after power device is made, first time performance test is carried out to unencapsulated power device;(B) after the first time test passes of the unencapsulated power device, reliability testing system is formed by being conductively connected System;(C) to the drain electrode making alive of the unencapsulated power device under the first temperature conditionss, and after being kept for the scheduled time, Second of performance test is carried out to the unpackaged devices under the conditions of second temperature;(D) according to the test result of the first time performance test and second of performance test, the unencapsulated work(is judged Whether rate device passes through reliability testing.
- 2. the method for testing reliability of unencapsulated power device chip according to claim 1, it is characterised in that it is described not Encapsulation power device includes active area and partial pressure region;The active area is located at the intermediate region of the unencapsulated power device, The partial pressure region is arranged on around the active area and surrounds the active area;The active area includes grid, source electrode And drain electrode, wherein the grid and source electrode are arranged on the front of the active area, and the drain electrode is arranged on the active area The back side.
- 3. the method for testing reliability of unencapsulated power device chip according to claim 1, it is characterised in that it is described not Encapsulation power device also includes dicing lane, and the dicing lane is arranged on the outer peripheral areas of the unencapsulated power device.
- 4. the method for testing reliability of unencapsulated power device chip according to claim 2, it is characterised in that the step Suddenly (B) includes:The grid and source electrode of the unencapsulated power device are connected by the mutual short circuit of metallic conduction glue, and using the first plain conductor Connect the metallic conduction glue;The drain electrode of the unencapsulated power device passes through metallic conduction gemel connection to the second plain conductor.
- 5. the method for testing reliability of unencapsulated power device chip according to claim 1, it is characterised in that the step Suddenly (C) includes:Under conditions of 150 DEG C, voltage is applied simultaneously by drain electrode of second plain conductor to the unencapsulated power device Kept for 500 hours;The unencapsulated power device is cooled to 20 DEG C or so, second of property then is carried out to the unencapsulated power device again Can test.
- 6. the method for testing reliability of unencapsulated power device chip according to claim 1, it is characterised in that the step Suddenly (D) includes:After second of performance test completion, second of performance test is obtained into the second performance test parameter and institute State the first performance parameter that first time performance test obtains and be compared analysis, to judge before and after reliability testing described not seal Whether the hydraulic performance decline of dress power device exceeds preset range.
- 7. the method for testing reliability of unencapsulated power device chip according to claim 6, it is characterised in that if institute The hydraulic performance decline of unencapsulated power device is stated without departing from the preset range, then it is assumed that the unencapsulated power device passes through reliable Property test, otherwise, then it is assumed that the unencapsulated power device does not pass through the reliability testing.
- 8. a kind of reliability test system of unencapsulated power device chip, surveyed applied to reliability as claimed in claim 1 Method for testing, it is characterised in that the reliability test system includes unencapsulated power device, the first plain conductor and the second metal Wire, wherein, the unencapsulated power device includes active area and partial pressure region;The partial pressure region is arranged on the active area Around;The active area includes grid, source electrode and drain electrode, wherein the grid and source electrode are being arranged on the active area just Face, and described drain is arranged on the back side of the active area;The grid and source electrode are by the mutual short circuit of metallic conduction glue, and institute State the first plain conductor and pass through the metallic conduction gemel connection to the source electrode and grid;Second plain conductor passes through metal Conducting resinl is connected to the drain electrode.
- 9. the reliability test system of unencapsulated power device chip according to claim 8, it is characterised in that described Grid source connecting line of one plain conductor as the unencapsulated power device, second plain conductor is as the unencapsulated work( The drain bond wires of rate device.
- 10. the reliability test system of unencapsulated power device chip according to claim 9, it is characterised in that described Reliability connection system includes multiple unencapsulated power devices simultaneously, and the unencapsulated power device of same row or same row can With by metallic conduction gemel connection in same grid source connecting line.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109406979A (en) * | 2018-09-27 | 2019-03-01 | 珠海格力电器股份有限公司 | A kind of method and device for estimating device reliability |
CN109596964A (en) * | 2018-12-26 | 2019-04-09 | 山东阅芯电子科技有限公司 | The method and system of compatible a variety of environmental aging tests |
CN112164416A (en) * | 2020-09-21 | 2021-01-01 | 西安交通大学 | Memory test method, memory chip and memory system |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1165401A (en) * | 1996-05-10 | 1997-11-19 | 三星电子株式会社 | Testing apparatus for non-packaged semiconductor chip |
CN1512171A (en) * | 2002-12-27 | 2004-07-14 | 上海贝岭股份有限公司 | Method for detecting package material reliability of plastic package chip carrier device with leads |
CN201477168U (en) * | 2009-08-18 | 2010-05-19 | 中芯国际集成电路制造(上海)有限公司 | Wafer grade application and reliability testing device |
CN105047578A (en) * | 2015-07-17 | 2015-11-11 | 北京兆易创新科技股份有限公司 | Method for evaluating transistor |
CN105789182A (en) * | 2016-04-29 | 2016-07-20 | 上海华力微电子有限公司 | MOS structure used for packaging level reliability test and manufacturing method thereof |
CN106019111A (en) * | 2016-05-17 | 2016-10-12 | 杰华特微电子(杭州)有限公司 | Chip testing method |
US20170074923A1 (en) * | 2012-03-02 | 2017-03-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reliability testing method |
CN106684008A (en) * | 2015-11-05 | 2017-05-17 | 中芯国际集成电路制造(上海)有限公司 | Reliability test structure of semiconductor device and test method thereof |
-
2017
- 2017-07-12 CN CN201710564701.1A patent/CN107369632A/en active Pending
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1165401A (en) * | 1996-05-10 | 1997-11-19 | 三星电子株式会社 | Testing apparatus for non-packaged semiconductor chip |
CN1512171A (en) * | 2002-12-27 | 2004-07-14 | 上海贝岭股份有限公司 | Method for detecting package material reliability of plastic package chip carrier device with leads |
CN201477168U (en) * | 2009-08-18 | 2010-05-19 | 中芯国际集成电路制造(上海)有限公司 | Wafer grade application and reliability testing device |
US20170074923A1 (en) * | 2012-03-02 | 2017-03-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reliability testing method |
CN105047578A (en) * | 2015-07-17 | 2015-11-11 | 北京兆易创新科技股份有限公司 | Method for evaluating transistor |
CN106684008A (en) * | 2015-11-05 | 2017-05-17 | 中芯国际集成电路制造(上海)有限公司 | Reliability test structure of semiconductor device and test method thereof |
CN105789182A (en) * | 2016-04-29 | 2016-07-20 | 上海华力微电子有限公司 | MOS structure used for packaging level reliability test and manufacturing method thereof |
CN106019111A (en) * | 2016-05-17 | 2016-10-12 | 杰华特微电子(杭州)有限公司 | Chip testing method |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109406979A (en) * | 2018-09-27 | 2019-03-01 | 珠海格力电器股份有限公司 | A kind of method and device for estimating device reliability |
CN109596964A (en) * | 2018-12-26 | 2019-04-09 | 山东阅芯电子科技有限公司 | The method and system of compatible a variety of environmental aging tests |
CN112164416A (en) * | 2020-09-21 | 2021-01-01 | 西安交通大学 | Memory test method, memory chip and memory system |
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Application publication date: 20171121 |