CN107362448A - A kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit - Google Patents
A kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit Download PDFInfo
- Publication number
- CN107362448A CN107362448A CN201710488903.2A CN201710488903A CN107362448A CN 107362448 A CN107362448 A CN 107362448A CN 201710488903 A CN201710488903 A CN 201710488903A CN 107362448 A CN107362448 A CN 107362448A
- Authority
- CN
- China
- Prior art keywords
- type flip
- circuit
- flip flop
- input
- port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/372—Arrangements in connection with the implantation of stimulators
- A61N1/37211—Means for communicating with stimulators
- A61N1/37217—Means for communicating with stimulators characterised by the communication link, e.g. acoustic or tactile
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/362—Heart stimulators
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/372—Arrangements in connection with the implantation of stimulators
- A61N1/37211—Means for communicating with stimulators
- A61N1/37252—Details of algorithms or data aspects of communication system, e.g. handshaking, transmitting specific data or segmenting data
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/372—Arrangements in connection with the implantation of stimulators
- A61N1/37211—Means for communicating with stimulators
- A61N1/37252—Details of algorithms or data aspects of communication system, e.g. handshaking, transmitting specific data or segmenting data
- A61N1/37276—Details of algorithms or data aspects of communication system, e.g. handshaking, transmitting specific data or segmenting data characterised by means for reducing power consumption during telemetry
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
Landscapes
- Health & Medical Sciences (AREA)
- Radiology & Medical Imaging (AREA)
- Animal Behavior & Ethology (AREA)
- Engineering & Computer Science (AREA)
- Biomedical Technology (AREA)
- Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
- Veterinary Medicine (AREA)
- Life Sciences & Earth Sciences (AREA)
- Public Health (AREA)
- General Health & Medical Sciences (AREA)
- Heart & Thoracic Surgery (AREA)
- Cardiology (AREA)
- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
The present invention relates to a kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit.Vitro program controlled instrument and intracorporeal heart pacemaker are carried out data transmission by the coupling of inductance coil in a manner of carrier free baseband digital signal, and function of the intracorporeal heart pacemaker telecommunication circuit in addition to arousal function is closed when without program control instrument and pacemaker data transfer.When waking up, the working method of intracorporeal heart pacemaker telecommunication circuit arousal function is discontinuous work, 32ms is opened in 1s, when vitro program controlled instrument needs to carry out data interaction with intracorporeal heart pacemaker, intracorporeal heart pacemaker telecommunication circuit is waken up by continuously transmitting specific wake-up pulse group, telecommunication circuit is opened if successfully waking up and is converted to continuous operation mode.Intracorporeal heart pacemaker telecommunication circuit is opened so as to be controlled by vitro program controlled instrument, its mode of operation is changed, is also prevented from false wake-up of the interference signal to telecommunication circuit.
Description
Technical field
The invention belongs to integrated circuit fields, and in particular to a kind of applied to pacemaker internal radio communication circuit
Automatic wake-up circuit.
Background technology
Modern pacemaker nearly all has the function of two-way communication, i.e., will be not after pacemaker implantation human body
The wireless information interaction completed in the case of performing an operation with extraneous program control instrument is operated on, this process needs pacemaker to have corresponding nothing
Line telecommunication circuit.Pacemaker typically requires that work for 10 years is even more long, in power consumption by single non-exchange battery powered
Requirement it is extremely harsh, and pacemaker work most times in be not with program control instrument carry out data interaction
Demand, therefore modern pacemaker requirement, when without data exchange, communication close circuit reduces the operation work(of pacemaker
Consumption, telecommunication circuit wakes up in which can not be disturbed signal error when without data exchange, when needing to carry out data exchange, journey
Control instrument will guarantee correctly wakes up communications circuitry.The main method of wakes up communications circuitry is controlled using outside plus magnetic field at present
Internal dry-reed tube switch is made to open and close intra-body communication circuit.This method needs extra tongue tube device, and
Volume externally-applied magnetic field is wanted, integrated level is low and process is complicated, while can open telecommunication circuit, false wakeups rate by any external magnetic field
It is high.For telecommunication circuit, a high integration, low-power consumption, the wake-up that signal is correctly waken up can be sent by program control instrument
Circuit is essential.
The content of the invention
It is an object of the invention to overcome shortcoming present in above-mentioned prior art, there is provided one kind is applied to pacemaker
The automatic wake-up circuit of internal radio communication circuit, there is the advantages of low in energy consumption, fully integrated, false wakeups rate is low, and whole mistake
Journey does not need manual intervention, simple to operate, while circuit structure is simple, and the inessential working time is short, low in energy consumption, can effectively carry
High pacemaker power consumption management efficiency, pacemaker battery energy is saved, reduce cost, improve pacemaker service behaviour.
To achieve the above object, the present invention uses following technical scheme：
A kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit, including the detection of the first rising edge
Circuit, Divide-by-3 circuit, judge window generation circuit and wake up decision circuit, described judgement window generation circuit includes rising
Terminate range estimation circuit to judgement window along counting circuit, the second rising edge detection circuit and rising edge；First rising edge is examined
The input of slowdown monitoring circuit is connected to the input P2 of wake-up circuit, and output end connection judges the Enable Pin of window generation circuit and upper
Rise the Enable Pin along counting circuit；The input of Divide-by-3 circuit is connected to input clock signal CLK port P3, output end connection
To the input for judging window generation circuit；The input of rising edge counting circuit is connected to the input P2 of wake-up circuit, on
Rise along the high level output end of counting circuit be connected to the second rising edge detection circuit Enable Pin and rising edge to judgement window
Terminate the input of range estimation circuit, low level output end is connected to the first rising edge detection circuit；Second rising edge detects
Circuit input end is connected to the input P2 of wake-up circuit, and output end is connected to the Enable Pin for waking up decision circuit；Rising edge arrives
The output end that judgement window terminates range estimation circuit is connected to the Enable Pin for waking up decision circuit；Wake up the input of decision circuit
End is connected to the output end for judging window generation circuit, and output end is connected to the output end P4 of wake-up circuit；Described wake-up electricity
The output end for the hysteresis comparator that the input P2 on road is connected to telecommunication circuit and wake-up circuit shares, the output of wake-up circuit
End P4 is connected to pacemaker MCU input；Schema control port P5 is connected to the output of telecommunication circuit logic control element
End.
Described the first rising edge detection circuit includes d type flip flop D1；D type flip flop D1 D inputs and supply voltage phase
Connection, CK inputs are connected with wake-up circuit input port, Q output and d type flip flop D2, d type flip flop D3, d type flip flop D4,
D type flip flop D5, d type flip flop D6, d type flip flop D7, d type flip flop D8 reseting port RB are connected, QB output ends and d type flip flop
D17 CK inputs are connected, and reseting port RB is connected with two inputs with door I3 output port.
Described Divide-by-3 circuit includes d type flip flop D11 and d type flip flop D12, d type flip flop D11 D input ports with from
One of input port of body QB output ports, d type flip flop D12 CK input ports and two input OR gate I1 is connected, and CK is defeated
Inbound port is connected with two inputs with door I4 output port, the input OR gates of reseting port RB and two I1 output port and D
Trigger D12 reseting port RB is connected；D type flip flop D12 D input ports and itself QB output port and two inputs or
One of door I1 input port is connected.
Described judgement window generation circuit includes：D type flip flop D2, d type flip flop D3, d type flip flop D4 and d type flip flop D5；D
Trigger D2 D inputs are connected with the QB output ends of itself and d type flip flop D3 CK inputs, d type flip flop D2 CK
Input is connected with d type flip flop D12 Q output；D type flip flop D3 D inputs trigger with the QB output ends and D of itself
Device D4 CK inputs are connected；D type flip flop D4 D inputs input with the QB output ends of itself and d type flip flop D5 CK
End is connected；One of d type flip flop D5 D inputs and itself QB output end and two inputs and door I3 input port are connected
Connect.
Described rising edge counting circuit includes d type flip flop D6, d type flip flop D7 and d type flip flop D8, and d type flip flop D6 D is defeated
Enter end with the QB output ends of itself and d type flip flop D7 CK inputs to be connected, CK inputs and wake-up circuit input port
P2 is connected；D type flip flop D7 D inputs are connected with itself QB output end, the CK inputs of Q output and d type flip flop D8
It is connected；D type flip flop D8 Q output is connected with d type flip flop D9 RB reset terminals and d type flip flop D10 CK inputs.
Described the second rising edge detection circuit includes d type flip flop D9, d type flip flop D9 D inputs and supply voltage VDD
Port P1 is connected, and CK inputs are connected with wake-up circuit input port P2, and QB output ports input defeated with door I2 with two
One in inbound port is connected.
Described rising edge terminates range estimation circuit to judgement window to be included：D type flip flop D10, d type flip flop D10 D are defeated
Enter end with supply voltage vdd terminal mouth P1 to be connected, the D input ports and d type flip flop D16 of RB reseting ports and d type flip flop D16
QB output ports be connected, Q output mouth and two inputs and one and d type flip flop D13 in door I2 input port,
D14, D15, D16 RB reseting ports are connected；D type flip flop D13 D input ports trigger with itself QB output port and D
Device D14 CK input ports are connected, and CK input ports are connected with two inputs with door I4 output port；D type flip flop D14's
D input ports are connected with the CK input ports of itself QB output port and d type flip flop D15；D type flip flop D15 D inputs
Mouth is connected with the CK input ports of itself QB output port and d type flip flop D16.
Described wake-up decision circuit includes：Two inputs and door I2, two inputs and door I2 output ports and d type flip flop D17
Reseting port RB is connected；D type flip flop D17 D input ports are connected with supply voltage vdd terminal mouth P1, and Q output mouth is with calling out
The circuit output port P4 that wakes up is connected.
Described input clock signal CLK port P3 are connected with two inputs with one of door I4 input port；Pattern control
Port P5 processed and two inputs and one of door I3 input port and two input to be connected with one of door I4 input port.
The not connected port of all d type flip flops is to be empty port, not line；All d type flip flops are that clock rises
Along triggering, low level reset d type flip flop.
Described input clock signal is frequency f=32786Hz crystal oscillator clock signal.
Compared with prior art, the present invention has following beneficial effect：
The present invention obtains accurate knowledge by adding digital circuit simple in construction after the hysteresis comparator of telecommunication circuit
The function of other program control instrument wake-up signal and wakes up communications circuitry.Existing technology is compared to, the present invention need not rise in heart
Fight device pcb board on add extra dry-reed tube switch, open telecommunication circuit without volume externally-applied magnetic field in communication process, because
Magnetic field added by non-program control instrument is also not present by the possibility of telecommunication circuit false wake-up in this.By the detection mode of dual judgement window,
Wake-up condition is strictly limited in the range of preset signals, almost avoiding non-program control instrument signal or interference signal will communicate
The possibility of circuit false wake-up.Vitro program controlled instrument and intracorporeal heart pacemaker are by the coupling of inductance coil with carrier free base band
Digital signaling carries out data transmission, and intracorporeal heart pace-making is closed when without program control instrument and pacemaker data transfer
Function of the device telecommunication circuit in addition to arousal function.When waking up, intracorporeal heart pacemaker telecommunication circuit arousal function
Working method is discontinuous work, i.e., 32ms is opened in 1s, when vitro program controlled instrument needs to enter line number with intracorporeal heart pacemaker
During according to interaction, intracorporeal heart pacemaker telecommunication circuit is waken up by continuously transmitting specific wake-up pulse group, once into
Work(wakes up then opening telecommunication circuit and is converted to continuous operation mode.Intracorporeal heart is opened so as to be controlled by vitro program controlled instrument
Pacemaker telecommunication circuit, its mode of operation is changed, be also prevented from false wake-up of the interference signal to telecommunication circuit.Wake-up identified
Journey is not required to manual intervention, while circuit structure is simple, treats that the power consumption consumption under wake-up states is low, wakes up successfully to be automatically performed
Automatically control telecommunication circuit and enter communication operation mode, and close wake-up circuit automatically, reopened again after end to be communicated,
Pacemaker power consumption management efficiency is effectively improved, saving pacemaker battery can be excessive, extends pacemaker service life, reduces into
This.
Brief description of the drawings
Fig. 1 is the wake-up schematic diagram of pacemaker internal radio communication circuit；
Fig. 2 is the wake-up circuit schematic diagram of pacemaker internal radio communication circuit；
Fig. 3 is the simulation result figure (2.8v) of circuit shown in Fig. 2；
Fig. 4 is the simulation result figure (1.8v) of circuit shown in Fig. 2；
Fig. 5 is the simulation result figure (long pulsewidth) of circuit shown in Fig. 2；
Fig. 6 is the simulation result figure (short pulse duration) of circuit shown in Fig. 2；
Fig. 7 is the simulation result figure (high-frequency) of circuit shown in Fig. 2；
Fig. 8 is the simulation result figure (low frequency) of circuit shown in Fig. 2.
Embodiment
Below in conjunction with the accompanying drawings, the present invention is described in further detail.
Referring to Fig. 1 and 2, a kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit of the invention,
Including the first rising edge detection circuit, Divide-by-3 circuit, judge window generation circuit and wake-up decision circuit, judge that window produces
Circuit includes rising edge counting circuit, the second rising edge detection circuit and rising edge and terminates range estimation circuit to judgement window；
The input of first rising edge detection circuit is connected to the input P2 of wake-up circuit, and the first rising edge detects the output end of circuit
Connection judges the Enable Pin of window generation circuit and the Enable Pin of rising edge counting circuit, and the input of Divide-by-3 circuit is connected to
Input clock signal CLK port P3, the output end of Divide-by-3 circuit are connected to the input for judging window generation circuit；Rising edge
The input of counting circuit is connected to the input P2 of wake-up circuit, and the high level output end of rising edge counting circuit is connected to
The Enable Pin and rising edge of two rising edges detection circuit terminate the input of range estimation circuit, low level output to judgement window
End is connected to the first rising edge detection circuit, and the second rising edge detection circuit input end is connected to the input P2 of wake-up circuit,
Second rising edge detection circuit output end is connected to the Enable Pin for waking up decision circuit, and rising edge terminates distance to judgement window and sentenced
The output end for determining circuit is connected to the Enable Pin for waking up decision circuit；The input for waking up decision circuit is connected to judgement window generation
The output end of circuit, the output end for waking up decision circuit are connected to the output end P4 of wake-up circuit.The input P2 of wake-up circuit
It is connected to telecommunication circuit and the output end of hysteresis comparator that wake-up circuit shares, the output end P4 of wake-up circuit is connected to the heart
Dirty pacemaker MCU input.Schema control port P5 is connected to the output of telecommunication circuit logic control element.
Referring to Fig. 2, the first rising edge detection circuit includes：D type flip flop D1 D inputs are connected with supply voltage, CK
Input is connected with wake-up circuit input port, the reseting port of Q output and d type flip flop D2, D3, D4, D5, D6, D7, D8
RB is connected, and QB output ends are connected with d type flip flop D17 CK inputs, the inputs of reseting port RB and two and door I3 output
Port is connected.
Divide-by-3 circuit includes：The CK of d type flip flop D11 D input ports and itself QB output port, d type flip flop D12 is defeated
One of inbound port and two input OR gate I1 input port is connected, CK input ports and two inputs and door I4 output port
It is connected, reseting port RB is connected with two input OR gate I1 output port and d type flip flop D12 reseting port RB；D is touched
Hair device D12 D input ports input one of OR gate I1 input port with itself QB output port and two and are connected.
Judge that window generation circuit includes：D type flip flop D1；D type flip flop D2 D inputs and itself QB output ends and
D type flip flop D3 CK inputs are connected, and d type flip flop D2 CK inputs are connected with d type flip flop D12 Q output；D is touched
Hair device D3 D inputs are connected with the QB output ends of itself and d type flip flop D4 CK inputs；D type flip flop D4 D inputs
End is connected with the QB output ends of itself and d type flip flop D5 CK inputs；D type flip flop D5 D inputs and itself QB is defeated
Go out end and two inputs are connected with one of door I3 input port.
Rising edge counting circuit includes：D type flip flop D6 D inputs and itself QB output ends and d type flip flop D7's
CK inputs are connected, and CK inputs are connected with wake-up circuit input port P2；D type flip flop D7 D inputs and itself QB
Output end is connected, and Q output is connected with d type flip flop D8 CK inputs；D type flip flop D8 Q output and d type flip flop D9
RB reset terminals and d type flip flop D10 CK inputs be connected.
Second rising edge detection circuit includes：D type flip flop D9 D inputs are connected with supply voltage vdd terminal mouth P1, CK
Input is connected with wake-up circuit input port P2, QB output ports and two inputs and a phase in door I2 input port
Connection.
Rising edge terminates range estimation circuit to judgement window to be included：D type flip flop D10 D inputs and supply voltage VDD
Port P1 is connected, and RB reseting ports are connected with d type flip flop D16 D input ports and d type flip flop D16 QB output ports
Connect, Q output mouth is answered with two inputs with one and d type flip flop D13, D14, D15, D16 RB in door I2 input port
Bit port is connected；D type flip flop D13 D input ports and itself QB output port and d type flip flop D14 CK input ports
It is connected, CK input ports are connected with two inputs with door I4 output port；D type flip flop D14 D input ports and itself QB
Output port and d type flip flop D15 CK input ports are connected；D type flip flop D15 D input ports and itself QB output end
Mouth and d type flip flop D16 CK input ports are connected；D type flip flop D16.Waking up decision circuit includes：Two inputs are defeated with door I2
Exit port is connected with d type flip flop D17 reseting ports RB；D type flip flop D17 D input ports and supply voltage vdd terminal mouth P1 phases
Connection, Q output mouth are connected with wake-up circuit output port P4.The inputs of input clock signal CLK port P3 and two and door I4
One of input port be connected.One of the inputs of Schema control port P5 and two and door I3 input port and two inputs and door
One of I4 input port is connected.The not connected port of all d type flip flops is to be empty port, not line.All D triggerings
D type flip flop that device is rising edge clock triggering, that low level resets.
With reference to figure 2, altogether including 17 d type flip flops, 4 gates.In this example, the rising that d type flip flop uses
Along triggering, low level reset d type flip flop, of course, it is possible to what the d type flip flop or high level that are triggered using trailing edge were resetted
D type flip flop replaces the d type flip flop in this example.In this case, added before the d type flip flop port of relative change anti-phase
Device or the connection input signal negated corresponding with this example on the port of relative change.Input clock letter in this example
Number CLK is frequency f=32786Hz crystal oscillator clock signal, and the design load that wake-up circuit input port connects signal is continuous
, single pulsewidth is 122 μ s, and two adjacent pulse rising edges and rising edge are at intervals of 244 μ s pulse train, corresponding ginseng
Examine the INPUT signal in Fig. 3.The clock signal clk of input can use the clock signal of other frequencies to replace.In such case
Under, the signal that is connected of wake-up circuit input port for being designed to wake up also does corresponding adjustment, and method of adjustment is three arteries and veins
The pulsewidth of punching and the multiple spaced between divided by input clock signal frequency changes relatively.
When program control instrument has communication requirement, coupled by coil in vivo every the continuous 3 pulses (pulsewidth 122 of 6ms transmissions
μ s, rising edge and μ s of rising edge interval 244 between adjacent pulse).Treat wake-up circuit under wake-up states and hysteresis comparator simultaneously
It is not normally opened, 32ms is opened in 1s, when hysteresis comparator and wake-up circuit are under opening, train of pulse will pass through
Filter circuit and hysteresis comparator, frequency identical train of pulse, that is, adjacent arteries and veins are reduced into the output end of hysteresis comparator
Time interval is still 244 μ s between punching, but the width of pulse is had fluctuation by communication distance.This train of pulse is wake-up circuit
The connected signal of input port.
Treat under wake-up states, Schema control port P5 is high level, and after successfully waking up, Schema control port P5 is changed into low
Level, now any input can not also consume power consumption in wake-up circuit output port output result, wake-up circuit.
For Divide-by-3 circuit：What is loaded on input clock signal CLK is the crystal oscillator clock signal that frequency is 32786Hz,
By being entered with door I4 by the input of d type flip flop D11 and D12 and OR gate the I1 Divide-by-3 circuit formed, i.e. d type flip flop
D11 CK input ports.By the later clock signal of d type flip flop D12 Q output mouth output three frequency division.
For the first rising edge detection circuit, judge window generation circuit：When the wake-up being connected with the first d type flip flop D1
After there is first rising edge on the P2 of input signal port, because two inputs and door I3 output port are high level, the first D is touched
Hair device D1 output port Q is changed into high level from low level, and output port QB has high level to be changed into low level.D1 Q output
Mouth uprise after by the connection of the enable port to d type flip flop D2, D3, D4, D5, D6, D7, D8, this seven d type flip flops are complete
Open in portion.The judgement window generation circuit being made up of d type flip flop D1, D2, D3, D4, D5 is started working, and it is inputted to be triggered by D
The output signal for the Divide-by-3 circuit that device D2 CK input ports introduce, its output port are d type flip flop D1 Q output mouth.
D type flip flop D2, D3, D4, D5 connect into eight frequency dividing circuits in this partial circuit, as judge window timer,
Timing time after by d type flip flop D5 QB output ends with door I3 connection, be then connected to d type flip flop D1 Enable Pin,
Carry out the output port Q rows in d type flip flop D1 into a judgement window, judge that the width of window goes out due to waking up input signal port
Existing first rising edge is asynchronous with the clock signal after three frequency division, and for the scope of a fluctuation, scope is 640.5 μ s-732 μ
s。
For rising edge counting circuit：Judge window signal for high level while, also enable d type flip flop D6, D7, D8
Make its start-up operation.It is d type flip flop D6, D7, D8 by the enable port of d type flip flop D6, D7, D8 rising edge counting circuit formed
RB enable ports；Input port is wake-up circuit input port P2；Output port is d type flip flop D8 output port Q.D6、
D7 and D8 connects into a counter, and it is 2 to count number, defeated when input port P2 is enabled after after two rising edges of appearance
The Q output mouth of exit port, i.e. d type flip flop D8 is changed into high level from low level.
Circuit is detected for the second rising edge：The second rising edge being made up of d type flip flop D9 detects circuit, and enable port is
D type flip flop D9 RB enable ports；Input as d type flip flop D9 input port CK, be connected to wake-up circuit input port P2；Output
For d type flip flop D9 QB output ports, one of two inputs and door I2 input port are connected to.The output of rising edge counting circuit
After being changed into high level from low level, d type flip flop D9 is enabled opening, when d type flip flop D9 input port detects rising edge,
Output QB ports are changed into low level from high level, if not detecting rising edge, output port QB keeps high level constant.
Terminate range estimation circuit to judgement window for rising edge：It is made up of d type flip flop D10, D13, D14, D15, D16
Rising edge to judging that window terminates range estimation circuit, enable port is d type flip flop D10 CK input ports；Input port
For d type flip flop D13 CK input ports, the I4 of two inputs and door output port is connected to, when Schema control port P5 is height
During level, input port, which is equal to, is connected to input clock signal CLK ports；Output port is d type flip flop D10 Q output
Mouthful.When wake up input port signal there is the 3rd rising edge when, that is, rising edge counting circuit output by low level
When saltus step is high level, d type flip flop D10 output is also high level by low transition, and d type flip flop D10 Enable Pin connects
Be as timer connection d type flip flop D13, D14, D15, D16 output：D type flip flop D16 QB output ends.Thus beat
Another is opened and has judged window, this window level is d type flip flop D10 Q output voltages.Window start is that the 3rd rising edge is opened
Begin, window width is 213.5 μ s-244 μ s.
For waking up decision circuit：The wake-up decision circuit being made up of two inputs with door I2 and d type flip flop D17, it is inputted
For d type flip flop D17 CK input ports, export the Q output mouth for D17, enable port be two inputs with two of door I2 it is defeated
Inbound port.The working method for waking up decision circuit is to judge that trailing edge occurs in window as caused by judgement window generation circuit
When, that is, judge the judgement whether waken up at the end of window, judge that depend on rising edge terminates range estimation to judgement window
The output result of circuit and the second rising edge detection circuit, terminate range estimation circuit and second if up along to judgement window
The output result of rising edge detection circuit is all high level, then the output result for waking up decision circuit is high level, otherwise
For low level.
Fig. 3 is the simulation result figure of circuit shown in Fig. 2.The figure be 2.8V in the case of simulation result, it can be seen that upper figure
Input signal INPUT shown in solid is the wake-up signal of standard, the μ s of pulsewidth 122, at intervals of 244 μ s between adjacent rising edges；
Wake-up signal WAKEUP shown in upper figure dotted line, which is shown in, judges that window wakes up decision circuit and successfully sends wake-up arteries and veins after terminating
Punching, function are correct.Figure below signal WINDOW_A shown in solid is wake-up decision circuit, it can be seen that is arrived in first rising edge
Shi Chenggong is opened, and is closed automatically in the range of the window time of design.Signal WINDOW_B shown in figure below dotted line is on the 3rd
Liter edge is terminated range estimation window to judgement window and shown, rises on a third along window opening during arrival, in the window of design
Closed automatically in time range, wake-up signal is reset into low level while closing, and judge window before this close
Window caused by mouth generation circuit has not degraded, therefore can successfully wake up.
Fig. 4 is the simulation result in the case of 1.8V minimum power supply voltage,s, it can be seen that it is identical with the logical consequence in Fig. 3,
Therefore function is equally correct.
Program control instrument sends the signal that pulsewidth is 122 μ s in real work situation, to the input signal end pulse of wake-up circuit
Width can fluctuate, and change between 25 μ s-130 μ s.Whether Fig. 5 and Fig. 6 is just simulated can also be normal under such limiting case
Wake up.
Fig. 5 is that pwm input signal is changed into 219 μ s, but adjacent rising edges interval is constant, is still 244 μ s, it can be seen that
Still can be with normal wakeup.
Fig. 6 is that pwm input signal is changed into 25 μ s, and adjacent rising edges interval is constant, not yet 244 μ s, it can be seen that wakes up work(
Can be still correct.
Interference signal that may be present is that frequency is far above or the pulse far below wake-up signal in the case of real work
The signal of frequency.Spaced far between of adjacent pulse is much smaller than 100 μ s, and is difficult almost the shape after hysteresis comparator
Formula rising edge, the pulse interference signal normal conditions lower frequency of high intensity are much larger than the pulse frequency of wake-up signal.It is therefore prevented that
The object signal of false wake-up is the noise signal pulse of high frequency and the interference source of low frequency.Fig. 7 and Fig. 8 simulates wake-up circuit in height
Working condition under the input of the interference signal of frequency and low frequency.
Fig. 7 be input signal adjacent pulse rising edge at intervals of 200 μ s, the μ s of pulse width 100 situation, by can be with figure
See, signal WINDOW_A gives two judgement continuously generated windows here, due to occurring four in a judgement window
Secondary rising edge, therefore wake-up signal is not produced, the signal of more applied in short pulse intervals similarly will not also produce wake-up signal.
Fig. 8 be input signal adjacent pulse rising edge at intervals of 400 μ s, the μ s of pulse width 100 situation, by can be with figure
Find out, signal WINDOW_A gives two judgement continuously generated windows here, due to only occurring in a judgement window
Rising edge twice, therefore wake-up signal is not produced, the signal in longer pulse spacing similarly will not also produce wake-up signal.
In summary, the present invention can correctly identify program control instrument wake-up signal, so as to automatically control pacemaker internal wireless
The mode of operation of telecommunication circuit, while prevent false wake-up of the interference signal to telecommunication circuit.Process is not required to manual intervention, operation letter
It is single, while circuit structure is simple, the inessential working time is short, and power consumption consumption is low, can effectively improve pacemaker power consumption management efficiency,
Pacemaker battery energy is saved, reduces cost.
Claims (10)
1. a kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit, it is characterised in that including first
Rising edge detection circuit, Divide-by-3 circuit, judge window generation circuit and wake up decision circuit, described judgement window produces electricity
Road includes rising edge counting circuit, the second rising edge detection circuit and rising edge and terminates range estimation circuit to judgement window；The
The input of one rising edge detection circuit is connected to the input P2 of wake-up circuit, and output end connection judges window generation circuit
The Enable Pin of Enable Pin and rising edge counting circuit；The input of Divide-by-3 circuit is connected to input clock signal CLK port P3,
Output end is connected to the input for judging window generation circuit；The input of rising edge counting circuit is connected to the defeated of wake-up circuit
Enter and hold P2, the high level output end of rising edge counting circuit is connected to the Enable Pin of the second rising edge detection circuit and rising edge arrives
Judge that window terminates the input of range estimation circuit, low level output end is connected to the first rising edge detection circuit；On second
The input P2 that wake-up circuit is connected to along detection circuit input end is risen, output end is connected to the Enable Pin for waking up decision circuit；
Rising edge to judge window terminate range estimation circuit output end be connected to wake up decision circuit Enable Pin；Wake up and judge electricity
The input on road is connected to the output end for judging window generation circuit, and output end is connected to the output end P4 of wake-up circuit；It is described
The input P2 of wake-up circuit be connected to telecommunication circuit and the output end of hysteresis comparator that wake-up circuit shares, wake up electricity
The output end P4 on road is connected to pacemaker MCU input；Schema control port P5 is connected to telecommunication circuit logic control
Unit output end.
2. the automatic wake-up circuit according to claim 1 applied to pacemaker internal radio communication circuit, it is special
Sign is that the first described rising edge detection circuit includes d type flip flop D1；D type flip flop D1 D inputs are connected with supply voltage
Connect, CK inputs are connected with wake-up circuit input port, Q output and d type flip flop D2, d type flip flop D3, d type flip flop D4, D
Trigger D5, d type flip flop D6, d type flip flop D7, d type flip flop D8 reseting port RB are connected, QB output ends and d type flip flop D17
CK inputs be connected, reseting port RB is connected with door I3 output port with two inputs.
3. the automatic wake-up circuit according to claim 2 applied to pacemaker internal radio communication circuit, it is special
Sign is, described Divide-by-3 circuit includes d type flip flop D11 and d type flip flop D12, d type flip flop D11 D input ports and itself
One of input port of QB output ports, d type flip flop D12 CK input ports and two input OR gate I1 is connected, CK inputs
Port is connected with two inputs with door I4 output port, and reseting port RB and two input OR gate I1 output port and D touch
Hair device D12 reseting port RB is connected；D type flip flop D12 D input ports and itself QB output port and two input OR gates
One of I1 input port is connected.
4. the automatic wake-up circuit according to claim 2 applied to pacemaker internal radio communication circuit, it is special
Sign is that described judgement window generation circuit includes：D type flip flop D2, d type flip flop D3, d type flip flop D4 and d type flip flop D5；D
Trigger D2 D inputs are connected with the QB output ends of itself and d type flip flop D3 CK inputs, d type flip flop D2 CK
Input is connected with d type flip flop D12 Q output；D type flip flop D3 D inputs trigger with the QB output ends and D of itself
Device D4 CK inputs are connected；D type flip flop D4 D inputs input with the QB output ends of itself and d type flip flop D5 CK
End is connected；One of d type flip flop D5 D inputs and itself QB output end and two inputs and door I3 input port are connected
Connect.
5. the automatic wake-up circuit according to claim 2 applied to pacemaker internal radio communication circuit, it is special
Sign is that described rising edge counting circuit includes d type flip flop D6, d type flip flop D7 and d type flip flop D8, and d type flip flop D6 D is defeated
Enter end with the QB output ends of itself and d type flip flop D7 CK inputs to be connected, CK inputs and wake-up circuit input port
P2 is connected；D type flip flop D7 D inputs are connected with itself QB output end, the CK inputs of Q output and d type flip flop D8
It is connected；D type flip flop D8 Q output is connected with d type flip flop D9 RB reset terminals and d type flip flop D10 CK inputs.
6. the automatic wake-up circuit according to claim 2 applied to pacemaker internal radio communication circuit, it is special
Sign is that the second described rising edge detection circuit includes d type flip flop D9, d type flip flop D9 D inputs and supply voltage VDD
Port P1 is connected, and CK inputs are connected with wake-up circuit input port P2, and QB output ports input defeated with door I2 with two
One in inbound port is connected.
7. the automatic wake-up circuit according to claim 2 applied to pacemaker internal radio communication circuit, it is special
Sign is that described rising edge terminates range estimation circuit to judgement window to be included：D type flip flop D10, d type flip flop D10 D are defeated
Enter end with supply voltage vdd terminal mouth P1 to be connected, the D input ports and d type flip flop D16 of RB reseting ports and d type flip flop D16
QB output ports be connected, Q output mouth and two inputs and one and d type flip flop D13 in door I2 input port,
D14, D15, D16 RB reseting ports are connected；D type flip flop D13 D input ports trigger with itself QB output port and D
Device D14 CK input ports are connected, and CK input ports are connected with two inputs with door I4 output port；D type flip flop D14's
D input ports are connected with the CK input ports of itself QB output port and d type flip flop D15；D type flip flop D15 D inputs
Mouth is connected with the CK input ports of itself QB output port and d type flip flop D16.
8. the automatic wake-up circuit according to claim 2 applied to pacemaker internal radio communication circuit, it is special
Sign is that described wake-up decision circuit includes：Two inputs and door I2, two inputs are answered with door I2 output ports and d type flip flop D17
Bit port RB is connected；D type flip flop D17 D input ports are connected with supply voltage vdd terminal mouth P1, and Q output mouth is with waking up
Circuit output port P4 is connected.
9. the automatic wake-up circuit according to claim 2 applied to pacemaker internal radio communication circuit, it is special
Sign is, one of described input clock signal CLK port P3 and two inputs and door I4 input port are connected；Schema control
Port P5 and two inputs and one of door I3 input port and two input to be connected with one of door I4 input port.
10. the automatic wake-up circuit according to claim 1 applied to pacemaker internal radio communication circuit, it is special
Sign is that the not connected port of all d type flip flops is to be empty port, not line；All d type flip flops are rising edge clock
Triggering, low level reset d type flip flop.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710488903.2A CN107362448B (en) | 2017-06-23 | 2017-06-23 | A kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710488903.2A CN107362448B (en) | 2017-06-23 | 2017-06-23 | A kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107362448A true CN107362448A (en) | 2017-11-21 |
| CN107362448B CN107362448B (en) | 2019-10-11 |
Family
ID=60306138
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710488903.2A Active CN107362448B (en) | 2017-06-23 | 2017-06-23 | A kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107362448B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104399183A (en) * | 2014-11-25 | 2015-03-11 | 西安交通大学 | Automatic wake-up circuit applicable to cardiac pacemaker |
-
2017
- 2017-06-23 CN CN201710488903.2A patent/CN107362448B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104399183A (en) * | 2014-11-25 | 2015-03-11 | 西安交通大学 | Automatic wake-up circuit applicable to cardiac pacemaker |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107362448B (en) | 2019-10-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104516296B (en) | A kind of awakening method and peripheral module of the micro controller system based on peripheral module | |
| CN103631360B (en) | A kind of chip and method for supporting sleep pattern | |
| CN106097523A (en) | A kind of wireless low-power consumption intelligent door lock and method of work thereof | |
| CN105225316B (en) | A kind of dormancy of electron key low-power consumption power supply plan and awakening method | |
| CN103645794B (en) | Chip and method for achieving sleep mode wake-up through edge detection circuit | |
| CN105227215B (en) | A kind of power carrier communication device and its control method | |
| CN102587744B (en) | System and design method for reducing power consumption for same for PKE (passive keyless entry) | |
| CN103412634A (en) | Device and method for awakening MCU (micro control unit) of SOC (system on chip) chip | |
| CN104597790B (en) | A kind of awakening method of serial ports controller and micro controller system based on it | |
| CN103226169B (en) | Square wave detector for wireless wake-up circuit | |
| CN109557861A (en) | Electric power management circuit across voltage domain | |
| CN109947226A (en) | A kind of UART wake-up circuit of MCU chip | |
| CN109920369A (en) | A kind of LED display blank screen energy-saving chip and method | |
| CN102826053A (en) | Apparatus and method for monitoring awaking based on battery connection of vehicle | |
| CN107362448B (en) | A kind of automatic wake-up circuit applied to pacemaker internal radio communication circuit | |
| CN110442544A (en) | A kind of SoC chip deep-sleep Rouser and method | |
| CN102801871B (en) | Radio frequency smart card and control method thereof | |
| CN104348462B (en) | A kind of special receiving circuit of wireless remote control | |
| CN102355747B (en) | Method of receiving wireless communication data for vehicles | |
| CN205232189U (en) | Touch circuit | |
| CN209787468U (en) | intelligent trunk awakening system | |
| CN211287051U (en) | Split type full-automatic intelligent lock | |
| CN207352686U (en) | A kind of low-power consumption IC card electronic lock | |
| CN209659265U (en) | A kind of reduction touch sensible output interference circuit | |
| CN207603593U (en) | A kind of low power consumption switch Hall sensor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |