CN107342314A - A kind of preparation method of top-gated graphene field effect transistor - Google Patents
A kind of preparation method of top-gated graphene field effect transistor Download PDFInfo
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims abstract description 80
- 229910021389 graphene Inorganic materials 0.000 title claims abstract description 80
- 230000005669 field effect Effects 0.000 title claims abstract description 18
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 238000000151 deposition Methods 0.000 claims abstract description 77
- 230000008021 deposition Effects 0.000 claims abstract description 63
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 238000010276 construction Methods 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 19
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims abstract description 18
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 claims abstract description 18
- 238000004528 spin coating Methods 0.000 claims abstract description 17
- 230000007704 transition Effects 0.000 claims abstract description 15
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims abstract description 13
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims abstract description 12
- 239000011810 insulating material Substances 0.000 claims abstract description 12
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 11
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 11
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 11
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 11
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 11
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 35
- 229910052593 corundum Inorganic materials 0.000 claims description 35
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 35
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 25
- 238000006243 chemical reaction Methods 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 23
- 229910052751 metal Inorganic materials 0.000 claims description 23
- 238000000231 atomic layer deposition Methods 0.000 claims description 20
- 239000007789 gas Substances 0.000 claims description 20
- 238000010894 electron beam technology Methods 0.000 claims description 15
- 230000001351 cycling effect Effects 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 10
- 229910003865 HfCl4 Inorganic materials 0.000 claims description 10
- 238000005566 electron beam evaporation Methods 0.000 claims description 10
- 230000008020 evaporation Effects 0.000 claims description 10
- 238000001704 evaporation Methods 0.000 claims description 10
- 238000000137 annealing Methods 0.000 claims description 5
- 239000006227 byproduct Substances 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 5
- 230000002000 scavenging effect Effects 0.000 claims description 5
- 239000007858 starting material Substances 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- 239000000047 product Substances 0.000 claims description 2
- 239000000155 melt Substances 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 239000000463 material Substances 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
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- 239000002210 silicon-based material Substances 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- 210000003462 vein Anatomy 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
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- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
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Abstract
The present invention relates to a kind of preparation method of top-gated graphene field effect transistor, comprise the following steps：(1) substrate is cleaned：Acetone, methanol, isopropanol are respectively adopted successively and cleans substrate each 5 minutes, and dries stand-by；(2) substrate insulating material is prepared on substrate：Using PECVD method deposition films SiO2；(3) graphene channel layer is prepared：Using Sol Gel spin-coating methods spin coating graphene solution, then be by mechanically pulling off HOPG and obtain graphene channel layer on the insulating material；(4) transition zone is prepared：Using deposition system, one layer of ultra-thin metallic film is deposited on graphenic surface；(5) gate dielectric layer is deposited：Using ALD deposition gate dielectric layer, (6) prepare source electrode and drain electrode：The centre of substrate with gate medium/graphene laminated construction is protected, both ends proceed by etching from surface, and until being etched to substrate, source electrode and drain electrode are formed respectively at the etching at both ends.
Description
Technical field
The present invention relates to a kind of electronic device material technical field, more particularly to a kind of top-gated graphene field effect transistor
Preparation method.
Background technology
With the development of science and technology, semiconductor industry has been carried out a series of to the material and technology for adapting to device miniaturization
Research and exploration.Simultaneously since graphene comes out, the nanoelectronics using graphene as material, due to graphene superelevation
Carrier mobility and carrier saturation drift velocity, and its outstanding mechanical strength and Young's modulus, very high electricity, thermal conductivity
Extensive concern of the characteristics such as rate by industry researcher；Great application prospect is considered to have, being rich in potentiality can replace
For silicon materials；Graphene is a kind of two-dimensional material of zero band gap, and early in 2006, Y.-W.Son proposes extremely narrow by making
Graphene ribbon to graphene introduce band gap theory.P.Kim etc. is by experimental verification when graphene nano bandwidth is less than
During 20nm, the band gap of graphene can be opened, and this is that graphene can provide the foundation applied to electronic device；Because graphene is received
The size of rice material has conclusive effect for its electric property and application, thus realizes the chi to graphene nano material
Very little effective control has very important significance；In the evolution of graphene FET device, dead resistance is opened device
The electrology characteristics such as powered-down stream ratio, mutual conductance, intrinsic gain, cut-off frequency, maximum frequency of oscillation all have material impact.Dead resistance
The main graphene-channel path electricity including between contacting metal bulk resistor, metallic graphite carbon alkene contact resistance and grid source, grid leak
Resistance and grid metal resistance.Wherein, the raceway groove via resistance between grid source, grid leak is by grid source, grid leak spacing and graphene surface resistance
Determine, and grid source, grid leak spacing are difficult to continue to shorten then due to the limitation of lithography registration precision after certain length is reduced to；
Grid metal resistance is together decided on by grid metal property, grid width and grid metal sectional area.
Chinese patent literature (application number 201710129827.6) disclose a kind of top-gated graphene field effect transistor and
Its preparation method, including substrate, silicon oxide layer, graphene channel layers, source electrode, drain electrode, grid, epitaxial growth has successively on substrate
Silicon oxide layer, graphene channel layers, the both ends of graphene channel layers are provided with source electrode, drain electrode, the graphene between source electrode, drain electrode
Channel layer is provided with one layer of SiO film, and SiO films are provided with grid.The technical scheme, obtained by selected gate dielectric layer
Mobility is not high.
Therefore, it is necessary to develop a kind of preparation method for the graphene field effect transistor that can obtain high mobility.
The content of the invention
The technical problem to be solved in the present invention is, it is necessary to develops a kind of graphene field effect that can obtain high mobility
The preparation method of transistor.
In order to solve the above-mentioned technical problem, the technical solution adopted by the present invention is：The top-gated graphene field effect transistor
Preparation method, using atomic layer deposition method deposit gate medium, comprise the following steps：
(1) substrate is cleaned：Acetone, methanol, isopropanol are respectively adopted successively and cleans substrate each 5 minutes, removes the oil on surface
Dirt, and dry stand-by；
(2) substrate insulating material is prepared on substrate：Using PECVD method deposition films SiO2；
(3) graphene channel layer is prepared：Using Sol-Gel spin-coating methods spin coating graphene solution, then lead on the insulating material
Cross mechanical stripping HOPG and obtain graphene channel layer；
(4) transition zone is prepared：Using deposition system, one layer of ultra-thin metallic film of evaporation was used as on graphenic surface
Cross layer and be used for follow-up atomic layer deposition gate medium technique；
(5) gate dielectric layer is deposited：Using ALD deposition gate dielectric layer, by adjusting the burst length of depositing operation, deposit temperature
Degree, and the selection of presoma, prepare gate medium/graphene laminated construction；
(6) source electrode and drain electrode are prepared：The centre of substrate with gate medium/graphene laminated construction is protected, two
End proceeds by etching from gate medium/graphene laminated construction surface, and until being etched to substrate, shape is distinguished at the etching at both ends
Into source electrode and drain electrode.
The present invention further improvement is that, using PECVD depositions SiO in the step (2)2The step of film, includes：Will
After substrate is put into PECVD vacuum chambers, it is less than 10 in vacuum chamber room pressure-5After Pa and temperature are maintained at 250 DEG C, to vacuum chamber
Inside it is filled with the SiH that gas flow is 150~300sccm4And N2Mixed gas and gas flow be 700~900sccm N2O；
When vacuum indoor pressure reaches 700~950mtorr, radio-frequency power 60W electric discharge starters are added to carry out 10~70s SiO2It is heavy
Product；In the SiH4And N2Mixed gas in, SiH4And N2Volume ratio be 7：90.
The present invention further improvement is that, in the step (3) number of plies of the spin coating graphene solution on substrate be 5~10
Layer.
The present invention further improvement is that, be the step of evaporation super thin metal film in the step (4)：Substrate is put
After the vacuum chamber for entering electron beam evaporation equipment, it is less than 10 in vacuum chamber room pressure-5After Pa and temperature are maintained at 100 DEG C, according to
The secondary general supply for opening electron beam evaporation rifle cabinet, scans key, gun filament power switch, then preset current is adjusted into 0.3~0.6A,
Make 5~10min of filament pre-heating；After preheating, the high pressure on line control machine is opened, the poly- of electron beam is observed by faint electron beam light
Then burnt central point increases line whether in crucible, until stopping increase line during target fusing；Opening electron beam baffle plate,
Film thickness gauge baffle plate starts to be deposited；10~20s is deposited.Because graphenic surface in hydrophobicity and lacks needed for film growth
Dangling bonds, thus presoma can not be chemisorbed on graphenic surface, it is difficult to realize and grown from limited reactions；Should by evaporation
Metal film layer can be such that graphene and gate dielectric layer combines well, the metallic film can be Ni or Co as transition zone.
The present invention further improvement is that, the step (5) deposition gate dielectric layer comprises the following steps：Place the substrate into
After ALD vacuum chambers, HfO is carried out2/Al2O3The deposition of nano-stack film, the parameter of deposition are：Reaction temperature 250~350
℃；Reaction source：Depositing Al2O3Using Al (CH3)3And H2O reacts；Deposit HfO2Using HfCl4And H2O reacts, wherein HfCl4Source
Temperature is 180~200 DEG C；Pulse and scavenging period：The pulse at source metal and water source is all 0.1~0.4s；Each source metal pulse
Afterwards, all then cleaned with high pure nitrogen, wash out byproduct of reaction and the reaction source of residual；With Al2O3Deposit, hand over for start layers
For progress Al2O3And HfO2Cyclic deposition, wherein the basic laminated construction of the film deposited is one layer of Al2O3+ three layers of HfO2, with
This is 5~15nm of unit cycling deposition thickness, and Al/Hf molar ratios are 1: 3；Or its basic laminated construction is one layer
Al2O3+ two layers of HfO2, as 5~20nm of unit cycling deposition thickness, Al/Hf molar ratios are 1: 2；Or it is basic folded
Rotating fields are one layer of Al2O3+ one layer of HfO2, as 5~15nm of unit cycling deposition thickness, Al/Hf molar ratios are 1:
1.4；Then the film of deposition is put in quick anneal oven, in N2In in 450~550 DEG C of 30~50s of short annealing.
Alternatively, the thickness of the transition zone is 5nm.
Alternatively, the substrate is monocrystalline silicon piece.
Compared with prior art, the invention has the advantages that：The present invention is using graphene as FET devices
Channel layer, while use two kinds of gate mediums of ald of simple low damage finally to be moved alternately as gate dielectric layer
Shifting rate is more than 8000cm2/ Vs graphene FET device.
Embodiment
In order to deepen the understanding of the present invention, the present invention is described in further detail below in conjunction with embodiment, the reality
Apply example to be only used for explaining the present invention, protection scope of the present invention is not formed and limited.
Embodiment 1：The preparation method of the top-gated graphene field effect transistor, it is situated between using atomic layer deposition method deposition grid
Matter, comprise the following steps：
(1) substrate is cleaned：Substrate is monocrystalline silicon piece N-type (100)；Acetone, methanol, isopropanol cleaning lining are respectively adopted successively
Each 5 minutes of bottom, removes the greasy dirt on surface, and dry stand-by；
(2) substrate insulating material is prepared on substrate：Using PECVD method deposition films SiO2；Place the substrate into PECVD
After vacuum chamber, it is less than 10 in vacuum chamber room pressure-5After Pa and temperature are maintained at 250 DEG C, gas stream is filled with into vacuum chamber
Measure the SiH for 150sccm4And N2Mixed gas and gas flow be 700sccm N2O；When vacuum indoor pressure reaches
During 7000mtorr, radio-frequency power 60W electric discharge starters are added to carry out 15s SiO2Deposition；In the SiH4And N2Mixed gas in,
SiH4And N2Volume ratio be 7：90；
(3) graphene channel layer is prepared：Using Sol-Gel spin-coating methods spin coating graphene solution, then lead on the insulating material
Cross mechanical stripping HOPG and obtain graphene channel layer；The number of plies of the spin coating graphene solution on substrate is 5 in the step (3)
Layer；
(4) transition zone is prepared：Using deposition system, one layer of ultra-thin metallic film of evaporation was used as on graphenic surface
Cross layer and be used for follow-up atomic layer deposition gate medium technique；The step of evaporation super thin metal film in the step (4) is：Will
After substrate is put into the vacuum chamber of electron beam evaporation equipment, it is less than 10 in vacuum chamber room pressure-5Pa and temperature are maintained at 100 DEG C
Afterwards, the general supply of electron beam evaporation rifle cabinet is opened successively, scans key, gun filament power switch, then preset current is adjusted to 0.3A,
Make filament pre-heating 5min；After preheating, the high pressure on line control machine is opened, in the focusing that electron beam is observed by faint electron beam light
Then heart point increases line whether in crucible, until stopping increase line during target fusing；Open electron beam baffle plate, thickness
Instrument baffle plate starts to be deposited；10s is deposited.Because graphenic surface in hydrophobicity and lacks the dangling bonds needed for film growth, because
And presoma can not be chemisorbed on graphenic surface, it is difficult to realize and grown from limited reactions；By the way that the metallic film is deposited
Layer is used as transition zone, graphene and gate dielectric layer can be made to combine well, the metallic film can be Ni or Co；The transition
The thickness of layer is 5nm；
(5) gate dielectric layer is deposited：Using ALD deposition gate dielectric layer, by adjusting the burst length of depositing operation, deposit temperature
Degree, and the selection of presoma, prepare gate medium/graphene laminated construction；The step (5) deposition gate dielectric layer include with
Lower step：After placing the substrate into ALD vacuum chambers, HfO is carried out2/Al2O3The deposition of nano-stack film, the parameter of deposition are：
250 DEG C of reaction temperature；Reaction source：Depositing Al2O3Using Al (CH3)3And H2O reacts；Deposit HfO2Using HfCl4And H2O reacts,
Wherein HfCl4Source temperature is 180 DEG C；Pulse and scavenging period：The pulse at source metal and water source is all 0.1s；Each source metal pulse
Afterwards, all then cleaned with high pure nitrogen, wash out byproduct of reaction and the reaction source of residual；With Al2O3Deposit, hand over for start layers
For progress Al2O3And HfO2Cyclic deposition, wherein the basic laminated construction of the film deposited is one layer of Al2O3+ three layers of HfO2, with
This is unit cycling deposition 5nm thickness, and Al/Hf molar ratios are 1: 3；Or its basic laminated construction is one layer of Al2O3+
Two layers of HfO2, as unit cycling deposition 5nm thickness, Al/Hf molar ratios are 1: 2；Or its basic laminated construction is
One layer of Al2O3+ one layer of HfO2, as unit cycling deposition 5nm thickness, Al/Hf molar ratios are 1: 1.4；Then will deposition
Film be put in quick anneal oven, in N2In in 450 DEG C of short annealing 50s；
(6) source electrode and drain electrode are prepared：The centre of substrate with gate medium/graphene laminated construction is protected, two
End proceeds by etching from gate medium/graphene laminated construction surface, and until being etched to substrate, shape is distinguished at the etching at both ends
Into source electrode and drain electrode.
Embodiment 2：The preparation method of the top-gated graphene field effect transistor, it is situated between using atomic layer deposition method deposition grid
Matter, comprise the following steps：
(1) substrate is cleaned：Substrate is monocrystalline silicon piece N-type (100)；Acetone, methanol, isopropanol cleaning lining are respectively adopted successively
Each 5 minutes of bottom, removes the greasy dirt on surface, and dry stand-by；
(2) substrate insulating material is prepared on substrate：Using PECVD method deposition films SiO2；Place the substrate into PECVD
After vacuum chamber, it is less than 10 in vacuum chamber room pressure-5After Pa and temperature are maintained at 250 DEG C, gas stream is filled with into vacuum chamber
Measure the SiH for 220sccm4And N2Mixed gas and gas flow be 800sccm N2O；When vacuum indoor pressure reaches
During 820mtorr, radio-frequency power 60W electric discharge starters are added to carry out 30s SiO2Deposition；In the SiH4And N2Mixed gas in,
SiH4And N2Volume ratio be 7：90；
(3) graphene channel layer is prepared：Using Sol-Gel spin-coating methods spin coating graphene solution, then lead on the insulating material
Cross mechanical stripping HOPG and obtain graphene channel layer；The number of plies of the spin coating graphene solution on substrate is 8 in the step (3)
Layer；
(4) transition zone is prepared：Using deposition system, one layer of ultra-thin metallic film of evaporation was used as on graphenic surface
Cross layer and be used for follow-up atomic layer deposition gate medium technique；The step of evaporation super thin metal film in the step (4) is：Will
After substrate is put into the vacuum chamber of electron beam evaporation equipment, it is less than 10 in vacuum chamber room pressure-5Pa and temperature are maintained at 100 DEG C
Afterwards, the general supply of electron beam evaporation rifle cabinet is opened successively, scans key, gun filament power switch, then preset current is adjusted to 0.4A,
Make 5~10min of filament pre-heating；After preheating, the high pressure on line control machine is opened, the poly- of electron beam is observed by faint electron beam light
Then burnt central point increases line whether in crucible, until stopping increase line during target fusing；Opening electron beam baffle plate,
Film thickness gauge baffle plate starts to be deposited；15s is deposited.Because graphenic surface in hydrophobicity and lacks the suspension needed for film growth
Key, thus presoma can not be chemisorbed on graphenic surface, it is difficult to realize and grown from limited reactions；By the way that the metal is deposited
Film layer can be such that graphene and gate dielectric layer combines well, the metallic film can be Ni or Co as transition zone；It is described
The thickness of transition zone is 5nm；
(5) gate dielectric layer is deposited：Using ALD deposition gate dielectric layer, by adjusting the burst length of depositing operation, deposit temperature
Degree, and the selection of presoma, prepare gate medium/graphene laminated construction；The step (5) deposition gate dielectric layer include with
Lower step：After placing the substrate into ALD vacuum chambers, HfO is carried out2/Al2O3The deposition of nano-stack film, the parameter of deposition are：
300 DEG C of reaction temperature；Reaction source：Depositing Al2O3Using Al (CH3)3And H2O reacts；Deposit HfO2Using HfCl4And H2O reacts,
Wherein HfCl4Source temperature is 190 DEG C；Pulse and scavenging period：The pulse at source metal and water source is all 0.25s；Each source metal arteries and veins
After punching, all then cleaned with high pure nitrogen, wash out byproduct of reaction and the reaction source of residual；With Al2O3Deposited for start layers,
Alternately Al2O3And HfO2Cyclic deposition, wherein the basic laminated construction of the film deposited is one layer of Al2O3+ three layers of HfO2,
As unit cycling deposition 10nm thickness, Al/Hf molar ratios are 1: 3；Or its basic laminated construction is one layer
Al2O3+ two layers of HfO2, as unit cycling deposition 12nm thickness, Al/Hf molar ratios are 1: 2；Or its basic lamination
Structure is one layer of Al2O3+ one layer of HfO2, as unit cycling deposition 10nm thickness, Al/Hf molar ratios are 1: 1.4；So
The film of deposition is put in quick anneal oven afterwards, in N2In in 500 DEG C of short annealing 40s；
(6) source electrode and drain electrode are prepared：The centre of substrate with gate medium/graphene laminated construction is protected, two
End proceeds by etching from gate medium/graphene laminated construction surface, and until being etched to substrate, shape is distinguished at the etching at both ends
Into source electrode and drain electrode.
Embodiment 3：The preparation method of the top-gated graphene field effect transistor, it is situated between using atomic layer deposition method deposition grid
Matter, comprise the following steps：
(1) substrate is cleaned：Substrate is monocrystalline silicon piece N-type (100)；Acetone, methanol, isopropanol cleaning lining are respectively adopted successively
Each 5 minutes of bottom, removes the greasy dirt on surface, and dry stand-by；
(2) substrate insulating material is prepared on substrate：Using PECVD method deposition films SiO2；Place the substrate into PECVD
After vacuum chamber, it is less than 10 in vacuum chamber room pressure-5After Pa and temperature are maintained at 250 DEG C, gas stream is filled with into vacuum chamber
Measure the SiH for 300sccm4And N2Mixed gas and gas flow be 900sccm N2O；When vacuum indoor pressure reaches
During 950mtorr, radio-frequency power 60W electric discharge starters are added to carry out 70s SiO2Deposition；In the SiH4And N2Mixed gas in,
SiH4And N2Volume ratio be 7：90；
(3) graphene channel layer is prepared：Using Sol-Gel spin-coating methods spin coating graphene solution, then lead on the insulating material
Cross mechanical stripping HOPG and obtain graphene channel layer；The number of plies of the spin coating graphene solution on substrate is 10 in the step (3)
Layer；
(4) transition zone is prepared：Using deposition system, one layer of ultra-thin metallic film of evaporation was used as on graphenic surface
Cross layer and be used for follow-up atomic layer deposition gate medium technique；The step of evaporation super thin metal film in the step (4) is：Will
After substrate is put into the vacuum chamber of electron beam evaporation equipment, it is less than 10 in vacuum chamber room pressure-5Pa and temperature are maintained at 100 DEG C
Afterwards, the general supply of electron beam evaporation rifle cabinet is opened successively, scans key, gun filament power switch, then preset current is adjusted to 0.6A,
Make filament pre-heating 10min；After preheating, the high pressure on line control machine is opened, the focusing of electron beam is observed by faint electron beam light
Then central point increases line whether in crucible, until stopping increase line during target fusing；Open electron beam baffle plate, film
Thick instrument baffle plate starts to be deposited；20s is deposited.Because graphenic surface in hydrophobicity and lacks the dangling bonds needed for film growth,
Thus presoma can not be chemisorbed on graphenic surface, it is difficult to realized and grown from limited reactions；By the way that the metal foil is deposited
Film layer can be such that graphene and gate dielectric layer combines well, the metallic film can be Ni or Co as transition zone；The mistake
The thickness for crossing layer is 5nm；
(5) gate dielectric layer is deposited：Using ALD deposition gate dielectric layer, by adjusting the burst length of depositing operation, deposit temperature
Degree, and the selection of presoma, prepare gate medium/graphene laminated construction；The step (5) deposition gate dielectric layer include with
Lower step：After placing the substrate into ALD vacuum chambers, HfO is carried out2/Al2O3The deposition of nano-stack film, the parameter of deposition are：
350 DEG C of reaction temperature；Reaction source：Depositing Al2O3Using Al (CH3)3And H2O reacts；Deposit HfO2Using HfCl4And H2O reacts,
Wherein HfCl4Source temperature is 200 DEG C；Pulse and scavenging period：The pulse at source metal and water source is all 0.4s；Each source metal pulse
Afterwards, all then cleaned with high pure nitrogen, wash out byproduct of reaction and the reaction source of residual；With Al2O3Deposit, hand over for start layers
For progress Al2O3And HfO2Cyclic deposition, wherein the basic laminated construction of the film deposited is one layer of Al2O3+ three layers of HfO2, with
This is unit cycling deposition 15nm thickness, and Al/Hf molar ratios are 1: 3；Or its basic laminated construction is one layer of Al2O3
+ two layers of HfO2, as 5~20nm of unit cycling deposition thickness, Al/Hf molar ratios are 1: 2；Or its basic lamination
Structure is one layer of Al2O3+ one layer of HfO2, as unit cycling deposition 15nm thickness, Al/Hf molar ratios are 1: 1.4；So
The film of deposition is put in quick anneal oven afterwards, in N2In in 550 DEG C of short annealing 30s；
(6) source electrode and drain electrode are prepared：The centre of substrate with gate medium/graphene laminated construction is protected, two
End proceeds by etching from gate medium/graphene laminated construction surface, and until being etched to substrate, shape is distinguished at the etching at both ends
Into source electrode and drain electrode.
The present invention is not limited to above-mentioned particular implementation, is made on the premise of above-mentioned basic fundamental thought is not departed from
Various deformations or amendments, all fall within the row of rights protection scope of the present invention.
Claims (7)
1. a kind of preparation method of top-gated graphene field effect transistor, it is characterised in that grid are deposited using atomic layer deposition method
Medium, comprise the following steps：
(1) substrate is cleaned：Acetone, methanol, isopropanol are respectively adopted successively and cleans substrate each 5 minutes, removes the greasy dirt on surface, and
Dry stand-by；
(2) substrate insulating material is prepared on substrate：Using PECVD method deposition films SiO2；
(3) graphene channel layer is prepared：Using Sol-Gel spin-coating methods spin coating graphene solution, then pass through machine on the insulating material
Tool peels off HOPG and obtains graphene channel layer；
(4) transition zone is prepared：Using deposition system, one layer of ultra-thin metallic film is deposited on graphenic surface as transition zone
For follow-up atomic layer deposition gate medium technique；
(5) gate dielectric layer is deposited：Using ALD deposition gate dielectric layer, by adjusting the burst length of depositing operation, deposition temperature,
And the selection of presoma, prepare gate medium/graphene laminated construction；
(6) source electrode and drain electrode are prepared：The centre of substrate with gate medium/graphene laminated construction is protected, both ends from
Gate medium/graphene laminated construction surface proceeds by etching, and until being etched to substrate, source is formed respectively at the etching at both ends
Pole and drain electrode.
2. the preparation method of top-gated graphene field effect transistor according to claim 1, it is characterised in that the step
(2) using PECVD depositions SiO in2The step of film, includes：After placing the substrate into PECVD vacuum chambers, in vacuum chamber internal pressure
Power is less than 10-5After Pa and temperature are maintained at 250 DEG C, the SiH that gas flow is 150~300sccm is filled with into vacuum chamber4And N2
Mixed gas and gas flow be 700~900sccm N2O；When vacuum indoor pressure reaches 700~950mtorr, add
Radio-frequency power 60W electric discharge starters carry out 10~70s SiO2Deposition；In the SiH4And N2Mixed gas in, SiH4And N2's
Volume ratio is 7：90.
3. the preparation method of top-gated graphene field effect transistor according to claim 1 or 2, it is characterised in that described
The number of plies of the spin coating graphene solution on substrate is 5~10 layers in step (3).
4. the preparation method of top-gated graphene field effect transistor according to claim 3, it is characterised in that the step
(4) the step of evaporation super thin metal film in is：After placing the substrate into the vacuum chamber of electron beam evaporation equipment, in vacuum chamber
Room pressure is less than 10-5After Pa and temperature are maintained at 100 DEG C, the general supply of electron beam evaporation rifle cabinet is opened successively, scans key, rifle
Filament supply is switched, then preset current is adjusted into 0.3~0.6A, makes 5~10min of filament pre-heating；After preheating, open on line control machine
High pressure, then the focusing center's point for observing electron beam by faint electron beam light increases line whether in crucible, until
Stop increase line when target melts；Open electron beam baffle plate, film thickness gauge baffle plate starts to be deposited；10~20s is deposited.
5. the preparation method of top-gated graphene field effect transistor according to claim 4, it is characterised in that the step
(5) deposition gate dielectric layer comprises the following steps：After placing the substrate into ALD vacuum chambers, HfO is carried out2/Al2O3Nano-stack film
Deposition, the parameter of deposition is：250~350 DEG C of reaction temperature；Reaction source：Depositing Al2O3Using Al (CH3)3And H2O reacts；It is heavy
Product HfO2Using HfCl4And H2O reacts, wherein HfCl4Source temperature is 180~200 DEG C；Pulse and scavenging period：Source metal and water source
Pulse be all 0.1~0.4s；After each source metal pulse, all then cleaned with high pure nitrogen, wash out byproduct of reaction and
The reaction source of residual；With Al2O3Deposited for start layers, alternately Al2O3And HfO2Cyclic deposition, wherein the film that deposits
Basic laminated construction is one layer of Al2O3+ three layers of HfO2, as 5~15nm of unit cycling deposition thickness, Al/Hf molar ratios
For 1: 3；Or its basic laminated construction is one layer of Al2O3+ two layers of HfO2, as 5~20nm of unit cycling deposition thickness
Degree, Al/Hf molar ratios are 1: 2；Or its basic laminated construction is one layer of Al2O3+ one layer of HfO2, circulate and give birth to as unit
Long 5~15nm thickness, Al/Hf molar ratios are 1: 1.4；Then the film of deposition is put in quick anneal oven, in N2In
In 450~550 DEG C of 30~50s of short annealing.
6. the preparation method of top-gated graphene field effect transistor according to claim 4, it is characterised in that the transition
The thickness of layer is 5nm.
7. the preparation method of top-gated graphene field effect transistor according to claim 4, it is characterised in that the substrate
For monocrystalline silicon piece.
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