CN107340487A - A kind of method checked test system and be in actual processing ability under stable state - Google Patents
A kind of method checked test system and be in actual processing ability under stable state Download PDFInfo
- Publication number
- CN107340487A CN107340487A CN201611052170.XA CN201611052170A CN107340487A CN 107340487 A CN107340487 A CN 107340487A CN 201611052170 A CN201611052170 A CN 201611052170A CN 107340487 A CN107340487 A CN 107340487A
- Authority
- CN
- China
- Prior art keywords
- initial data
- test
- data
- test system
- actual processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention discloses a kind of method checked test system and be in actual processing ability under stable state.Method includes:4site is carried out by J750 test machines and surveyed, obtains initial data;Judge whether initial data is continuity data;If initial data is continuity data, judge whether initial data meets normal distribution;If initial data meets normal distribution, determine whether the testing process of test system is stably and controllable based on control figure;If testing process is stably and controllable, process capability index is calculated based on initial data;The actual processing ability of test system is determined according to process capability index.The present invention breaks through conventional analysis method, by calculating its CPKValue, check the actual processing ability that measuring system is under stable state.First by CPKApply in integrated circuit testing field, analyze wafer-level test data, check the capability of process, will combine theory and practice together, to ensure product quality, the stability of test provides a kind of effective means.
Description
Technical field
The present invention relates to a kind of integrated circuit testing field, more particularly to one kind to check that test system is under stable state
The method of actual processing ability.
Background technology
One ATE is (referred to as:ATE several devices) can be measured simultaneously, after either disk either encapsulates
Chip will often use multi-point sampler;When shipment amount is huge simultaneously, it is also necessary to which more test machines are tested.This is just needed
To confirm whether each test result between test machine and test station be consistent, to avoid various before production test
Abnormal even accident.
Traditionally whether exact p-value result unanimously can be first in the case where ensuring that ATE calibrations pass through, repeated multiple times measurement
Simultaneously statistical measurements respectively test whether position stablizes to same wafer to check same board.Checking two has same resource distribution
Board when, tested often through by same wafer on this two test machines, compare two wafer figures of generation, count yield
Difference, whether the tube core and defective tube core that statistical test passes through have saltus step etc..
Process capability index is (referred to as:CPK) it is the index that modern enterprise is used to represent process capability.Process capability index is
A kind of method for representing processing procedure level height, Essential Action are the height for reflecting process yield.Process capability can just be stablized by force
Production mass it is high, the high product of reliability.The research of process capability is the degree for confirming that these characteristics are up to specification, with
Ensure that the yield of processing procedure finished product, can be as the foundation that processing procedure persistently improves on desired level.
The content of the invention
Check that test system is in actual processing energy under stable state the technical problem to be solved in the present invention is to provide one kind
The method of power.
In order to solve this technical problem, check that test system is under stable state the invention provides one kind and actually add
The method of work ability.In the case where ensuring that measuring system is stable, C is calculatedPKValue, stable state is in so as to investigate measuring system
Under actual processing ability.
Break through in the past by analyses such as the average to test result or yields come identification chip measuring stability, using CPKCome
Reflect the capability of process.First Application analyzes wafer-level test data in integrated circuit testing field.Use
MINITAB 16 is analyzed, and Capability Sixpacks instruments in quality tool calculate CPKObtain visual knot
Fruit.
Brief description of the drawings
Fig. 1 is 100 specific test datas;
Fig. 2 is data analysis scheme;
Fig. 3 is test of normality result;
Fig. 4 is control figure analysis result;
Fig. 5 is CPKResult of calculation;
Fig. 6 is CPKFive classification standards;
C after the improvement of Fig. 7 process capabilitiesPKResult of calculation.
Explanation of nouns
site:Usual professional refers to a chip position on wafer a site;
Multi-site concurrent testings:Multi-site parallel test techniques refer to can be simultaneously to more on a test machine
Individual IC chip is automatically detected, and multiple chips can be connected to simultaneously by the probe card specially designed and produced
On pin so that test machine can carry out the test of multiple chips simultaneously, and record the test result of multiple chips, pass through unit
The quantity of increase chip under test improves the throughput of test machine in time, reduces test machine slack resources, improves test and set
Standby utilization rate, greatly reduces energy consumption, reduces the floor space of test factory building.
Embodiment
From a Teradyne J750 ATE, ensure that calibration passes through.It is chosen on Teradyne J750
The magnitude of voltage of the output pin for a product that success is developed is data source, and the magnitude of voltage test specification upper limit is 3.8V, under
It is limited to 3.0V.This product takes 4site and surveys pattern.ATE tests 5 pieces of wafers altogether, randomly selects the 5 of 4 site
Secondary test amounts to 100 data and carries out subsequent analysis.100 data are shown in Fig. 1.Data analysis scheme is shown in Fig. 2.
For two kinds of data types of continuous type and discrete type, different analysis methods can be selected.To continuous data
Speech, first has to check whether data meet normal distribution, control map analysis is used to the data for meeting normal distribution, if obtaining
Journey is stablized controlled, then can calculate CPKValue.The Capability Sixpacks works in MINITAB16 softwares can be used
Tool obtains visual CPKValue.If data do not meet normal distribution, to check whether that other distributions can be met by conversion,
The data for not meeting any distribution are then calculated using formula.For discrete data, for based on bi-distribution or being based on
Poisson distribution has different computational methods.
This example data are continuous data, are specifically analyzed using following methods:First, check whether data meet normal state point
Cloth, examined here from Anderson-Darling, be a kind of inspection based on empirical cumulative distribution function.Weighed by P values
Amount, general P values then think approximate normal distribution when being more than 0.05, P values give tacit consent to normal distribution when being more than or equal to 0.1.By 100 numbers
According to importeding into MINITAB16 softwares, software can export feedback result, see Fig. 3.P values are 0.639, it is seen that this group of data fit
Normal distribution.
Secondly, to meeting the data of normal distribution using control map analysis, check flow whether stablize it is controlled, from monodrome
Control chart for variables (I-MR control figures) instrument, equally 100 data are imported into MINITAB16 softwares, software can export
Feedback result, see Fig. 4.All test values are in upper and lower two control lines (UCL/LCL) as can see from Figure 4, therefore, stream
Journey does not have abnormity point, stable, controlled.
3rd, if obtain process stablize it is controlled, can start calculate CPKValue.Specific calculation procedure is seen below, wherein,
USL represents upper specification limit, and LSL represents lower specification limit:
1) average value of 100 data is calculated:
2) standard deviation of 100 data is calculated
3) specification tolerance:T=USL-LSL
4) specification central value:
5) process accuracy:
6) processing procedure precision:
7) process capability index:
Cpk=Cp (1- | Ca |)
It can be obtained using the Capability Sixpacks instruments in MINITAB16 softwares simultaneously more intuitively visual
Change result.Fig. 5 is result figure.As a result 6 parts are divided, wherein, it is to be in slave mode that Xbar, R and tendency chart, which are used for verification process,.
Bar chart and normal probability plot are used to verify data Normal Distribution.C can be directly read from can try hard toPKValue.
The C that will be obtainedPKValue refers to CPKFive classification standards judged, CPKFive classification standards see Fig. 6.Here
The actual processing ability of test machine can be made a decision according to five classification standards, check the height of process capability.For processing procedure
Ability it is relatively low need propose Improving Measurements, improve processing procedure.Process capability it is high continue to keep.This example CpkIt is worth for 1.24, reference
CpkFive classification standards, it is known that this test machine is in two level, ability reduces still, it is necessary to be operated and quality improving
Variation, improve quality.
Look back whole testing process, find in whole test process can with improved part, consider personnel, equipment,
This five part of material, method, environment, by FMEA, key factor being screened, the exploration card for finding to use during test is oxidized seriously,
Cause loose contact or test result bad.After being operated by card grinding, 100 data are extracted again and are divided with face method
Analysis, can obtain new CpkIt is worth for 1.45, with reference to CpkFive classification standards, belong to one-level, and situation is preferable, it is seen that effective to improve
Processing procedure.Visual result can be obtained using MINITAB16, sees Fig. 7, the yield of product can be protected.
Claims (3)
- A kind of 1. method checked test system and be in actual processing ability under stable state, it is characterised in that methods described bag Include:4site is carried out by J750 test machines and surveyed, obtains initial data;Judge whether the initial data is continuity data;If the initial data is continuity data, judge whether the initial data meets normal distribution;If the initial data meets normal distribution, determining whether the testing process of the test system is stable based on control figure can Control;If the testing process is stably and controllable, process capability index is calculated based on the initial data;According to the process capability Index determines the actual processing ability of the test system.
- 2. according to the method for claim 1, it is characterised in that described to judge whether the initial data meets normal state point Cloth, including:Determine the p value of the initial data;When the p value within a preset range when, determine that the initial data meets normal distribution.
- 3. according to the method for claim 1, it is characterised in that the test that the test system is determined based on control figure Whether flow is stably and controllable, including:According to the Raw Data Generation control figure;Determine the monodrome and moving range value whether in two control lines of UCL and LCL of the control figure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611052170.XA CN107340487A (en) | 2016-11-24 | 2016-11-24 | A kind of method checked test system and be in actual processing ability under stable state |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611052170.XA CN107340487A (en) | 2016-11-24 | 2016-11-24 | A kind of method checked test system and be in actual processing ability under stable state |
Publications (1)
Publication Number | Publication Date |
---|---|
CN107340487A true CN107340487A (en) | 2017-11-10 |
Family
ID=60222290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201611052170.XA Pending CN107340487A (en) | 2016-11-24 | 2016-11-24 | A kind of method checked test system and be in actual processing ability under stable state |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN107340487A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109272216A (en) * | 2018-08-31 | 2019-01-25 | 西安电子科技大学 | The statistical process control method of zero excessive granule number in ultra-clean chamber |
CN112462233A (en) * | 2020-11-25 | 2021-03-09 | 北京确安科技股份有限公司 | Site control method and system in integrated circuit test |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101436036A (en) * | 2007-11-14 | 2009-05-20 | 中芯国际集成电路制造(上海)有限公司 | Method and device for estimating processing capacity of process |
CN101458514A (en) * | 2007-12-13 | 2009-06-17 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting acceptable test data and wafer acceptable test control method |
CN101937212A (en) * | 2009-07-03 | 2011-01-05 | 中芯国际集成电路制造(上海)有限公司 | Process detection method and device |
CN103935120A (en) * | 2014-03-25 | 2014-07-23 | 中山火炬职业技术学院 | Method for setting quality control parameter standards for printing enterprises |
-
2016
- 2016-11-24 CN CN201611052170.XA patent/CN107340487A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101436036A (en) * | 2007-11-14 | 2009-05-20 | 中芯国际集成电路制造(上海)有限公司 | Method and device for estimating processing capacity of process |
CN101458514A (en) * | 2007-12-13 | 2009-06-17 | 中芯国际集成电路制造(上海)有限公司 | Method for detecting acceptable test data and wafer acceptable test control method |
CN101937212A (en) * | 2009-07-03 | 2011-01-05 | 中芯国际集成电路制造(上海)有限公司 | Process detection method and device |
CN103935120A (en) * | 2014-03-25 | 2014-07-23 | 中山火炬职业技术学院 | Method for setting quality control parameter standards for printing enterprises |
Non-Patent Citations (5)
Title |
---|
史金飞 等: "基于MVA的半导体生产过程质量分析方法", 《东南大学学报(自然科学版)》 * |
张根保 等: "《质量管理与可靠性》", 31 July 2006, 中国科学技术出版社 * |
李新鹏: "射频IC量产化测试系统及其校正系统开发与实现", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
梁德丰 等: "SPC在半导体晶圆制造厂的应用(上)", 《半导体技术》 * |
梁德丰 等: "SPC在半导体晶圆制造厂的应用(下)", 《半导体技术》 * |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109272216A (en) * | 2018-08-31 | 2019-01-25 | 西安电子科技大学 | The statistical process control method of zero excessive granule number in ultra-clean chamber |
CN109272216B (en) * | 2018-08-31 | 2021-09-10 | 西安电子科技大学 | Statistical process control method for zero excess particle number in ultra-clean room |
CN112462233A (en) * | 2020-11-25 | 2021-03-09 | 北京确安科技股份有限公司 | Site control method and system in integrated circuit test |
CN112462233B (en) * | 2020-11-25 | 2023-11-17 | 北京确安科技股份有限公司 | Site control method and system in integrated circuit test |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100216066B1 (en) | Control system and control method for ic test process | |
CN102169846B (en) | Method for writing multi-dimensional variable password in parallel in process of testing integrated circuit wafer | |
CN104062305B (en) | A kind of analysis method of integrated circuit defect | |
CN105702595B (en) | The yield judgment method of wafer and the changeable quantity measuring method of wafer conformity testing | |
US8797056B2 (en) | System and method for electronic testing of partially processed devices | |
TWI591362B (en) | A method for automatically configuring a semiconductor component tester | |
CN107038697A (en) | Method and system for diagnosing semiconductor crystal wafer | |
CN110494965B (en) | Inspection system, wafer map display method, and storage medium | |
WO2015045222A1 (en) | Inspection system, inspection method, and readable recording medium | |
TW201533456A (en) | Wafer test data analysis method | |
Farayola et al. | Quantile–quantile fitting approach to detect site to site variations in massive multi-site testing | |
CN108400098A (en) | The method for verifying wafer test correlation | |
CN115032493A (en) | Wafer testing method and system based on tube core parameter display | |
CN104422801A (en) | Load board, automated test equipment and IC test method | |
CN107340487A (en) | A kind of method checked test system and be in actual processing ability under stable state | |
US7788065B2 (en) | Method and apparatus for correlating test equipment health and test results | |
CN209000871U (en) | A kind of wafer test system | |
US8928346B2 (en) | Method for an improved checking of repeatability and reproducibility of a measuring chain for semiconductor device testing | |
US7822567B2 (en) | Method and apparatus for implementing scaled device tests | |
CN111143211B (en) | Method for off-line rapid detection of test setting accuracy | |
US7716004B2 (en) | Method and apparatus for matching test equipment calibration | |
TWI488246B (en) | Method for integrating testing resources and ic testing | |
CN107621602A (en) | The method of testing of integrated circuit chip carrier | |
US7137085B1 (en) | Wafer level global bitmap characterization in integrated circuit technology development | |
US7076747B2 (en) | Analytical simulator and analytical simulation method and program |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20171110 |