CN107328476A - A kind of interference pattern data acquisition read-out system based on infrared focal plane detector - Google Patents
A kind of interference pattern data acquisition read-out system based on infrared focal plane detector Download PDFInfo
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- G—PHYSICS
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- G01J3/00—Spectrometry; Spectrophotometry; Monochromators; Measuring colours
- G01J3/28—Investigating the spectrum
- G01J3/45—Interferometric spectrometry
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J3/00—Spectrometry; Spectrophotometry; Monochromators; Measuring colours
- G01J3/02—Details
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J3/00—Spectrometry; Spectrophotometry; Monochromators; Measuring colours
- G01J3/28—Investigating the spectrum
- G01J3/2803—Investigating the spectrum using photoelectric array detector
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Abstract
The invention discloses an interference pattern data acquisition read-out system based on infrared focal plane detector, handled by prober interface and the signal acquisition of infrared focal plane detector is read to store and carries out technical finesse onto host computer by correction module by FPGA SECO and acquisition module.The interference pattern data acquisition read-out system based on infrared focal plane detector can effectively complete reading and the acquisition function of the middle long wave focus planar detector of large area array, and the signal to noise ratio and antijamming capability of gathered data are high.Basis is provided to the Fourier spectrometer interference pattern data acquisition that is used for of following large area array long wave focus planar detector.
Description
Technical field:
The present invention relates to a kind of signal acquiring system, and in particular to a kind of interference pattern number based on infrared focal plane detector
According to collection read-out system.
Background technology:
The basic detection principle of system is Fourier spectrum detection, i.e., using Michelson's interferometer principle, to being tested mesh
Target interference signal according to aplanatism difference sampled, then interference light intensity signal progress Fourier transformation so that obtain by
The spectrum of observed object.Interference signal is that interferometer is produced, and system basic composition is detector, interference system and optical system
System.The detector of infrared band is also needed to be operated in low temperature environment, and Dewar plus liquid nitrogen refrigerating are needed to use during ground handling.Simultaneously
Laser is also needed to, laser produces the poor reference signal of aplanatism by interference system, and this signal is sampling synchronization signals.
The interferometer of the system is to use Michelson's interferometer structure, by the index glass that moves back and forth and fixed
Horizontal glass and spectroscope and speculum group into optical system produce interference signal, index glass is by index glass motion control box here
Controlled motor makes it carry out uniform motion.
The weak point of detection method based on principle of interference is exactly that the time required for detection is longer, and only acquisition is complete
A width interference pattern, spectra inversion could be carried out, then obtain measured target spectral information.And based on focal plane detection skill
Art, in a conoscope image during, the interference pattern from hundreds and thousands of pixels can be obtained simultaneously, spy is greatly improved
Efficiency is surveyed, the detection to prescribed limit is equipped with optical system for high resolution, can realize the detection of more high spatial resolution.
Interference signal obtains system and is mainly the sampling for completing interferogram signal and relevant treatment, these signal acquisitions and place
Reason is except the characteristic by signal in itself, such as dynamic range, signal noise level etc. are limited, while also by the optical path difference time
Interval limitation, conditioning, collection, transmission, the storage of data are required for completing in an aplanatism difference interval.
Fourier spectrum detection initially apply in chemical analysis field, with Fourier transform spectrometer, theoretical system into
Ripe, the application in astronomical and atmospheric science field also causes extensive attention.Current Fourier transform spectrometer, is on meteorological remote sensing
Application have become a kind of trend.Spaceborne SEQUENCING VERTICAL survey meter be the main infrared remote sensing instrument that is carried on meteorological satellite it
One.
The U.S. begins to develop space interference spectral detection device from nineteen sixties.Using interferometer as light splitting hand
The atmospheric sounding set of section was just carried before and after the seventies in last century on " nimbus " test satellite.In decades, the U.S., Europe
The state such as continent and Japan have developed a variety of space high spectral resolution Atmospheric Survey instruments.In these research projects, most master
Syllabus is that detection chemical composition (such as ozone greenhouse gases) is mainly environmental services, such as MIPAS, TES.Another portion
Divide and serve primarily in meteorology, such as GIFTS, CrIS and IASI.Most represented in the interferometer research project for serving meteorology
Property is:ITS, GHIS, GIFTS, CrIS and ISAI.Preceding four projects are the U.S., and last project IASI is French.
ITS is the continuation that interference detection is studied in Nimbus, is developed into CrIS.CrIS and IASI are operated in SSO (Sun Synchronous Orbit) track
On, CrIS highest spectral resolutions reach 0.6 wave number or so, and IASI highest spectral resolutions reach 0.35 wave number or so.GHIS
Research with GIFTS is to serve stationary orbit meteorological satellite.In these interference formula Atmospheric Survey research projects, GIFTS makees
For stationary orbit Atmospheric Survey project, advanced SEQUENCING VERTICAL survey meter is presently the most.
Since nineteen seventies, the interferometer research work that domestic Ji Jia scientific research institutions are carried out is:Xi'an
Ray machine environmental satellite, wave band is visible ray to near-infrared;The work of Shanghai Institute of Technical Physics in this respect is mainly
Study 3~15um of wave band, i.e. medium wave, long wave infrared region.
The SEQUENCING VERTICAL survey meter that No. four meteorological satellites of wind and cloud of China's transmitting of the second half year in 2016 are carried is medium wave 32*4
Photovoltaic type infrared focal plane detector, long wave 32*4 guide type infrared focal plane detectors are that China will be used for infrared do first
Relating to the focus planar detector of signal detection is used to use on star.
The content of the invention
It is an object of the invention to provide it is a kind of based on infrared focal plane detector the poor condition down-sampling of aplanatism interference
Signal acquisition circuit, is realized and obtains 32*32 width interferogram signals simultaneously, and the problem of interference detection efficiency is low before solving is improved
Detection time resolution ratio.
Data collecting system includes several parts.Part I is prober interface processing module (one-level conditioning), by joining
Examine source, resistance pressure-dividing network, filter capacitor, follower and wave filter group into;Part II is detector signal correction module
(two grades of conditionings), by the operation amplifier circuit of high-speed low-noise and the filter circuit of resistance capacitance component and comparator group
Into;3rd part is FPGA SECO and acquisition module, passes through high speed FPGA high speeds, latch, high speed operation amplifier
Built with 16 ultra high speed A/D conversion chips and resistance capacitance.Part IV is power module, passes through power conversion chip
Build.5th part is data processing module, is compiled in fact on the platforms of Visual studios 2010 using C language
It is existing.
The workflow of circuit is described below
Electric sequence:Successively will be by power supply opening in front of laser power supply and laser, then analog power, digital electric
Source, index glass motor, PCIE capture card power supply electrifyings.
Power down sequence:PCIE capture cards power supply, index glass power supply, digital power, analog power, laser front are disconnected successively
Power supply and laser power supply.
Open after index glass motor power, the at the uniform velocity signal sent it was observed that index glass at the uniform velocity moves reciprocatingly and detected is said
It is bright to start normally.
Black matrix is placed on to the light path entrance (situation at room temperature can also be measured by not placing black matrix) of detector, opened
PCIE capture programs, input collection picture number, observe index glass movement position, or at the uniform velocity area's signal of watching what is going on, are moved in index glass
Move to one side and start sampling when preparing and returning, any key is put after the completion of sampling and is exited.
After system power supply is opened in sequence, power supply starts to power to modules, wherein ± 6.5V analog power is straight
Connect and powered to the circuit of detector signal correction module and prober interface processing module;In detector signal correction module ±
6.5V produces+3.3V voltage sources by voltage conversion chip and is transferred to FPGA SECO and acquisition module by signal wire again
Powered to circuit.
5V digital power is to FPGA SECO and acquisition module, and the voltage for producing 3.3V by voltage conversion chip is given
Circuit is powered;Directly pass through to prober interface processing module simultaneously also by FPGA SECO and acquisition module indirect communication
Plate level cabling is powered to detector.
Here the simulation 3.3V changed in FPGA SECO and acquisition module by ± 6.5V analog power is to fortune
Amplifier is calculated to power, by the digital 3.3V of 5V digital power conversions be to A D chips, latch and be converted into after digital 1.2V
Powered to FPGA.
After system starts, it is even that FPGA SECO and acquisition module are firstly received that index glass motion control box sends
Fast signal, direction signal and sampled signal, then the program compiled by VHDL produce and meet detector work requirements
Clock signal.
These clock signals are connected and then are transmitted directly in detector by cable and prober interface processing module
On sequential pin.
Detector is received after correct clock signal, can export analog signal and by prober interface processing module
The devices such as slide rheostat, electric capacity are biased levelling to it, reach optimum state, interference signal then is passed through into port
Outflow.
Interference signal by difference transmission lines be transferred to next stage detector signal correction module by operational amplifier and
The filter circuit and comparator of resistance capacitance component, signal is filtered and dynamic range levelling, expire input signal
The input demand of sufficient AD conversion module.Complete signal after signal correction and FPGA SECO and collection mould are inputted by coaxial cable
Block, first passes through high speed fully differential low noise operational amplifier and single-ended signal is converted into differential signal, then pass through 16 AD at a high speed
Conversion chip converts analog signals into data signal, and data are sent into PCIE- by latch and FPGA SECO
In 7350 high-speed figure capture cards, by the data processing module of position machine, real time data acquisition is got off.
Beneficial effect
The interference pattern data acquisition read-out system based on infrared focal plane detector can effectively complete large area array
The reading of middle long wave focus planar detector and acquisition function, the signal to noise ratio and antijamming capability of gathered data are high.To future
The extensive utilization of large area array long wave focus planar detector provides the foundation.
Brief description of the drawings
Fig. 1 is the schematic diagram of interferometer system.
Fig. 2 is the system block diagram of acquisition system.
Fig. 3 is the system block diagram of the digital conditioning modules of FPGA.
Fig. 4 is the system block diagram of prober interface interface processing module.
Fig. 5 is the system block diagram of detector signal correction module.
Fig. 6 is data acquisition software operation interface.
Fig. 7 is the interference pattern (unitary) collected.
Fig. 8 is the spectrogram (unitary) that interference pattern inverting is obtained.
Fig. 9 is the spectrogram (32*32 members) that interference pattern inverting is obtained.
Embodiment:
Power module part:
The power supply of digital circuit is 5V, and the power supply of analog circuit has two kinds of ± 6.5V and+3.3V, wherein+3.3V be by
Linear quantizer is by obtained by+6.5V voltage transformations.
Digital circuits section is the offer power supply of FPGA SECO and collecting part.
Artificial circuit part is that prober interface processing module and detector signal correction module are powered.
Select the LM1085CM of LINEAR companies as feed regulator isolator in power module, maximum output current is
3A.The adjuster has Thermal shutdown function, once temperature is more than 165 degree, adjuster will be off, while also having short-circuit protection
With safety zone protection.
+ 3.3V ground wire and the ground wire of biased electrical source plate enter planet-shaped connection, the mesh of this layout in signal regulating panel
Be reduce earth loop, it is to avoid air interference is coupled to analog loopback, meanwhile, simulation ground wire is with digital ground wire using nearby
Connection, it is to avoid stray inductance, parasitic capacitance introduce noise caused by long line.
Prober interface interface processing module:
Prober interface interface processing module is a voltage offset electric circuit, by reference source, resistance pressure-dividing network, filtered electrical
Hold, follower and wave filter group into.
Prober interface interface processing module needs to handle 3 kinds of different types of signals, and a kind of is stable bias voltage,
It is a kind of be control detector work sequential also have it is a kind of be detector output signal.
For bias voltage regulation we an add circuit built by operational amplifier, then use reference source
The potential-divider network that ADR4540, slide rheostat (0~10K) and 10K resistance are built as adder input, to realize
Inputted by slide rheostat and then regulation adder and then adjust the function of bias voltage.
Reference source uses ADR4540, and this is that a of AD companies (ANALOG DEVICES) is high accuracy, low work(
Consumption, low noise reference voltage source chip.
Operational amplifier in add circuit uses AD companies (ANALOG DEVICES) OP07 chips.
OP07 chips are a kind of low noise, the bipolar operational amplifier integrated circuit of non-chopper-zero-stabilized.
Cabling connection direct for clock signal.
Requirement to signal is undistorted, high-speed low-noise, and noise high-speed operational amplifier (Dezhou instrument has been selected here
Device TI LM6142), the follower that an enlargement ratio is 1 is constructed, by front and rear signal isolation so that signal high-speed transfer.
Because detector is single-end output signal, we using fully differential high speed operation amplifier (Texas Instrument TI's
THS4131 the signal output quality that differential signal brings up to next stage detector signal correction module) is converted thereof into.
Detector signal correction module:
The filter circuit of the road operational amplifiers of detector signal correction module Shi You 16 and resistance capacitance component composition leads to again
Cross 16 comparator chips, signal is filtered and dynamic range levelling, input signal is met the defeated of AD conversion module
Enter demand.
In focus planar detector, the scope of signal is in the voltage range close to 4~2V, this input with conventional ADC
Scope is inconsistent, so in analog signal conditioner circuit, first having to carry out the translation of signal level, then adjustment detection
The dynamic range and ADC input ranges of device output signal are consistent.
First pass through operational amplifier and the differential signal transmitted from upper level is become into single-ended signal, with operation amplifier
Device builds an add circuit, the potential-divider network built with reference source ADR4540, slide rheostat and 10K resistance as
The input of adder, realizes that signal is adjustable.
Analog signal makes an excuse processing module to detector signal correction module using differential transfer interface from prober interface,
This has allowed for the factor of mechanical location, is needed between information-processing circuit and detector drive circuit board by certain length
Cable connection.
FPGA SECO and acquisition module:
FPGA SECO and the road voltage offset electric circuits of acquisition module Shi You 16, single-ended signal slip sub-signal chip, AD
Change-over circuit and latch adjust what is combined with FPGA and PCIE7350 digital collections module by sequential, in addition the mould
Block also has one to make an excuse the interface that processing module sends detector sequential to prober interface.
That wherein FPGA is selected is the EP3C25Q240C8 of Cyclone3 series.
In A/D converter circuit, the ADC products LT2203 of LINERA companies has been selected as modulus switching device, the chip
With differential input end, it is allowed to signal single ended input, signal output area sets pin PGA states optional by outside gain,
When PGA is grounded, LTC2203 input range is 2.5V, when PGA connects power supply, and input range 1.677V is drawn by PGA
The state of pin sets ADC front-end gains, matches with the range of signal that actually enters.
Because the chip is Differential Input interface, so needing to drive by differential driving chip for single-ended signal
It is dynamic, the fully differential low noise operational amplifier LT1994 of LINERA companies has been selected here.
In order that the work for obtaining PCIE7350 Data Acquisition Cards does not interfere with the quality of signal acquisition, we are put using computing
Big device is isolated to both earth-returns.
PCIE-7350 Data Acquisition Cards (Ling Hua companies) are completed to interference diagram data using the data method synchronous with clock
Reception.
Claims (1)
1. a kind of interference pattern data acquisition read-out system based on infrared focal plane detector, including prober interface processing mould
Block, detector signal correction module, FPGA SECO and acquisition module, power module, data processing module, its feature exist
In:
Described prober interface processing module is by reference source, resistance pressure-dividing network, filter capacitor, follower and wave filter group
Into;
Described detector signal correction module is (by the filtering of the operation amplifier circuit and resistance capacitance component of high-speed low-noise
Circuit and comparator composition;
Described FPGA SECO and acquisition module is high by high speed FPGA, high-speed latches, high speed operation amplifier and 16
Fast AD conversion chip and resistance capacitance are built;
After system power supply is opened in sequence, the analog power of ± 6.5V in described power module is directly to detector signal
Correction module and the circuit of prober interface processing module are powered;± 6.5V is turned by voltage in detector signal correction module
Change that chip generation+3.3V voltage sources are transferred to FPGA SECO by signal wire again and acquisition module is powered to circuit;
5V digital power is produced to FPGA SECO and acquisition module by voltage conversion chip in described power module
3.3V voltage is powered to circuit;Handled simultaneously also by FPGA SECO and acquisition module indirect communication to prober interface
Module is directly powered by plate level cabling to detector;
The simulation 3.3V changed in FPGA SECO and acquisition module by ± 6.5V analog power is to operational amplifier
Power supply, by the digital 3.3V of 5V digital power conversions be to A D chips, latch and be converted into after digital 1.2V give FPGA supply
Electricity;
After system starts, FPGA SECO and acquisition module are firstly received the at the uniform velocity letter that index glass motion control box is sent
Number, direction signal and sampled signal, then the program compiled by VHDL produces the sequential for meeting detector work requirements
Signal;These clock signals connect and then are transmitted directly to sequential in detector by cable and prober interface processing module
On pin;Detector is received after correct clock signal, can export analog signal and by prober interface processing module
The devices such as slide rheostat, electric capacity are biased levelling to it, reach optimum state, interference signal then is passed through into port
Outflow;Interference signal is transferred to next stage detector signal correction module by difference transmission lines and passes through operational amplifier and resistance
The filter circuit and comparator of capacitance component, signal is filtered and dynamic range levelling, input signal is met AD
The input demand of modular converter;Complete signal after signal correction and FPGA SECO and acquisition module inputted by coaxial cable,
First pass through high speed fully differential low noise operational amplifier and single-ended signal is converted into differential signal, then pass through 16 AD conversion at a high speed
Chip converts analog signals into data signal, and data are sent into PCIE-7350 by latch and FPGA SECO
In high-speed figure capture card, by data processing module, real time data acquisition is got off.
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CN109470362A (en) * | 2018-11-21 | 2019-03-15 | 中国科学院上海技术物理研究所 | A kind of infrared interference signal acquiring system and data processing method |
CN109696244A (en) * | 2018-12-28 | 2019-04-30 | 北京北分瑞利分析仪器(集团)有限责任公司 | A kind of Fourier transformation infrared spectrometer index glass scan control module based on FPGA |
CN112284542A (en) * | 2020-09-15 | 2021-01-29 | 中国科学院上海技术物理研究所 | Method for controlling motor of movable mirror of multi-resolution broadband Fourier infrared spectrometer |
CN113125011A (en) * | 2021-03-12 | 2021-07-16 | 中国科学院西安光学精密机械研究所 | Medium wave infrared Hadamard aperture coding spectrum high frame frequency imaging circuit |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109470362A (en) * | 2018-11-21 | 2019-03-15 | 中国科学院上海技术物理研究所 | A kind of infrared interference signal acquiring system and data processing method |
CN109696244A (en) * | 2018-12-28 | 2019-04-30 | 北京北分瑞利分析仪器(集团)有限责任公司 | A kind of Fourier transformation infrared spectrometer index glass scan control module based on FPGA |
CN109696244B (en) * | 2018-12-28 | 2023-11-07 | 北京北分瑞利分析仪器(集团)有限责任公司 | Fourier transform infrared spectrometer moving mirror scanning control module based on FPGA |
CN112284542A (en) * | 2020-09-15 | 2021-01-29 | 中国科学院上海技术物理研究所 | Method for controlling motor of movable mirror of multi-resolution broadband Fourier infrared spectrometer |
CN113125011A (en) * | 2021-03-12 | 2021-07-16 | 中国科学院西安光学精密机械研究所 | Medium wave infrared Hadamard aperture coding spectrum high frame frequency imaging circuit |
CN113125011B (en) * | 2021-03-12 | 2022-07-19 | 中国科学院西安光学精密机械研究所 | Medium wave infrared Hadamard aperture coding spectrum high frame frequency imaging circuit |
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