CN107316898B - 一种静电放电保护电路 - Google Patents

一种静电放电保护电路 Download PDF

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CN107316898B
CN107316898B CN201710558386.1A CN201710558386A CN107316898B CN 107316898 B CN107316898 B CN 107316898B CN 201710558386 A CN201710558386 A CN 201710558386A CN 107316898 B CN107316898 B CN 107316898B
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electrostatic discharge
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CN107316898A (zh
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Shenzhen fuyuanhui Technology Co., Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions

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  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

本发明提供了一种静电放电保护电路，属于半导体集成电路技术领域。该电路包括：第一P层P1、第一N层N1、多晶硅层POLY、第二P层P2、第二N层N2，所述第一P层P1、第一N层N1、第二P层P2、第二N层N2依次叠加，所述多晶硅层POLY位于所述第二P层P2内部且与所述第一N层N1的一面的中间部分相接触。该静电放电保护电路在传统的静电放电保护电路的基础上，在第一N层N1与第二P层P2这两层之间插入了多晶硅层POLY，实践证明，多晶硅层的引入大大降低了闩锁效应触发的可能，提高了电路的静电放电性能。

Description

一种静电放电保护电路
技术领域
本发明属于半导体集成电路技术领域，具体涉及一种静电放电保护电路。
背景技术
静电放电是在电子装配过程中电路板与元件损坏的一个熟悉且被低估的根源。它影响着每一个制造商，无论其大小。虽然很多人认为他们是在静电放电安全的环境中生产产品，但事实上静电放电有关的损坏继续给全世界电子制造工业带来每年数十亿美金的代价。
一颗静电放电设计良好的芯片，应该在每个输入和输出脚上都有专门的静电放电保护电路。而SCR(可控硅，Silicon Controlled Rectifier)结构作为一种常用的静电放电保护电路，起着非常重要的作用。常见的SCR(可控硅)结构如图1所示，是由第一P层P1、第一N层N1、第二P层P2、第二N层N2四层三端结构元件，共有三个PN结。其作为传统的静电放电保护电路，具有面积小，放电能力强的优点。但是，由于其同时具有三个PN结，造成比较容易触发闩锁效应，从而导致芯片的烧毁。
发明内容
为解决现有可控硅型静电放电电路容易触发闩锁效应的技术问题，本发明提供了一种静电放电保护电路。
一种静电放电保护电路，该电路包括：第一P层P1、第一N层N1、多晶硅层POLY、第二P层P2、第二N层N2，所述第一P层P1、第一N层N1、第二P层P2、第二N层N2依次叠加，所述多晶硅层POLY位于所述第二P层P2内部且与所述第一N层N1的一面的中间部分相接触。
上述静电放电保护电路在传统的静电放电保护电路的基础上，在第一N层N1与第二P层P2这两层之间插入了多晶硅层POLY，实践证明，多晶硅层的引入大大降低了闩锁效应触发的可能，提高了电路的静电放电性能。
附图说明
图1是传统的静电放电保护电路结构示意图；
图2是本发明实施方式提供的静电放电保护电路结构示意图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明了，下面结合具体实施方式并参照附图，对本发明进一步详细说明。应该理解，这些描述只是示例性的，而并非要限制本发明的范围。此外，在以下说明中，省略了对公知结构和技术的描述，以避免不必要地混淆本发明的概念。
为解决现有可控硅型静电放电电路容易触发闩锁效应的技术问题，本发明提供了一种静电放电保护电路，如图2所示，该电路包括：第一P层P1、第一N层N1、多晶硅层POLY、第二P层P2、第二N层N2，所述第一P层P1、第一N层N1、第二P层P2、第二N层N2依次叠加，所述多晶硅层POLY位于所述第二P层P2内部且与所述第一N层N1的一面的中间部分相接触。
上述静电放电保护电路在传统的静电放电保护电路的基础上，在第一N层N1与第二P层P2这两层之间插入了多晶硅层POLY，实践证明，多晶硅层的引入大大降低了闩锁效应触发的可能，提高了电路的静电放电性能。
应当理解的是，本发明的上述具体实施方式仅仅用于示例性说明或解释本发明的原理，而不构成对本发明的限制。因此，在不偏离本发明的精神和范围的情况下所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。此外，本发明所附权利要求旨在涵盖落入所附权利要求范围和边界、或者这种范围和边界的等同形式内的全部变化和修改例。

Claims (1)

1.一种静电放电保护电路，其特征在于，包括：第一P层P1、第一N层N1、多晶硅层POLY、第二P层P2、第二N层N2，所述第一P层P1、第一N层N1、第二P层P2、第二N层N2依次叠加，所述多晶硅层POLY位于所述第二P层P2内部且与所述第一N层N1的一面的中间部分相接触。
CN201710558386.1A 2017-07-10 2017-07-10 一种静电放电保护电路 Active CN107316898B (zh)

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CN202332849U (zh) * 2011-10-11 2012-07-11 康可电子（无锡）有限公司 具过压及开路续流功能的led保护单元
CN102569266A (zh) * 2012-02-20 2012-07-11 中国科学院微电子研究所 一种多晶硅可控硅及其制作方法

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