CN107315338A - A kind of chronometer time correcting device - Google Patents
A kind of chronometer time correcting device Download PDFInfo
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- CN107315338A CN107315338A CN201710465639.0A CN201710465639A CN107315338A CN 107315338 A CN107315338 A CN 107315338A CN 201710465639 A CN201710465639 A CN 201710465639A CN 107315338 A CN107315338 A CN 107315338A
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- vcxo
- module
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- communication connection
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- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F5/00—Apparatus for producing preselected time intervals for use as timing standards
- G04F5/14—Apparatus for producing preselected time intervals for use as timing standards using atomic clocks
-
- G—PHYSICS
- G04—HOROLOGY
- G04R—RADIO-CONTROLLED TIME-PIECES
- G04R20/00—Setting the time according to the time information carried or implied by the radio signal
- G04R20/02—Setting the time according to the time information carried or implied by the radio signal the radio signal being sent by a satellite, e.g. GPS
Abstract
The present invention relates to time calibration field, more particularly to a kind of chronometer time correcting device, including receiver, time complexity curve module, servo, voltage-controlled correcting module, gain control module, temperature control module, vcxo modules, conventional electronics and quantized system, receiver and time complexity curve the module communication connection, the time complexity curve module and servo communication connection, the servo and voltage-controlled correcting module communication connection, voltage-controlled correcting module and vcxo the module communication connection, the vcxo modules and conventional electronics and time correcting module communication connection, the beneficial effects of the invention are as follows:Pass through the popularization of GPS synchronous calibrations, it is to provide a new stage to existing atomic clock, we completely can be synchronous with GPS by the longtime running index of atomic clock, and short run target retains prior art, it can thus avoid due to the output signal frequency change that the complete machine drift that internal system reason is caused is brought.
Description
Technical field
The present invention relates to time calibration field, more particularly to a kind of chronometer time correcting device.
Background technology
The acceleration for calibrating science and technology and manufacturing process with modern time is lifted so that the application of the time calibration more people
Also got a promotion with change, universalness, and performance indications.Even if so, but for running on the time calibration on satellite,
We are also concerned about its performance parameter, i.e. life-span.Time calibration on space station or satellite is because assume responsibility for long-term
The work related with chronometer time, if due to the alkali metal atom of time calibration internal physical components of system as directed consume treat to the greatest extent and
Continuation can not be on active service, we be merely able to change again from ground one time calibration heaven it could be maintained to undertake prolonging for work
Continuous property, this is obviously very unfavorable to continuous precision time task, and the trouble for changing clock can be brought to us.Passive Rb
In atomic frequency standard, quantized system is the core component of whole atomic frequency standard, and it provides frequency stabilization, a line width narrower atom
RESONANCE ABSORPTION line.After comprehensive modulation, what electronic circuit was produced comes from voltage-controlled quartz oscillator(VCXO)Band modulation
Microwave interrogation signals act on quantized system, after quantum frequency discrimination, the processing by servo circuit to quantum frequency discrimination information, finally
The output frequency of local oscillator is locked in the hyperfine 0-0 transition centers frequency of the ground state of rubidium atom.Existing most of servo circuits
Phase demodulation is synchronized to quantum frequency discrimination signal according to the comprehensive synchronous phase discrimination signal provided, and according to identified result information using only
The mode of the voltage-controlled local oscillators of vertical D/A realizes that the closed loop of complete machine is locked, and believes eventually through the higher frequency of local oscillator output stability
Number.The popularization of GPS synchronous calibrations, is to provide a new stage to existing atomic clock, we completely can be by atom
The longtime running index of clock is synchronous with GPS, and short run target retains prior art, can thus avoid because internal system is former
The output signal frequency change that complete machine drift caused by is brought.
The content of the invention
The invention aims to overcome the deficiencies in the prior art, there is provided a kind of chronometer time correcting device.
The present invention is to be achieved through the following technical solutions:
A kind of chronometer time correcting device, including receiver, time complexity curve module, servo, voltage-controlled correcting module, gain control molding
Block, temperature control module, vcxo modules, conventional electronics and quantized system, receiver and time complexity curve the module communication connection,
The time complexity curve module and servo communication connection, the servo and voltage-controlled correcting module communication connection, the voltage-controlled amendment mould
Block and vcxo module communication connections, the vcxo modules and conventional electronics and time correcting module communication connection, the biography
System electronic circuit and quantized system communication connection, quantized system and servo communication connection.
The receiver obtains the signal that gps satellite is sent, and GPS second pulse signal is obtained after converted processing and delivers to the time
In correcting module, the VCXO frequency signals exported are counted in the range of a cycle of GPS second pulse and obtain corresponding
Correction value deliver to servo, and corresponding direct current exported by voltage-controlled correcting module get together voltage and act on VCXO.
The GPS second pulse gate signal(Width is T)In high level, after the t1 times, VCXO frequency signals first
The rising edge of individual pulse, makes counter Enable Pin effectively, starts VCXO frequency signals and counts, after T seconds, GPS second pulse gate
When low level arrives, do not stop counting, after the t2 times, when then and the rising edge of VCXO frequency signals that arrives arrives
Hour counter is closed.Here signal is enabled(Actual signal strobe)Time width, exactly equal to VCXO frequency signals is complete
Periodicity(N).According to above-mentioned relevant parameter:T, t1, t2, N, can be obtained according to the servo in traditional GPS time differences comparison technology Fig. 2
The correction value of corresponding VCXO frequency signals is obtained, and corresponding direct current is exported by the voltage-controlled correcting module in Fig. 1 and gets together voltage
Act on VCXO.
The temperature control modules:Contain Temperature Controlling Chip in the inside(Temperature control is used)And thermistor(Thermometric is used).By center
Processor control can be with set temperature value T, because whole temperature control modules are placed in high stability crystal oscillator VCXO (temperature control module), institute
Corresponding operating ambient temperature can be set with central processing unit and actual operating ambient temperature information is obtained.Its principle
As shown in figure 8, two of which R and R1 are the resistance with identical temperature coefficient, its resistance should select suitable with Rk.Here
R1 value reflects actual working environment temperature T.Rk is a thermistor, and it is affixed on the surface of temperature control module, to perceive
Actual operating ambient temperature T.Therefore when operating ambient temperature T is unchanged, electric bridge is in balance in upper figure, is delivered to heater wire
The temperature-compensated voltage value on ring road is 0.Once operating ambient temperature T changes, then thermistor Rk resistance will diminish
(Temperature is raised)Or become big(Temperature is reduced), then be present voltage difference in electric bridge two ends, be changed into after operational amplifier A differential amplification
Temperature-compensated voltage is delivered to voltage source, and traditional heating wire coil loop is given while exporting.The gain amplifier of whole circuit is by transporting
Calculate amplifier negative feedback resistor Rw regulation, Rw be a digital potentiometer, by adjusting Rw resistance with reach foregoing circuit mend
Repay the factor and change function.
Bridge thermometric in the voltage-controlled module is main by two resistance identical R, a preset temperature value thermistor
Sensor Ro(It determines VCXO operating ambient temperature)And temperature-measuring thermistor Rk compositions.When VCXO operating ambient temperatures are permanent
Regularly, i.e., thermistor Rk measured values are equal with preset value Ro, and now resistance bridge A, B ends output voltage difference will be 0, whole pressure
Control module output end Uout is output as 0.When VCXO operating ambient temperatures change, then A, B end of bridge form certain
Voltage difference, delivers to A3 by voltage follower A1 and A2 transmission and carries out differential amplification, it is contemplated that the voltage difference after amplification can
It is effective to gather, so the output end in differential amplification A3 adds a gain linearity regulation circuit A4.Obtained voltage-controlled mould
After the voltage-controlled voltage summation that block voltage difference U out is produced with voltage-controlled correcting module, VCXO modules are delivered to.
Further, atomic clock can be synchronized on gps signal by such scheme, but this is not complete, because I
Also need to improve the short-term frequency stability of atomic clock:According to Fig. 2, the letter that we obtain after VCXO is divided through DDS
Number, local reference source, GPS second pulse delivered in delay array module.Local reference source generally selects high steady H clocks herein
Source, its output signal frequency is usually 10MHz, and the VCXO of our selections frequency is also 10MHz, after being divided through DDS
Obtain 1MHz frequency signal.Wherein the schematic diagram of delay array module is as shown in figure 4, corresponding sequential is as shown in Figure 5.
Further, preset GPS second pulse gate signal(Width is T=1 second)When high level arrives, VCXO frequency dividings
The rising edge of first pulse of signal, makes counter 1, the Enable Pin of counter 2 effectively, and respectively to VCXO fractional frequency signals and locally
Reference signal is counted, after T seconds, when preset GPS second pulse gate signal high level arrives again, and now two counters are not
There is stopping to count, two counters are simultaneously closed off until the rising edge of VCXO fractional frequency signals then and extremely arrives always.Here
Enable signal(Actual signal strobe)Time width, exactly equal to VCXO fractional frequency signals complete cycle number, if VCXO divide
The frequency of signal is Fx, and the frequency of local reference source signal is fo, in gate time T, counter to VCXO fractional frequency signals and
The counting of local reference source signal is respectively N1, N2, then has:
(1)
By formula(1)Understand, the frequency fx of VCXO fractional frequency signals and local reference source frequency fo and the count value N1, N2 of two counters
It is relevant.It is to be noted that VCXO fractional frequency signals and local reference signal are differed due to frequency in Fig. 5, so at A, B point
Their phase can not possibly be overlapping equal, to being amplified at A, B in Fig. 5, and what we can obtain Fig. 6 " has phase difference
Measurement figure ",
When the signal strobe triggering of GPS second pulse is flushed to along the pulse to be come, the rising edge of next local reference signal is waited, now
Carve and enable corresponding counter in A points and B points progress " starting counting up " and " terminating to count " operation.As shown in Figure 5, enablement count device
Moment point A and B and the next of local reference signal signal are flushed to there is time difference △ t1, △ t2 along the pulse, and it is specific poor
The size of value depends on local reference signal and phase difference value of the local reference signal at A moment or B moment, and its size
It is not a constant fixed skew relation, this may result in has different errors in each sampling, for those
, it is necessary to further improve the method for measurement to determine △ t1, △ t2 for high stability, high-frequency clock frequency source
Value, to improve its measurement accuracy.Now we employ following solution:According to Fig. 4, VCXO fractional frequency signals and local ginseng
Signal is examined also to deliver to respectively in non-gate array, non-gate array there is provided N grades(N is even number)NOT gate and one and door, it should be noted that
It is these NOT gates and with door is produced by internal fpga chip simulation, the VCXO fractional frequency signals when the A moment in Fig. 6 arrives
By respectively through the 2 of non-gate array NOT gates, 4 NOT gates, 6 N number of NOT gates of NOT gate ..., then referred to respectively with local again
Source signal passes through one and door, as shown in Figure 7.It can know with reference to Fig. 6 and Fig. 7:Arrived when the A moment or B moment in Fig. 6
When, the high level that local reference signal is only waited until with door in Fig. 7 arrive just can by after AND operation by the detection module of state 1
It is identified as " 1 ":For example when the A moment in Fig. 6 arrives, because VCXO fractional frequency signals are high level(That is one state), when by N=
After logic inverter delay in 6 Fig. 7, the high level of local reference source signal arrives, and makes the corresponding AND gate computing be
" 1 ", and the AND gate computing in N=2 before, N=4 is " 0 ".So, as long as passing through state " 1 " detection module in Fig. 7
Detect that the N values that corresponding AND gate computing is 1 can try to achieve the size of the △ t in Fig. 6.It similarly can also try to achieve △ t2 size.
There are above-mentioned △ t1, the △ t2 tried to achieve, in conjunction with formula(1), according to prior art, we can accurately measure acquisition
The frequency correction value of VCXO fractional frequency signals, and voltage effect is got together by the corresponding direct current of voltage-controlled correcting module output in Fig. 1
In VCXO.
Compared with prior art, the beneficial effects of the invention are as follows:By the popularization of GPS synchronous calibrations, to existing atomic clock
It is to provide a new stage, we completely can be synchronous with GPS by the longtime running index of atomic clock, and refers in short term
Mark retains prior art, can thus avoid due to the output signal frequency that the complete machine drift that internal system reason is caused is brought
Change.
Brief description of the drawings
Fig. 1 is complete machine fundamental diagram of the invention;
Fig. 2 is time complexity curve modular structure schematic diagram in the present invention;
Fig. 3 is the timing diagram of VCXO modules in the present invention;
Fig. 4 is the schematic diagram of delay array module in the present invention;
Fig. 5 is the timing diagram of delay array module in the present invention;
Fig. 6 is the measurement figure of VCXO fractional frequency signals and local reference signal in the present invention;
Fig. 7 is VCXO fractional frequency signal NOT gate array of figure in the present invention;
Fig. 8 is the schematic diagram of control module in the present invention;
Fig. 9 is gain adjustment module schematic diagram in the present invention.
Embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
Complete machine fundamental diagrams of the Fig. 1-9, Fig. 1 for the present invention is referred to, Fig. 2 is time complexity curve modular structure in the present invention
Schematic diagram, Fig. 3 is the timing diagram of VCXO modules in the present invention, and Fig. 4 is the schematic diagram of delay array module in the present invention, and Fig. 5 is
The timing diagram for the array module that is delayed in the present invention, Fig. 6 is the measurement figure of VCXO fractional frequency signals and local reference signal in the present invention,
Fig. 7 is VCXO fractional frequency signal NOT gate array of figure in the present invention, and Fig. 8 is the schematic diagram of control module in the present invention, and Fig. 9 is the present invention
Middle gain adjustment module schematic diagram.
A kind of chronometer time correcting device, including receiver, time complexity curve module, servo, voltage-controlled correcting module, gain control
Molding block, temperature control module, vcxo modules, conventional electronics and quantized system, receiver and time complexity curve the module communication
Connection, the time complexity curve module and servo communication connection, the servo and voltage-controlled correcting module communication connection are described voltage-controlled to repair
Positive module and vcxo module communication connections, the vcxo modules and conventional electronics and time correcting module communication connection, institute
State conventional electronics and quantized system communication connection, quantized system and servo communication connection.
The receiver obtains the signal that gps satellite is sent, and GPS second pulse signal is obtained after converted processing and delivers to the time
In correcting module, the VCXO frequency signals exported are counted in the range of a cycle of GPS second pulse and obtain corresponding
Correction value deliver to servo, and corresponding direct current exported by voltage-controlled correcting module get together voltage and act on VCXO.
The GPS second pulse gate signal(Width is T)In high level, after the t1 times, VCXO frequency signals first
The rising edge of individual pulse, makes counter Enable Pin effectively, starts VCXO frequency signals and counts, after T seconds, GPS second pulse gate
When low level arrives, do not stop counting, after the t2 times, when then and the rising edge of VCXO frequency signals that arrives arrives
Hour counter is closed.Here signal is enabled(Actual signal strobe)Time width, exactly equal to VCXO frequency signals is complete
Periodicity(N).According to above-mentioned relevant parameter:T, t1, t2, N, can be obtained according to the servo in traditional GPS time differences comparison technology Fig. 2
The correction value of corresponding VCXO frequency signals is obtained, and corresponding direct current is exported by the voltage-controlled correcting module in Fig. 1 and gets together voltage
Act on VCXO.
The temperature control modules:Contain Temperature Controlling Chip in the inside(Temperature control is used)And thermistor(Thermometric is used).By center
Processor control can be with set temperature value T, because whole temperature control modules are placed in high stability crystal oscillator VCXO (temperature control module), institute
Corresponding operating ambient temperature can be set with central processing unit and actual operating ambient temperature information is obtained.Its principle
As shown in figure 8, two of which R and R1 are the resistance with identical temperature coefficient, its resistance should select suitable with Rk.Here
R1 value reflects actual working environment temperature T.Rk is a thermistor, and it is affixed on the surface of temperature control module, to perceive
Actual operating ambient temperature T.Therefore when operating ambient temperature T is unchanged, electric bridge is in balance in upper figure, is delivered to heater wire
The temperature-compensated voltage value on ring road is 0.Once operating ambient temperature T changes, then thermistor Rk resistance will diminish
(Temperature is raised)Or become big(Temperature is reduced), then be present voltage difference in electric bridge two ends, be changed into after operational amplifier A differential amplification
Temperature-compensated voltage is delivered to voltage source, and traditional heating wire coil loop is given while exporting.The gain amplifier of whole circuit is by transporting
Calculate amplifier negative feedback resistor Rw regulation, Rw be a digital potentiometer, by adjusting Rw resistance with reach foregoing circuit mend
Repay the factor and change function.
Bridge thermometric in the voltage-controlled module is main by two resistance identical R, a preset temperature value thermistor
Sensor Ro(It determines VCXO operating ambient temperature)And temperature-measuring thermistor Rk compositions.When VCXO operating ambient temperatures are permanent
Regularly, i.e., thermistor Rk measured values are equal with preset value Ro, and now resistance bridge A, B ends output voltage difference will be 0, whole pressure
Control module output end Uout is output as 0.When VCXO operating ambient temperatures change, then A, B end of bridge form certain
Voltage difference, delivers to A3 by voltage follower A1 and A2 transmission and carries out differential amplification, it is contemplated that the voltage difference after amplification can
It is effective to gather, so the output end in differential amplification A3 adds a gain linearity regulation circuit A4.Obtained voltage-controlled mould
After the voltage-controlled voltage summation that block voltage difference U out is produced with voltage-controlled correcting module, VCXO modules are delivered to.
Further, atomic clock can be synchronized on gps signal by such scheme, but this is not complete, because I
Also need to improve the short-term frequency stability of atomic clock:According to Fig. 2, the letter that we obtain after VCXO is divided through DDS
Number, local reference source, GPS second pulse delivered in delay array module.Local reference source generally selects high steady H clocks herein
Source, its output signal frequency is usually 10MHz, and the VCXO of our selections frequency is also 10MHz, after being divided through DDS
Obtain 1MHz frequency signal.Wherein the schematic diagram of delay array module is as shown in figure 4, corresponding sequential is as shown in Figure 5.
Further, preset GPS second pulse gate signal(Width is T=1 second)When high level arrives, VCXO frequency dividings
The rising edge of first pulse of signal, makes counter 1, the Enable Pin of counter 2 effectively, and respectively to VCXO fractional frequency signals and locally
Reference signal is counted, after T seconds, when preset GPS second pulse gate signal high level arrives again, and now two counters are not
There is stopping to count, two counters are simultaneously closed off until the rising edge of VCXO fractional frequency signals then and extremely arrives always.Here
Enable signal(Actual signal strobe)Time width, exactly equal to VCXO fractional frequency signals complete cycle number, if VCXO divide
The frequency of signal is Fx, and the frequency of local reference source signal is fo, in gate time T, counter to VCXO fractional frequency signals and
The counting of local reference source signal is respectively N1, N2, then has:
(1)
By formula(1)Understand, the frequency fx of VCXO fractional frequency signals and local reference source frequency fo and the count value N1, N2 of two counters
It is relevant.It is to be noted that VCXO fractional frequency signals and local reference signal are differed due to frequency in Fig. 5, so at A, B point
Their phase can not possibly be overlapping equal, to being amplified at A, B in Fig. 5, and what we can obtain Fig. 6 " has phase difference
Measurement figure ",
When the signal strobe triggering of GPS second pulse is flushed to along the pulse to be come, the rising edge of next local reference signal is waited, now
Carve and enable corresponding counter in A points and B points progress " starting counting up " and " terminating to count " operation.As shown in Figure 5, enablement count device
Moment point A and B and the next of local reference signal signal are flushed to there is time difference △ t1, △ t2 along the pulse, and it is specific poor
The size of value depends on local reference signal and phase difference value of the local reference signal at A moment or B moment, and its size
It is not a constant fixed skew relation, this may result in has different errors in each sampling, for those
, it is necessary to further improve the method for measurement to determine △ t1, △ t2 for high stability, high-frequency clock frequency source
Value, to improve its measurement accuracy.Now we employ following solution:According to Fig. 4, VCXO fractional frequency signals and local ginseng
Signal is examined also to deliver to respectively in non-gate array, non-gate array there is provided N grades(N is even number)NOT gate and one and door, it should be noted that
It is these NOT gates and with door is produced by internal fpga chip simulation, the VCXO fractional frequency signals when the A moment in Fig. 6 arrives
By respectively through the 2 of non-gate array NOT gates, 4 NOT gates, 6 N number of NOT gates of NOT gate ..., then referred to respectively with local again
Source signal passes through one and door, as shown in Figure 7.It can know with reference to Fig. 6 and Fig. 7:Arrived when the A moment or B moment in Fig. 6
When, the high level that local reference signal is only waited until with door in Fig. 7 arrive just can by after AND operation by the detection module of state 1
It is identified as " 1 ":For example when the A moment in Fig. 6 arrives, because VCXO fractional frequency signals are high level(That is one state), when by N=
After logic inverter delay in 6 Fig. 7, the high level of local reference source signal arrives, and makes the corresponding AND gate computing be
" 1 ", and the AND gate computing in N=2 before, N=4 is " 0 ".So, as long as passing through state " 1 " detection module in Fig. 7
Detect that the N values that corresponding AND gate computing is 1 can try to achieve the size of the △ t in Fig. 6.It similarly can also try to achieve △ t2 size.
There are above-mentioned △ t1, the △ t2 tried to achieve, in conjunction with formula(1), according to prior art, we can accurately measure acquisition
The frequency correction value of VCXO fractional frequency signals, and voltage effect is got together by the corresponding direct current of voltage-controlled correcting module output in Fig. 1
In VCXO.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
Any modifications, equivalent substitutions and improvements made within refreshing and principle etc., should be included in the scope of the protection.
Claims (5)
1. a kind of chronometer time correcting device, it is characterised in that including receiver, time complexity curve module, servo, voltage-controlled amendment mould
Block, gain control module, temperature control module, vcxo modules, conventional electronics and quantized system, the receiver and time complexity curve
Module communication connection, the time complexity curve module and servo communication connection, the servo and voltage-controlled correcting module communication connection, institute
State voltage-controlled correcting module and vcxo module communication connections, the vcxo modules and conventional electronics and the communication of time correcting module
Connection, the conventional electronics and quantized system communication connection, quantized system and servo communication connection.
2. a kind of chronometer time correcting device according to claim 1, it is characterised in that:The receiver obtains GPS and defended
The signal that star is sent, obtains GPS second pulse signal and delivers in time complexity curve module, the one of GPS second pulse after converted processing
The VCXO frequency signals exported are counted and obtain corresponding correction value in individual periodic regime and deliver to servo, and by voltage-controlled
The corresponding direct current of correcting module output gets together voltage and acts on VCXO.
3. a kind of chronometer time correcting device according to claim 1, it is characterised in that the GPS second pulse gate signal
(Width is T)In high level, after the t1 times, the rising edge of first pulse of VCXO frequency signals makes counter Enable Pin
Effectively, start VCXO frequency signals to count, after T seconds, when GPS second pulse gate low level arrives, do not stop counting, pass through
After the t2 times, when then and the rising edge arrival hour counter of VCXO frequency signals that arrives is closed.
4. a kind of chronometer time correcting device according to claim 1, it is characterised in that:The temperature control modules:In
Contain Temperature Controlling Chip in face(Temperature control is used)And thermistor(Thermometric is used);By central processing unit control can with set temperature value T,
Because whole temperature control modules are placed in high stability crystal oscillator VCXO (temperature control module), so central processing unit can set corresponding
Operating ambient temperature and the operating ambient temperature information for obtaining reality.
5. a kind of chronometer time correcting device according to claim 1, it is characterised in that:Bridge in the voltage-controlled module
Thermometric is main by two resistance identicals R, a preset temperature value thermistor (temperature) sensor Ro(It determines VCXO building ring
Border temperature)And temperature-measuring thermistor Rk compositions;When VCXO operating ambient temperatures are constant, i.e., thermistor Rk measured values are with presetting
Value Ro is equal, and now resistance bridge A, B ends output voltage difference will be 0, and whole voltage-controlled module output end Uout is output as 0;When
When VCXO operating ambient temperatures change, then A, B end of bridge form certain voltage difference, pass through voltage follower A1 and A2
Transmission deliver to A3 carry out differential amplification, it is contemplated that the voltage difference after amplification must effectively can be gathered, so in differential amplification A3
Output end add gain linearity regulation circuit A4;Obtained voltage-controlled module voltage difference Uout is produced with voltage-controlled correcting module
After raw voltage-controlled voltage summation, VCXO modules are delivered to.
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CN110703586A (en) * | 2019-09-09 | 2020-01-17 | 广州市中海达测绘仪器有限公司 | Time synchronization method, data synchronization method, device, system, equipment and medium |
CN110955139A (en) * | 2018-09-27 | 2020-04-03 | 斯沃奇集团研究和开发有限公司 | Timepiece assembly comprising a mechanical oscillator associated with an average frequency control device |
CN113160611A (en) * | 2020-12-25 | 2021-07-23 | 江汉大学 | Safety coefficient of new forms of energy car |
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