CN107293517A - A kind of substrate comprising conductive pattern and preparation method thereof, display device - Google Patents

A kind of substrate comprising conductive pattern and preparation method thereof, display device Download PDF

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Publication number
CN107293517A
CN107293517A CN201710547799.XA CN201710547799A CN107293517A CN 107293517 A CN107293517 A CN 107293517A CN 201710547799 A CN201710547799 A CN 201710547799A CN 107293517 A CN107293517 A CN 107293517A
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CN
China
Prior art keywords
conductive pattern
metallic film
bearing bed
barrier layer
substrate
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CN201710547799.XA
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Chinese (zh)
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CN107293517B (en
Inventor
李海旭
曹占锋
姚琪
汪建国
薛大鹏
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1288Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting

Abstract

The embodiment of the present invention provides a kind of substrate comprising conductive pattern and preparation method thereof, display device, is related to display technology field, and the upper surface of insulating barrier can be made not uneven because of insulating barrier the first conductive pattern of covering.A kind of preparation method of the substrate comprising conductive pattern, including:Form metallic film on bearing bed, and on the metallic film through gluing, expose, be developed to photoetching agent pattern;The side that formation to the bearing bed has the metallic film carries out ion implanting, and barrier layer is formed with the middle part for the part not covered in the metallic film by the photoetching agent pattern;Remove the photoetching agent pattern;The side for having the metallic film to the formation of the bearing bed carries out insulating processing, so that the part do not blocked in metallic film by being partially converted into of blocking of the barrier layer in insulating barrier, the metallic film by the barrier layer is the first conductive pattern.

Description

A kind of substrate comprising conductive pattern and preparation method thereof, display device
Technical field
The present invention relates to display technology field, more particularly to it is a kind of substrate comprising conductive pattern and preparation method thereof, aobvious Showing device.
Background technology
When preparing array base palte, its preparation process generally sequentially forms grid on substrate, gate insulation layer, active Layer and source electrode and drain electrode.
Specifically, forming grid on substrate first, grid line is at the same time formed;It is being formed with the substrate of grid and grid line Upper formation gate insulation layer, because grid and grid line are, with certain thickness figure, therefore, to cause gate insulation layer and grid and grid The surface irregularity of line corresponding position;Active layer is subsequently formed, likewise, active layer surface is uneven;Further, Conductive film is formed on the substrate for be formed with active layer, mode of the conductive film frequently with sputtering is formed, and due to gate insulation There is projection in layer surface, therefore, easily cause the problem of conductive film surface is uneven, i.e. compared to other positions, in climbing Conductive film at position is more loose, and then source electrode, drain electrode, data wire may be caused to break at climbing position, influences array The normal of substrate is used.
The content of the invention
Embodiments of the invention provide a kind of substrate comprising conductive pattern and preparation method thereof, display device, can make The upper surface of insulating barrier is not uneven because of insulating barrier the first conductive pattern of covering.
To reach above-mentioned purpose, embodiments of the invention are adopted the following technical scheme that:
First aspect there is provided a kind of preparation method of the substrate comprising conductive pattern, including:Metal is formed on bearing bed Film, and on the metallic film through gluing, expose, be developed to photoetching agent pattern;Formation to the bearing bed has The side of the metallic film carries out ion implanting, with the part not covered in the metallic film by the photoetching agent pattern Middle part formed barrier layer;Remove the photoetching agent pattern;The side that formation to the bearing bed has the metallic film is entered Row insulating processing, so as to not be partially converted into insulating barrier, the metallic film by what the barrier layer was blocked in metallic film The middle part blocked by the barrier layer is the first conductive pattern.
It is preferred that, the upper surface of the bearing bed is flat surface.
It is preferred that, the side that the formation to the bearing bed has the metallic film carries out ion implanting, with the gold The middle part for the part not covered in category film by the photoetching agent pattern forms barrier layer, including:Formation to the bearing bed The side for having the metallic film carries out germanium ion injection, with what is do not covered in the metallic film by the photoetching agent pattern Partial middle part forms barrier layer.
It is preferred that, the material of the metallic film is aluminium and/or the aluminum titanium alloy being made up of aluminium and titanium, wherein, titanium is in institute It is 0.5%~5% to state the mass ratio in aluminum titanium alloy.
The side that formation to the bearing bed has the metallic film carries out insulating processing, including:To the carrying The side that the formation of layer has the metallic film carries out O +ion implanted, to cause in the metallic film not by the barrier layer What is blocked is partially converted into the main insulating barrier being made up of aluminum oxide.
Second aspect is there is provided a kind of substrate for including conductive pattern, including bearing bed, is set in turn on the bearing bed The first conductive pattern, barrier layer and insulating barrier;The barrier layer is with first conductive pattern on the bearing bed Orthographic projection is overlapped;It is located at the part on the barrier layer in first conductive pattern, the barrier layer and the insulating barrier Thickness and, equal to the thickness of other parts in the insulating barrier;Wherein, the material of first conductive pattern is metal, institute The material for stating insulating barrier is the compound of the metal.
It is preferred that, the upper surface of the bearing bed is flat surface.
It is preferred that, the material of first conductive pattern is aluminium and/or the aluminum titanium alloy being made up of aluminium and titanium, wherein, titanium Mass ratio in the aluminum titanium alloy is 0.5%~5%;The thickness on the barrier layer is
It is preferred that, the substrate comprising conductive pattern also includes the second conductive pattern being arranged on the insulating barrier, Second conductive pattern is across at least part border of first conductive pattern.
It is further preferred that first conductive pattern includes grid and grid line;The insulating barrier is gate insulation layer;It is described Second conductive pattern includes source electrode, drain electrode, data wire.
The third aspect is there is provided a kind of display device, including the substrate for including conductive pattern described in second aspect.
The embodiment of the present invention provides a kind of substrate comprising conductive pattern and preparation method thereof, by being formed on bearing bed Metallic film, and photoetching agent pattern is formed on metallic film, so that the side that the formation to bearing bed has metallic film is carried out During ion implanting, the middle part that the part of second area is only located in metallic film forms barrier layer, then has to the formation of bearing bed The side of metallic film carries out insulating processing, so that be not blocked that layer blocks in metallic film is partially converted into insulating barrier, It is the first conductive pattern that the part that layer blocks is blocked in metallic film, during this, because metallic film is at each position Thickness it is equal, therefore, the insulating barrier converted by metallic film is located at the part of second area, barrier layer and first led The thickness of electrical pattern and, the insulating barrier of consistently equal to metallic film conversion is located at the thickness of the part of first area, compared to existing There is technology, the present invention can make the upper surface of insulating barrier not uneven because of insulating barrier the first conductive pattern of covering.
So, when insulating barrier forms the second conductive pattern away from bearing bed side, if second conductive pattern Across at least part border of the first conductive pattern, then second conductive pattern does not occur because of the figure of the first conductive pattern Climbing phenomenon, and then the second conductive pattern can be avoided to break.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are only this Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is a kind of schematic flow sheet of the base plate preparation method comprising conductive pattern provided in an embodiment of the present invention;
Fig. 2 (a) is a kind of preparation process schematic diagram one of the substrate comprising conductive pattern provided in an embodiment of the present invention;
Fig. 2 (b) is a kind of preparation process schematic diagram two of the substrate comprising conductive pattern provided in an embodiment of the present invention;
Fig. 2 (c) is a kind of preparation process schematic diagram three of the substrate comprising conductive pattern provided in an embodiment of the present invention;
Fig. 2 (d) is a kind of preparation process schematic diagram four of the substrate comprising conductive pattern provided in an embodiment of the present invention;
Fig. 3 is a kind of schematic diagram one of the substrate comprising conductive pattern provided in an embodiment of the present invention;
Fig. 4 is a kind of schematic diagram two of the substrate comprising conductive pattern provided in an embodiment of the present invention.
Reference:
10- bearing beds;11- conductive films;12- photoetching agent patterns;The conductive patterns of 21- first;22- barrier layers;23- insulate Layer;The conductive patterns of 24- second.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made Embodiment, belongs to the scope of protection of the invention.
The embodiment of the present invention provides a kind of preparation method of the substrate comprising conductive pattern, as shown in figure 1, specifically include as Lower step:
Shown in S10, such as Fig. 2 (a), metallic film 11 is formed on bearing bed 10, and through gluing, exposure on metallic film 11 Light, it is developed to photoetching agent pattern 12.
Wherein, the substrate for including conductive pattern, example can be array base palte.
Herein, the lower surface of metallic film 11 is directly contacted with the upper surface of bearing bed 10, and bearing bed 10 can be substrate Substrate, or the cushion that can also be disposed on underlay substrate, are not limited herein.
On this basis, the upper surface of metallic film 11 is parallel with the upper surface of bearing bed 10, and metallic film 11 is being held Thickness in carrier layer 10 at each position is equal.
Wherein, the surface contacted in metallic film 11 with bearing bed 10 is the lower surface of metallic film 11, metallic film 11 Upper surface be the surface relative with the lower surface in metallic film 11;The surface contacted in bearing bed 10 with metallic film 11 For the upper surface of bearing bed 10.
It should be noted that first, the material of metallic film 11 is not defined, as long as being carried out absolutely to metallic film 11 Before edgeization processing, its is electrically conductive;Metallic film 11 is carried out after insulating processing, its compound is insulating materials, and And the compound of gained can pass through light after insulating processing.
Second, the thickness of metallic film 11 is not defined, during actual fabrication, the first conductive pattern to be formed Case, barrier layer and insulating barrier are located at the thickness of the part of second area, to set the thickness of metallic film 11.
Herein, it is first area with the corresponding region of photoetching agent pattern 12, except the firstth area in the substrate comprising conductive pattern Region beyond domain is second area.
3rd, the thickness of photoetching agent pattern 12 is not defined, as long as it is in S20, stop ion note can be played The effect entered, i.e. photoetching agent pattern 12 can protect the part for being located at first area in metallic film 11, not by S20 The influence of ion implantation technology.For example, the thickness range of photoetching agent pattern 12 can be 1.7~2.8 μm.
Shown in S20, such as Fig. 2 (b), have the side progress ion implanting of metallic film 11 to is formationed of bearing bed 10, with The middle part for not being photo-etched the part of the covering of glue pattern 12 in metallic film 11 forms barrier layer 22.
Wherein it is possible to ion implanting is carried out using ion implantation device (ion implanter), to form barrier layer 22, Formed barrier layer 22 ion enter metallic film 11 after, in the gap for being interspersed in metallic film 11, and can by adjust from The energy of sub- injection device and ion implanting time, make the thickness on barrier layer 22 as thin as possible, therefore, barrier layer 22 is not interfered with The gross thickness of second area, i.e. in metallic film 11 positioned at second area part and barrier layer 22 thickness and, equal to metal It is located at the thickness of the part of first area in film 11.
It should be noted that first, the material on barrier layer 22 is not defined, as long as the material can play isolation and make With, and the electric conductivity of the metallic film 11 to being completely cut off is not impacted, the insulating properties not to insulating barrier to be formed causes shadow Sound.
Second, the middle part for not being photo-etched the part of the covering of glue pattern 12 in metallic film 11 forms barrier layer 22, refers to:It is first First, barrier layer 22 is formed at the part for being located at second area in metallic film 11, on this basis, and barrier layer 22 is located at metal foil The middle part of film 11, i.e. relative to the lower surface of metallic film 11, barrier layer 22 can be located in metallic film 11 close to upper surface Side and not with the upper surface;Or, relative to the upper surface of metallic film 11, barrier layer 22 can also be located at In metallic film 11 close to lower surface side and do not contacted with the lower surface;Or, position where barrier layer 22 is to golden The distance for belonging to the upper and lower surface of film 11 is equal.
Certainly, in the present invention, the thickness of the first conductive pattern to be formed and insulation to be formed should be considered simultaneously Layer is located at the thickness of the part of second area, to determine depth of the barrier layer 22 in metallic film 11.
Herein, depth of the barrier layer 22 in metallic film 11 refers to:The upper surface of metallic film 11 to barrier layer 22 Distance.
Shown in S30, such as Fig. 2 (c), photoetching agent pattern 12 is removed.
Herein, photoetching agent pattern 12 can be removed using stripping technology.
Shown in S40, such as Fig. 2 (d), the side that the formation to bearing bed 10 has metallic film 11 carries out insulating processing, with Make not to be blocked that layer 22 blocks is partially converted into and is blocked layer 22 in insulating barrier 23, metallic film 11 and blocks in metallic film 11 Part be the first conductive pattern 21.
It should be noted that the mode to insulating processing is not defined, as long as after being handled by insulating, metal foil Be not blocked that layer 22 blocks in film 11 is partially converted into insulating barrier 23, and does not influence to be blocked layer 22 in metallic film 11 to block Part electric conductivity.
The embodiment of the present invention provides a kind of preparation method of the substrate comprising conductive pattern, by being formed on bearing bed 10 Metallic film 11, and photoetching agent pattern 12 is formed on metallic film 11, so that the formation to bearing bed 10 has metallic film 11 Side when carrying out ion implanting, the middle part that the part of second area is only located in metallic film 11 forms barrier layer 22, then right The side that the formation of bearing bed 10 has metallic film 11 carries out insulating processing, is hidden so as to not be blocked layer 22 in metallic film 11 Being partially converted into of gear is blocked the part that layer 22 blocks in insulating barrier 23, metallic film 11 be the first conductive pattern 21, this mistake Cheng Zhong, because thickness of the metallic film 11 at each position is equal, therefore, the insulating barrier 23 converted by metallic film 11 In the part of second area, the thickness of the conductive pattern 21 of barrier layer 22 and first and, consistently equal to metallic film 11 convert Insulating barrier 23 is located at the thickness of the part of first area, and compared to prior art, the present invention can make the upper surface of insulating barrier 23 It is not uneven because of the first conductive pattern 21 of covering of insulating barrier 23.
So, when insulating barrier 23 forms the second conductive pattern away from the side of bearing bed 10, if described second is conductive Pattern is across at least part border of the first conductive pattern 21, then second conductive pattern is not because of the figure of the first conductive pattern 21 Shape and there is climbing phenomenon, and then can avoid the second conductive pattern break.
Wherein, the surface directly contacted with the conductive pattern 21 of bearing bed 10 and first in insulating barrier 23 is under insulating barrier 23 Surface, the upper surface of insulating barrier 23 is surface relative with the lower surface in insulating barrier 23;First conductive pattern 21 is at least Segment boundary, including:One or more borders of first conductive pattern 21, or one or more borders a part.
It is preferred that, the upper surface of bearing bed 10 is flat surface.
In the embodiment of the present invention, due to being flat surface by making the upper surface of bearing bed 10, therefore, carrying is formed at The upper surface of metallic film 11 on layer 10 is also flat surface, and then so that the upper surface for the insulating barrier 23 being subsequently formed is Flat surface.
It is preferred that, the side that the formation to bearing bed 10 has metallic film 11 carries out ion implanting, with metallic film 11 In be not photo-etched glue pattern 12 covering part middle part formed barrier layer 22, including:There is metal foil to the formation of bearing bed 10 The side of film 11 carries out germanium (Ge) ion implanting, with the middle part for the part for not being photo-etched the covering of glue pattern 12 in metallic film 11 Form barrier layer 22.
In the embodiment of the present invention, because the atomic radius of germanium is larger, barrier layer 22 is often used as in semicon industry Use, and germanium has heavier relative atomic mass (72.6), in ion implantation process, is easily controlled the barrier layer of its formation 22 thickness, also, germanium ion on the electric conductivity of conductive film 11 and the insulating properties for the insulating barrier 23 being subsequently formed without influence.
It is preferred that, the material of metallic film 11 is aluminium and/or the aluminum titanium alloy being made up of aluminium and titanium, wherein, titanium is described Mass ratio in aluminum titanium alloy is 0.5%~5%;The side that formation to bearing bed 10 has metallic film 11 is carried out at insulating Reason, including:The side that formation to bearing bed 10 has metallic film 11 carries out O +ion implanted, to cause in metallic film 11 not Be blocked that layer 22 blocks is partially converted into the main insulating barrier 23 being made up of aluminum oxide.
Wherein, when the material of metallic film 11 is aluminium and the aluminum titanium alloy, aluminium can be leaned on positioned at the aluminum titanium alloy The side of nearly bearing bed 10, can also be located at side of the aluminum titanium alloy away from bearing bed 10, also, due to aluminium and the aluminium Titanium alloy can be converted into insulating barrier 23 as conductive material before carrying out insulating processing after carrying out insulating processing, Therefore, the thickness difference of aluminium and the aluminum titanium alloy is not defined.
Herein, can using ion implantation device carry out O +ion implanted, oxonium ion enter metallic film 11 after, rapidly with Aluminium and/or the aluminum titanium alloy chemically react, generation aluminum oxide (Al2O3) or aluminum oxide and titanium oxide (TiO2) it is mixed Compound, wherein, the oxide of aluminium and/or the aluminum titanium alloy is insulating materials and can pass through light, therefore, it can use Make insulating barrier 23.
In the embodiment of the present invention, aluminium and titanium are common metal materials, and easily aluminium and the aluminum titanium alloy are carried out Insulating processing, in the case where metallic film 11 is aluminium and/or the aluminum titanium alloy, can make it occur chemistry with oxonium ion Reaction, not to be blocked in metallic film 11, layer 22 blocks is partially converted into the main insulating barrier being made up of aluminum oxide 23, technique is more ripe.
It is preferred that, formed photoetching agent pattern 12 after, the side that the formation to bearing bed 10 has metallic film 11 carry out from Before son injection, methods described also includes:Curing process is carried out to photoetching agent pattern 12, photoetching agent pattern 12 is can further improve Hardness, it is to avoid it comes off in ion implantation process, and then results in the ion on barrier layer 22 and enter conductive film 11 In be located at first area part.
Wherein, solidification temperature can be in the range of 200~300 DEG C, and hardening time can be 15~45 minutes.
It is preferred that, the side that the formation to bearing bed 10 has metallic film 11 is carried out after insulating processing, methods described Also include:The bearing bed 10 for being formed with insulating barrier 23 is made annealing treatment, the metallic compound for making insulating barrier 23 can be used It is uniform and fine and close.
Wherein, the temperature of annealing can be in the range of 100~150 DEG C, and the time at annealing can be 30~45 points Clock.
The embodiment of the present invention provides a kind of substrate for include conductive pattern, and such as Fig. 2 (d) is shown, including bearing bed 10, successively It is arranged at the first conductive pattern 21, barrier layer 22 and insulating barrier 23 on bearing bed 10;The conductive pattern of barrier layer 22 and first 21 orthographic projection on bearing bed 10 is overlapped;It is located at barrier layer 22 in first conductive pattern 21, barrier layer 22 and insulating barrier 23 On part thickness and, equal to the thickness of other parts in insulating barrier 23;Wherein, the material of the first conductive pattern 21 is gold Category, the material of insulating barrier 23 is the compound of metal.
Wherein, the substrate for including conductive pattern, example can be array base palte.
It should be noted that first, not to being located at second in the first conductive pattern 21, barrier layer 22 and insulating barrier 23 The thickness of the part in region and it is defined, is defined by practical application.
Second, the material on barrier layer 22 is not defined, if the material can play insulating effect, and not to first The electric conductivity of conductive pattern 21 is impacted, and the insulating properties to insulating barrier 23 is not impacted.
The embodiment of the present invention provides a kind of substrate for including conductive pattern, including bearing bed 10, is set in turn in bearing bed The first conductive pattern 21, barrier layer 22 and insulating barrier 23 on 10, wherein, barrier layer 22 is being held with the first conductive pattern 21 Orthographic projection in carrier layer 10 is overlapped, due to being located at second area in the first conductive pattern 21, barrier layer 22 and insulating barrier 23 Partial thickness and, equal to the thickness for the part that insulating barrier 23 is located at first area, compared to prior art, the present invention can make The upper surface of insulating barrier 23 is not uneven because of the first conductive pattern 21 of covering of insulating barrier 23.
Wherein, the surface directly contacted with the conductive pattern 21 of bearing bed 10 and first in insulating barrier 23 is under insulating barrier 23 Surface, the upper surface of insulating barrier 23 is surface relative with the lower surface in insulating barrier 23.
It is preferred that, the upper surface of bearing bed 10 is flat surface.
In the embodiment of the present invention, due to being flat surface by making the upper surface of bearing bed 10, therefore, carrying is formed at The upper surface of metallic film 11 on layer 10 is also flat surface, and then so that the upper surface for the insulating barrier 23 being subsequently formed is Flat surface.
It is preferred that, the material of the first conductive pattern 21 is aluminium and/or the aluminum titanium alloy being made up of aluminium and titanium, wherein, titanium exists Mass ratio in the aluminum titanium alloy is 0.5%~5%.
So, the material of insulating barrier 23 can be aluminium or the oxide of aluminium and the aluminum titanium alloy.
Herein, when the material of metallic film 11 is aluminium and the aluminum titanium alloy, aluminium can be leaned on positioned at the aluminum titanium alloy The side of nearly bearing bed 10, can also be located at side of the aluminum titanium alloy away from bearing bed 10, also, due to aluminium and the aluminium Titanium alloy can as conductive material, the oxide of aluminium and the aluminum titanium alloy can as insulating barrier 23, therefore, not to aluminium and The thickness difference of the aluminum titanium alloy is defined.
In the embodiment of the present invention, aluminium and titanium are common metal materials, and its oxide is the insulating materials of printing opacity, and easily Obtain.
It is preferred that, the thickness on barrier layer 22 is
Wherein it is possible to carry out ion implanting using ion implantation device, to form barrier layer 22, the thickness on barrier layer 22 can To be determined by the energy and ion implanting time that adjust ion implantation device.
In the embodiment of the present invention, the thickness range for making barrier layer 22 isWhen described comprising conductive pattern When substrate is applied to display panel as array base palte, the slimming of display panel is conducive to design.
It is preferred that, as shown in Figure 3 and Figure 4, the substrate comprising conductive pattern also includes being arranged on insulating barrier 23 Second conductive pattern 24, the second conductive pattern 24 is across at least part border of the first conductive pattern 21.
Herein, at least part border of the first conductive pattern 21, including:One or more sides of first conductive pattern 21 Boundary, or one or more borders a part.
Example, as shown in figure 3, the first conductive pattern 21 is grid and grid line (being not drawn into figure), insulating barrier 23 is grid Insulating barrier, the second conductive pattern 24 be source electrode, drain electrode and data wire (being not drawn into figure), wherein, source electrode and drain electrode respectively across Cross at least part border of grid, data wire is across at least part border of grid line.
Herein, grid and grid line, barrier layer 22 and gate insulation layer are located at the thickness of the part of second area and can beThe thickness on barrier layer 22 can beThe depth on barrier layer 22 is
When the substrate for including conductive pattern is array base palte, because the upper surface of gate insulation layer is not because gate insulation layer covers Lid grid and grid line and it is uneven so that the source electrode being subsequently formed, drain electrode, data wire not because grid line and grid figure occur Climbing phenomenon, and then source electrode, drain electrode, broken data wire can be avoided.
As shown in figure 4, the first conductive pattern 21 is source electrode, drain electrode and data wire (being not drawn into figure), the second conductive pattern Case 24 can be public electrode, wherein, public electrode across source electrode, drain electrode, data wire at least part border.
When the substrate for including conductive pattern is array base palte, due to covering source electrode, drain electrode, the insulation of data wire part Layer 23, not because covering source electrode, drain electrode, data wire and it is uneven so that the public electrode being subsequently formed not because source electrode, drain electrode, There is climbing phenomenon in the figure of data wire, and then public electrode can be avoided to break.
Certainly, other techniques can also be applied to by including the substrate of conductive pattern, to avoid the second conductive pattern 24 from existing Part on first conductive pattern 21 is climbed, and then avoids the second conductive pattern 24 from breaking.
The embodiment of the present invention provides a kind of display device, including the base for including conductive pattern described in foregoing any embodiment Plate.
Wherein, display device can be liquid crystal display or OLED (Organic Light-Emitting Diode, abbreviation Organic Light Emitting Diode) display.Such as display device can be liquid crystal display, LCD TV, number Any product or part with display function such as camera, mobile phone or tablet personal computer.
The embodiment of the present invention provides a kind of display device, with the foregoing substrate identical technology effect comprising conductive pattern Really, it will not be repeated here.
The foregoing is only a specific embodiment of the invention, but protection scope of the present invention is not limited thereto, any Those familiar with the art the invention discloses technical scope in, change or replacement can be readily occurred in, should all be contained Cover within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.

Claims (10)

1. a kind of preparation method of the substrate comprising conductive pattern, it is characterised in that including:
Form metallic film on bearing bed, and on the metallic film through gluing, expose, be developed to photoresist figure Case;
The side for having the metallic film to the formation of the bearing bed carries out ion implanting, with the metallic film not by The middle part of the part of the photoetching agent pattern covering forms barrier layer;
Remove the photoetching agent pattern;
The side that formation to the bearing bed has the metallic film carries out insulating processing, so that not by institute in metallic film It is the first conduction to state the part blocked in insulating barrier, the metallic film by the barrier layer that is partially converted into blocked on barrier layer Pattern.
2. preparation method according to claim 1, it is characterised in that the upper surface of the bearing bed is flat surface.
3. preparation method according to claim 1 or 2, it is characterised in that have the metal to the formation of the bearing bed The side of film carries out ion implanting, with the middle part shape for the part not covered in the metallic film by the photoetching agent pattern Into barrier layer, including:
The side for having the metallic film to the formation of the bearing bed carries out germanium ion injection, with the metallic film not The middle part of the part covered by the photoetching agent pattern forms barrier layer.
4. preparation method according to claim 1 or 2, it is characterised in that the material of the metallic film be aluminium and/or by The aluminum titanium alloy that aluminium and titanium are constituted, wherein, mass ratio of the titanium in the aluminum titanium alloy is 0.5%~5%;
The side that formation to the bearing bed has the metallic film carries out insulating processing, including:
The side that formation to the bearing bed has the metallic film carries out O +ion implanted, to cause in the metallic film The main insulating barrier being made up of aluminum oxide is not partially converted into by what the barrier layer was blocked.
5. a kind of substrate for including conductive pattern, it is characterised in that including bearing bed, be set in turn on the bearing bed One conductive pattern, barrier layer and insulating barrier;The barrier layer and positive throwing of first conductive pattern on the bearing bed Shadow is overlapped;It is located at the thickness of the part on the barrier layer in first conductive pattern, the barrier layer and the insulating barrier Degree and, equal to the thickness of other parts in the insulating barrier;
Wherein, the material of first conductive pattern is metal, and the material of the insulating barrier is the compound of the metal.
6. substrate according to claim 5, it is characterised in that the upper surface of the bearing bed is flat surface.
7. the substrate for including conductive pattern according to claim 5 or 6, it is characterised in that first conductive pattern Material is aluminium and/or the aluminum titanium alloy that is made up of aluminium and titanium, wherein, mass ratio of the titanium in the aluminum titanium alloy be 0.5%~ 5%;
The thickness on the barrier layer is
8. the substrate for including conductive pattern according to claim 5 or 6, it is characterised in that described comprising conductive pattern Substrate also includes being arranged at the second conductive pattern on the insulating barrier, and second conductive pattern is across first conductive pattern At least part border of case.
9. the substrate according to claim 8 for including conductive pattern, it is characterised in that first conductive pattern includes grid Pole and grid line;The insulating barrier is gate insulation layer;Second conductive pattern includes source electrode, drain electrode, data wire.
10. a kind of display device, it is characterised in that including the substrate for including conductive pattern described in claim any one of 5-9.
CN201710547799.XA 2017-07-06 2017-07-06 Substrate comprising conductive pattern, preparation method of substrate and display device Active CN107293517B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112002754A (en) * 2020-08-11 2020-11-27 深圳市华星光电半导体显示技术有限公司 Array substrate, preparation method thereof and display panel

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0669233A (en) * 1991-12-03 1994-03-11 Samsung Electron Co Ltd Manufacture of semiconductor device
CN1431717A (en) * 2003-02-14 2003-07-23 中国科学院上海微系统与信息技术研究所 Structure for lowering series resistor between source and drain in silicon transistors on insulator as well as implement method
CN1728403A (en) * 2005-07-07 2006-02-01 友达光电股份有限公司 Switching element of pixel electrode, and manufacturing method
CN1971885A (en) * 2005-11-23 2007-05-30 株式会社半导体能源研究所 Semiconductor element and method for manufacturing the same
CN101533858A (en) * 2009-04-03 2009-09-16 北京大学深圳研究生院 Film transistor, manufacturing method thereof and image display device
CN105161523A (en) * 2015-08-13 2015-12-16 京东方科技集团股份有限公司 Electrode, thin film transistor (TFT), array substrate and display device
CN105633171A (en) * 2016-03-22 2016-06-01 京东方科技集团股份有限公司 Thin film transistor and manufacturing method therefor, and display apparatus

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0669233A (en) * 1991-12-03 1994-03-11 Samsung Electron Co Ltd Manufacture of semiconductor device
CN1431717A (en) * 2003-02-14 2003-07-23 中国科学院上海微系统与信息技术研究所 Structure for lowering series resistor between source and drain in silicon transistors on insulator as well as implement method
CN1728403A (en) * 2005-07-07 2006-02-01 友达光电股份有限公司 Switching element of pixel electrode, and manufacturing method
CN1971885A (en) * 2005-11-23 2007-05-30 株式会社半导体能源研究所 Semiconductor element and method for manufacturing the same
CN101533858A (en) * 2009-04-03 2009-09-16 北京大学深圳研究生院 Film transistor, manufacturing method thereof and image display device
CN105161523A (en) * 2015-08-13 2015-12-16 京东方科技集团股份有限公司 Electrode, thin film transistor (TFT), array substrate and display device
CN105633171A (en) * 2016-03-22 2016-06-01 京东方科技集团股份有限公司 Thin film transistor and manufacturing method therefor, and display apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112002754A (en) * 2020-08-11 2020-11-27 深圳市华星光电半导体显示技术有限公司 Array substrate, preparation method thereof and display panel

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