CN107275346A - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN107275346A CN107275346A CN201710520805.2A CN201710520805A CN107275346A CN 107275346 A CN107275346 A CN 107275346A CN 201710520805 A CN201710520805 A CN 201710520805A CN 107275346 A CN107275346 A CN 107275346A
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- display panel
- semiconductor layer
- layer
- pressure sensitivity
- pressure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
Abstract
This application discloses display panel and display device.Display panel includes substrate, the first semiconductor layer and the second semiconductor layer being formed on substrate, and the first semiconductor layer is located between substrate and the second semiconductor layer；Display panel is provided with thin film transistor (TFT) and pressure sensitive unit；Thin film transistor (TFT) includes active layer, and active layer is located at the second semiconductor layer；Pressure sensitive unit includes pressure sensitivity resistance, and pressure sensitivity resistance is located at the first semiconductor layer.The first semiconductor layer that the display panel and display device can utilize the laser for protecting substrate and thin film transistor active layer not to be produced in technique to burn realizes the design of pressure sensitive function; and the pressure sensitive unit can be arranged at viewing area; the design flexibility of pressure sensitive unit is improved, is conducive to the accuracy of adherence pressure touch control detection.
Description
Technical field
The application is related to display technology field, and in particular to display panel and display device.
Background technology
With the development of Display Technique, the application of the display device with pressure sensitive function is more and more extensive.In display
The availability of pressure sensitive function and the degree of accuracy are an important indexs in device.
The design of pressure sensitive function is main in existing display screen uses condenser type or the pressure sensor of resistance-type.
In the design of resistive pressure sensor, in order to avoid the light transmission rate to viewing area is impacted, generally multiple pressure are passed
Sensor is arranged at frame region, and the voltage change that diffusion effect is brought caused by stress when being pressurized is exported using pressure sensor.
In the design of above-mentioned pressure sensitive function, because pressure is normally acting at viewing area, positioned at the pressure of frame region
Force snesor is difficult to the pressure size of the position of accurate sensing pressing.Also, for flexible display apparatus, stress is not concentrated in
Frame region, and the regional of whole display device is dispersed in, the pressure sensor in frame region can not sense pressing
Operation, therefore the design of existing pressure sensor is not suitable for flexible display apparatus.
The content of the invention
In order to solve at least one technical problem of above-mentioned background section, the embodiment of the present application provides display panel
And display device.
On the one hand, the embodiment of the present application provides a kind of display panel, including substrate, the first half leading of being formed on substrate
Body layer and the second semiconductor layer, the first semiconductor layer are located between substrate and the second semiconductor layer；Display panel is provided with film
Transistor and pressure sensitive unit；Thin film transistor (TFT) includes active layer, and active layer is located at the second semiconductor layer；Pressure sensitive unit
Including pressure sensitivity resistance, pressure sensitivity resistance is located at the first semiconductor layer.
Second aspect, the embodiment of the present application provides a kind of display device, including above-mentioned display panel.
Display panel and display device that the application is provided, by the way that pressure sensitive unit is arranged at positioned at thin film transistor (TFT)
Active layer where the second semiconductor layer and substrate between the first semiconductor layer, it is possible to use for protecting substrate and film
The first semiconductor layer that the laser that transistor active layer is not produced in technique is burnt realizes the design of pressure sensitive function, the pressure
Power sensing unit can be arranged at viewing area, improve the design flexibility of pressure sensitive unit, be conducive to adherence pressure touch-control
The accuracy of detection, and realize the pressure sensitive function of flexible display apparatus.
Brief description of the drawings
Non-limiting example is described in detail with reference to what the following drawings was made by reading, other features,
Objects and advantages will become more apparent upon：
Fig. 1 is a structural representation of the display panel according to the embodiment of the present application；
One cross-sectional view of display panel shown in Fig. 2 Fig. 1；
Fig. 3 is the structural representation of an equivalent circuit of the pressure sensitivity unit in display panel shown in Fig. 1；
Fig. 4 is another cross-sectional view of display panel shown in Fig. 1；
Fig. 5 is another cross-sectional view of display panel shown in Fig. 1；
Fig. 6 is another cross-sectional view of display panel shown in Fig. 1；
Fig. 7 is the schematic flow sheet of the preparation method of display panel shown in Fig. 1；
Fig. 8 is a schematic diagram of the display device of the embodiment of the present application.
Embodiment
The application is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining related invention, rather than the restriction to the invention.It also should be noted that, in order to
Be easy to description, illustrate only in accompanying drawing to about the related part of invention.
It should be noted that in the case where not conflicting, the feature in embodiment and embodiment in the application can phase
Mutually combination.Describe the application in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
Fig. 1 is refer to, it illustrates the display panel according to the embodiment of the present application a structural representation.Such as Fig. 1 institutes
Show, display panel 100 is provided with thin film transistor (TFT) 101 and pressure sensitive unit 102.Wherein, thin film transistor (TFT) 101 can conduct
Switching device or driving element, may be disposed in viewing area and/or the non-display area of display panel 100.When display panel 100 is
During liquid crystal display panel, thin film transistor (TFT) 101 can be first for providing the switch of display drive signals to pixel in viewing area
Part, or be the switch element in the drive circuit in non-display area；When display panel 100 is organic electroluminescence display panel,
Thin film transistor (TFT) 101 can be the switch element in image element circuit in viewing area or driving transistor, or in non-display area
Drive circuit in switch element.
Pressure sensitive unit 102 can be resistive pressure sensor, including pressure sensitivity resistance, the resistance of pressure sensitivity resistance by
Changed during pressure, depressed position and pressure size can be detected by the change of detection resistance value.
In some optional implementations of the present embodiment, as shown in figure 1, pressure sensitive unit 102 can be in display
Arranged on panel in matrix, the length and width of each pressure sensitive unit 102 is no more than 5mm, i.e., each pressure sensitive unit
In the line direction of the matrix formed and the length of column direction no more than 5mm.So, can be equal by pressure sensitive unit 102
It is distributed evenly on a display panel, is conducive to the precision of adherence pressure touch control detection.
Fig. 2 is refer to, it illustrates display panel shown in Fig. 1 a cross-sectional view.
As shown in Fig. 2 display panel 200 (display panel 100 i.e. shown in Fig. 1) includes substrate 20, is formed on substrate
The first semiconductor layer 21 and the second semiconductor layer 22.Wherein, the first semiconductor layer 21 is located at the semiconductor layer of substrate 20 and second
Between 22, it is spaced between the first semiconductor layer 21 and the second semiconductor layer 22 by dielectric 23.Thin film transistor (TFT) 101 can
So that including the active layer for forming conducting channel, the active layer is located at the second semiconductor layer 22.Pressure sensitive unit 102 includes
Pressure sensitivity resistance, the pressure sensitivity resistance is located at the first semiconductor layer 21.
In the present embodiment, the first semiconductor layer 21 can be in manufacture craft to the second semiconductor layer 22 and lining
The film layer that bottom 20 is protected.Specifically, thin film transistor (TFT) can be low temperature polycrystalline silicon (Low Temperature Poly-
Silicon) thin film transistor (TFT), its active layer is polysilicon (Poly-silicon) material, in the active layer of thin film transistor (TFT)
In manufacture craft, one layer of non-crystalline silicon (amorphous silicon, α-Si) material can be deposited first, afterwards using quasi- laser
Molecule annealing (Excimer Laser Annealing, ELA) technology, utilizes the laser (laser A as shown in Figure 2) of certain wavelength
The silicon wafer of this layer of non-crystalline silicon is set to be converted into polysilicon, the active layer pattern that polysilicon graphics then are turned into thin film transistor (TFT) again has
Active layer.In ELA techniques, if the second semiconductor layer 22 has the region that gap or amorphous silicon material are lacked, laser can be worn
Saturating second semiconductor layer 22.Shine directly into substrate 20 after passing through the second semiconductor layer 22 in order to avoid laser and damaged substrate
Wound, can generally absorb the laser energy that the second semiconductor layer 22 is passed through in ELA techniques using the first semiconductor layer 21.
In some optional implementations of the present embodiment, display panel is flexible display panels, then substrate 20 can be with
For flexible substrate.Then in the making of flexible display panels, it is necessary to using rigid substrates 201 to flexible substrate provide support, it
The device and film layer of display panel are made on flexible substrates afterwards, after the completion for the treatment of that flexible display panels are encapsulated, it is possible to use laser
Peel off (Laser Lift Off, LLO) technique, irradiate rigid substrates 201 and flexible liner using laser (laser B as shown in Figure 2)
Release layer between bottom 20, so that rigid substrates 201 be peeled off from flexible substrate 20.In LLO techniques, the first semiconductor layer
21 can be used for the active layer that prevents laser from directly exposing to thin film transistor (TFT), be damaged thin film transistor (TFT).
In the present embodiment, made and pressed using the first semiconductor layer of the active layer for protective film transistor and substrate
Sensing resistor, pressure sensitivity resistance can be arranged in viewing area and non-display area in, so as to improve the design of pressure sensitive unit
Flexibility, is conducive to the accuracy of adherence pressure touch control detection.Also, the pressure sensitive unit in the display panel of the present embodiment
The flexible display apparatus of frame region is not centered on suitable for stress, the pressure sensitive function of realizing flexible display apparatus is set
Meter.
In some optional implementations of the present embodiment, above-mentioned second semiconductor layer 22 is the polysilicon layer of doping,
The ion of doping can provide carrier for the active layer of thin film transistor (TFT), and the ion of doping can be arsenic, phosphorus or boron etc..
In some optional implementations of the present embodiment, above-mentioned first semiconductor layer 21 can be the non-crystalline silicon of doping
Layer or the polysilicon layer of doping.When amorphous silicon layer of first semiconductor layer 21 for doping, above-mentioned pressure sensitivity resistance is non-by what is adulterated
Crystal silicon is formed, and with deposited amorphous silicon materials and can be doped when making, afterwards patterned pressure sensitivity resistance.Lead when the first half
When body layer 21 is the polysilicon layer of doping, above-mentioned pressure sensitivity resistance is formed by the polysilicon adulterated, can be with deposited amorphous when making
Silicon materials are simultaneously doped, and the amorphous crystallization of silicon in the amorphous silicon material of doping then is formed into many of doping using ELA techniques
Crystal silicon layer, afterwards patterned pressure sensitivity resistance.Due to making the non-crystalline silicon of the first semiconductor layer be converted into polycrystalline using ELA techniques
During silicon, the first semiconductor layer 21 is flood structure, in the absence of gap, so the laser that ELA techniques are used will not penetrate first
Semiconductor layer 21 and to substrate 20 cause damage.
In a further embodiment, the thickness of above-mentioned first semiconductor layer 21 is d, such as 40nm≤d≤60nm, d=
45nm.The thickness of above-mentioned second semiconductor layer 22 can be identical with the thickness of the first semiconductor layer.The thickness of first semiconductor layer 21
It is unfavorable for crystallization of the ELA techniques to non-crystalline silicon, the film forming when thickness d of the first semiconductor layer 21 is less than 40nm when spending d more than 60nm
Uniformity can be affected.By designing the thickness d of the first semiconductor layer 21 between 40nm to 60nm, it is ensured that film forming is equal
Even property is good, and can ensure that ELA techniques can be effectively by all amorphous silicon particles crystallization.
In some embodiments of the present application, above-mentioned pressure sensitive unit can include pressure sensitivity resistance and connect with pressure sensitivity resistance
The first input end that connects, the second input, the first test side, the second test side.It is defeated that the pressure sensitivity resistance can be used for reception first
Enter the voltage input signal that end and the second input are inputted, and believe to the first test side and the second test side output voltage detection
Number, the pressure size sensed can be calculated according to voltage detection signal afterwards.Specifically, pressure sensitivity resistance, which is connected to, includes
In above-mentioned first input end, the second input, the first test side, the circuit of the second test side, first input end and the second input
End can provide supply voltage to pressure sensitivity resistance, and pressure sensitivity resistance resistance value when being pressurized changes so that connected
The voltage difference of the signal of first test side and the output of the second test side is different from the voltage difference of the signal of the output when not being pressurized.
Further, above-mentioned pressure sensitive unit can be the MEMS (Microelectro of semiconductor material
Mechanical Systems, MEMS) sensor, for example, silicon substrate MEMS sensor.MEMS sensor includes two inputs
With two output ends and pressure sensitivity resistance, two inputs apply input voltage when MEMS sensor works, and two output end voltages are poor
For output signal, the resistance of pressure sensitivity resistance is changed because of MEMS sensor by plane shear stress, and variable quantity with it is flat
The size and Orientation of face shear stress is related, therefore it is tactile to carry out pressure as pressure sensitive unit using MEMS sensor
Control detection.
It refer to Fig. 3, Fig. 3 is the structural representation of an equivalent circuit of the pressure sensitivity unit in display panel shown in Fig. 1.
As shown in figure 3, pressure sensitive unit 300 (pressure sensitive unit shown in Fig. 1 102) includes first input end IN1, the
Two input IN2, the first test side Fout1, the second test side Fout2 and four pressure sensitivity resistance；Here four pressure sensitivity electricity
Resistance is respectively the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2, the 3rd pressure sensitivity resistance R3 and the 4th pressure sensitivity resistance R4.
First pressure sensitivity resistance R1 first end, the 4th pressure sensitivity resistance R4 first end is electrically connected with first input end IN1, the
Two pressure sensitivity resistance R2 the second end and the 3rd pressure sensitivity resistance R3 the second end are electrically connected with the second input IN2, the first pressure sensitivity electricity
The second end and the second pressure sensitivity resistance R2 first end for hindering R1 are connected with the first test side Fout1, and the of the 3rd pressure sensitivity resistance R3
One end and the 4th pressure sensitivity resistance R4 the second end are electrically connected with the second test side Fout2.
In the present embodiment, the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2, the 3rd pressure sensitivity resistance R3 and the 4th pressure sensitivity
Resistance R4 is both formed in above-mentioned first semiconductor layer, and the resistance of four pressure sensitivity resistance changes when being pressurized.Wherein first
Pressure sensitivity resistance R1 and the 3rd pressure sensitivity resistance R3 is stretched simultaneously, the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 shrink simultaneously；Or
Person the first pressure sensitivity resistance R1 and the 3rd sensing resistor R3 is shunk simultaneously, the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 are drawn simultaneously
Stretch.That is, in induction pressure touch-control, the first pressure sensitivity resistance R1 and the 3rd pressure sensitivity resistance R3 change in resistance direction and the
Two pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 change in resistance are in opposite direction.The pressure sensitivity resistance of the embodiment of the present application can pass through
Carve on the first semiconductor layer slit into, and carve the width of seam can be smaller, to ensure that the first semiconductor layer is led to the second half
The protective effect of body layer and substrate will not be influenceed by excessive.
In a further embodiment, as shown in figure 1, display panel 100 can also include integrated drive electronics 104, collection
Include pressure sensitivity into drive circuit 104 and detect circuit 105, pressure sensitivity detection circuit 105 can be subtraction circuit.
The first input end IN1 of above-mentioned pressure sensitive unit 300 (or shown in Fig. 1 103), the second input IN2, the first inspection
Surveying end Fout1, the second test side Fout2 can electrically connect with pressure sensitivity detection circuit 105.When pressure touch is detected, pressure sensitivity inspection
Slowdown monitoring circuit 105 is used to provide the first level signal to first input end IN1, and second electrical level signal is provided to the second input IN2,
Detect the first test side Fout1 first detection signal and the second test side Fout2 the second detection signal；And according to the first electricity
Ordinary mail number, second electrical level signal, first detection signal and the second detection signal of change pressure value.
The operation principle that pressure sensitivity detection circuit carries out pressure touch detection is further described below in conjunction with Fig. 3.Herein, lead to
Cross first input end IN1 and the second input IN2 inputs the first level signal and second electrical level signal respectively, utilize the first detection
Hold Fout1 and the second test side Fout2 output first detection signals and the second detection signal.
Assuming that the voltage difference of the first level signal and second electrical level signal of first input end IN1 and the input of the second input
For Uin, the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2, the 3rd pressure sensitivity resistance R3, the 4th pressure sensitivity resistance R4 resistance are respectively
r1、r2、r3And r4, in the magnitude of voltage U of the first test side Fout1 first detection signals detected1Can be using following formula (1) meter
Calculate：
In the magnitude of voltage U of the second test side Fout2 the second detection signals detected2It can be calculated using following formula (2)：
The first test side Fout1 first detection signals detected and the second test side Fout2 can be detected
Two detection signals carry out subtraction, obtain the voltage difference delta U of the first test side Fout1 and the second test side Fout2 signal
For：
In order to simplify pressure touch detection calculating process, can set the first pressure sensitivity resistance R1, the second pressure sensitivity resistance R2,
3rd pressure sensitivity resistance R3, resistance values of the 4th pressure sensitivity resistance R4 when not being pressurized are equal, for example, be r, and the first pressure sensitivity resistance
R1 and the 3rd pressure sensitivity resistance the R3 coefficient of strain are equal, i.e. its variable quantity phase by resistance during identical pressure size
Deng the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance the R4 coefficient of strain are equal, i.e., it is by resistance during identical pressure size
The variable quantity of resistance is equal.First pressure sensitivity resistance R1 and the second pressure sensitivity resistance R2 coefficient of strain symbol are on the contrary, i.e. the first pressure sensitivity
Resistance R1 and the second pressure sensitivity resistance R2 resistance value when by same pressure are changed in the opposite direction.
When carrying out pressure detecting, the first pressure sensitivity resistance R1 and the 3rd pressure sensitivity resistance R3 resistance change are Δ after compression
R, the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 resistance change are-Δ r, at this moment the first test side Fout1 and second
Pressure differential deltap U between the Fout2 of test side1Can be：
Wherein, U '1And U '2The signal that the first test side Fout1 and the second test side Fout2 are detected after being respectively pressurized
Magnitude of voltage.
, can be according to first input end IN1 the first level signals inputted and the second input IN2 using above-mentioned formula (4)
The voltage difference U of the second electrical level signal of inputinAnd the first detection signals that detect of the first output end Fout1 and the after being pressurized
Pressure differential deltap U ' between the second detection signal that two output end Fout2 are detected calculates the first pressure sensitivity resistance R1 and the 3rd pressure
The variation delta r of sensing resistor R3 resistance, and the second pressure sensitivity resistance R2 and the 4th pressure sensitivity resistance R4 resistance variable quantity-Δ
R, is further calculated according to the variation delta r and the coefficient of strain of the first pressure sensitivity resistance R1 and the 3rd pressure sensitivity resistance R3 resistances
Draw the size for the pressure that the pressure sensitive unit is sensed.
, can be according to each pressure sensitive list after detection method as described above is performed using multiple pressure sensitive units
The pressure size that member is sensed determines position and the pressure value of pressure touch, it is achieved thereby that the pressure of whole display panel is touched
Control detection.
Fig. 4 and Fig. 5 are refer to, it illustrates two other cross-sectional view of display panel shown in Fig. 1.
In some embodiments of the present application, electric capacity is additionally provided with display panel.Here electric capacity can be drive circuit
In be used for deposit keep current potential or coupling produce electric charge electric capacity, for example can be gate driving circuit in electric capacity.Above-mentioned film
Transistor can also include grid, source electrode and drain electrode, under the control of grid voltage, active layer in addition to including active layer
Carrier can be drifted about between source electrode and drain electrode so that by source electrode and drain electrode turn on.
In certain embodiments, display panel can also include the pressure sensitivity signal wire electrically connected with pressure sensitivity unit.Such as Fig. 1 institutes
Show that pressure sensitive unit 102 is electrically connected with a plurality of pressure sensitivity signal wire 103.Here pressure sensitivity signal wire 103 can respectively with Fig. 3 institutes
Show that first input end IN1, the second input IN2, the first test side Fout1, the second test side Fout2 of pressure sensitivity unit are electrically connected
Signal wire.
Fig. 4 is refer to, identical with Fig. 2, display panel 400 includes substrate 40, the first semiconductor layer 41 and the second semiconductor
Layer 42, wherein the first semiconductor layer 41 is located between the semiconductor layer 42 of substrate 40 and second, thin film transistor (TFT) 410 includes active
Layer, the active layer is located at the second semiconductor layer 42.Pressure sensitive unit includes pressure sensitivity resistance 411, and the pressure sensitivity resistance 411 is located at the
Semi-conductor layer 41.First semiconductor layer 41 and the second semiconductor layer 42 can be spaced by dielectric 43.
As shown in figure 4, display panel 400 also includes gate metal layer 44, capacitance metal layer 45 and Source and drain metal level 46.
The grid 441 of thin film transistor (TFT) 410 is located at gate metal layer 44, and the source electrode 461 of thin film transistor (TFT) 410 and drain electrode 462 are located at source
Leak metal level 46.Source electrode 461 and drain electrode 462 are connected by via with active layer.Electric capacity 420 is additionally provided with display panel 400, electricity
A pole plate 451 for holding 420 is located at capacitance metal layer 45, and another pole plate 442 of electric capacity 420 can be located at gate metal layer
44.In other optional implementations of the present embodiment, another pole plate of electric capacity 420 may be located on Source and drain metal level 46.
In some optional implementations of the present embodiment, gate metal layer 44 can be located at the second semiconductor layer 42 with
Between Source and drain metal level 46, capacitance metal layer 45 can be located between gate metal layer 44 and Source and drain metal level 46.At other
In optional implementation, gate metal layer 44 can be located between the first semiconductor layer 41 and the second semiconductor layer 42, source and drain
Metal level 46 is located at the second side of the semiconductor layer 42 away from gate metal layer 44, at this moment, and capacitance metal layer 45 can be located at the
Between two semiconductor layers 42 and Source and drain metal level 46.
In this example it is shown that panel 400 also includes pressure sensitivity signal wire 452, pressure sensitivity signal wire 452 is arranged at electric capacity gold
Belong to layer 45.Pressure sensitivity signal wire 452 can be electrically connected by via with the pressure sensitivity resistance 411 positioned at the first semiconductor layer 41.Here
Pressure sensitivity signal wire 452 can be the pressure sensitivity signal wire 103 shown in Fig. 1, for providing input signal to pressure sensitive unit, and
The pressure touch signal that transmission pressure sensitive unit is detected.
In embodiment illustrated in fig. 4, on the basis of the design of pressure sensing unit is being realized in viewing area, by by pressure sensitivity signal
Line is arranged on the capacitance metal layer of display panel, pressure sensitivity signal wire can be made in the lump in the manufacture craft of electric capacity, using same
One of mask plate makes a pole plate and pressure sensitivity signal wire for electric capacity, and without increasing, extra mask plate and film layer can be real
The signal input and output of existing pressure sensitivity unit, are conducive to reducing the thickness of the display device of pressure sensitive function, and reduction has pressure
The cost of manufacture of the display device of power inducing function.
Further, above-mentioned substrate 40 can be flexible substrate, and display panel 400 can also include organic luminescent device
420, the organic luminescent device 420 is located at side of the thin film transistor (TFT) 410 away from substrate 40, can include anode 47, You Jifa
Luminescent material 48 and negative electrode 49, luminous organic material 47 are located between anode 47 and negative electrode 49.Negative electrode 49 can be whole face formula
Structure, i.e., the negative electrode of multiple organic luminescent devices is electrically connected to each other.
Fig. 5 is refer to, identical with Fig. 2, display panel 500 includes substrate 50, the first semiconductor layer 51 and the second semiconductor
Layer 52, wherein the first semiconductor layer 51 is located between the semiconductor layer 52 of substrate 50 and second, thin film transistor (TFT) 510 includes active
Layer, the active layer is located at the second semiconductor layer 52.Pressure sensitive unit includes pressure sensitivity resistance 511, and the pressure sensitivity resistance 511 is located at the
Semi-conductor layer 51.First semiconductor layer 51 and the second semiconductor layer 52 can be spaced by dielectric 53.
As shown in figure 5, display panel 500 also includes gate metal layer, capacitance metal layer (not shown) and source and drain metal
Layer 56.Wherein, gate metal layer includes first grid metal level 541 and second grid metal level 542.Thin film transistor (TFT) 510
Grid includes first grid 501 and second grid 502, and first grid 501 is located at first grid metal level 541, second grid position
In second grid metal level 542.The source electrode 551 of thin film transistor (TFT) 510 and drain electrode 552 are located at Source and drain metal level 55.The He of source electrode 551
Drain electrode 552 is connected by via with active layer.Electric capacity is additionally provided with display panel 500, one pole plate of electric capacity is located at capacitance metal
Layer, another pole plate can be located at first grid metal level 541, second grid metal level 542 or Source and drain metal level 55.
In this example it is shown that panel 500 is provided with pressure sensitivity signal wire 503, the pressure sensitivity signal wire 503 can be arranged at
First grid metal level 541 or second grid metal level 542, and by via and the first semiconductor layer 51 can be arranged at
Pressure sensitivity resistance 511 is electrically connected.
In some optional implementations of the present embodiment, first grid metal level 541 is located at the first semiconductor layer 51
And second between semiconductor layer 52, second grid metal level 542 is located between the second semiconductor layer 52 and Source and drain metal level 55, i.e.,
First grid metal level 541 is located at the bottom of second grid metal level 542, and pressure sensitivity signal wire 503 can be further disposed upon the
One gate metal layer 541.The first grid metal level 541 for being usually located at the bottom of second grid metal level 542 is relatively thin, and the first grid
The cabling of pole metal level 541 is less, with enough cablings of space voltage supply sense signal wire 503, is conducive to simplifying pressure sensitivity signal wire
503 cabling design, reduces the signal cross-talk between pressure sensitivity signal wire 503 and display panel other signal wires.
Further, above-mentioned substrate 50 can be flexible substrate, and display panel 500 can also include organic luminescent device
520, the organic luminescent device 520 is located at side of the thin film transistor (TFT) 510 away from substrate 50, can include anode 56, You Jifa
Luminescent material 57 and negative electrode 58, luminous organic material 57 are located between anode 56 and negative electrode 58.Negative electrode 58 can be whole face formula
Structure, i.e., the negative electrode of multiple organic luminescent devices can be electrically connected to each other.
Fig. 6 is refer to, it illustrates another cross-sectional view of display panel shown in Fig. 1.
As shown in fig. 6, on the basis of embodiment illustrated in fig. 2, display panel 600 is also included positioned at substrate 20 and the first half
First buffer layer 210 between conductor layer 21 and the insulating barrier between the first semiconductor layer 21 and the second semiconductor layer 22
23.Herein, the insulating barrier 23 between the first semiconductor layer 21 and the second semiconductor layer 22 includes the He of second buffer layer 220
Barrier layer 230 between the semiconductor layer 22 of second buffer layer 220 and second.Further, barrier layer 230 can include the
One barrier layer 231 and the second barrier layer 232.
First buffer layer 210 and second buffer layer 220 can be Si oxide, and its thickness can be 500nm.By setting
First buffer layer 210 and second buffer layer 220, it is ensured that when making amorphous crystallization of silicon using ELA techniques, substrate is damaged
Probability is smaller.First barrier layer 231 and the second barrier layer 232 can be respectively silicon nitride and Si oxide, the first barrier layer
231 thickness can be 120nm, and the thickness on the second barrier layer 232 can be 300nm.First barrier layer and the second barrier layer can
So that active layer and gate patterns, as etching barrier layer, can be protected to etch in the active layer and fabrication of thin film transistor (TFT)
Fall, also, the design of barrier bi-layer can reduce the dispersion in optical transmission process and the loss of light energy, be conducive to lifting aobvious
Show effect.
Fig. 7 is refer to, it illustrates the schematic flow sheet of the preparation method of display panel shown in Fig. 1.Herein, with making
The preparation method that the display panel of the embodiment of the present application is described exemplified by flexible display panels.
As shown in fig. 7, in step 701, there is provided rigid substrates；Then, in step 702, formed on the rigid substrate flexible
Substrate；Then, in step 703, first buffer layer and the first semiconductor layer are formed on flexible substrates, can specifically be passed through
Physical deposition or the mode of sputtering form first buffer layer and the first semiconductor layer, and the first semiconductor layer can be the amorphous of doping
Silicon layer.
Afterwards, in step 704, patterned process is carried out to the first semiconductor layer, specifically can be using mask plate to the
Semi-conductor layer is exposed, developed, the pressure sensitivity resistance formed in pressure sensitivity unit.Then, in step 705, led the first half
Second buffer layer and barrier layer are formed on body layer, can specifically be formed by way of physical deposition or sputtering.
Then, in step 706, the second semiconductor layer is formed over the barrier layer, that is, forms second layer amorphous silicon layer, and
In step 707, the amorphous crystallization of silicon of the second semiconductor layer is made using ELA techniques, here it is possible to adjust the laser in ELA techniques
Intensity makes the non-crystalline silicon of the first semiconductor layer be also converted to polysilicon.In step 707, if the second semiconductor layer has defect,
I.e. the second semiconductor layer some regions do not have amorphous silicon particles, and the first semiconductor layer can absorb the defect from the second semiconductor layer
The laser of region transmission, it is to avoid laser causes damage to substrate.
Afterwards, can in step 708, graphical second semiconductor layer to form the active layer of film transistor device,
And in step 709, grid layer, capacitance metal layer, Source and drain metal level and organic hair are sequentially formed on the second semiconductor layer
Optical device layer, then encapsulating organic light emitting device layer in step 710 again.Wherein, grid layer, capacitance metal layer, source and drain are being made
During metal level, film transistor device and pressure sensitivity signal wire can be produced simultaneously.
In step 711, flexible substrate and rigid substrates are separated using LLO techniques, so as to form flexible aobvious finally
Show panel.In the step 711, the first semiconductor layer can absorb the laser energy through substrate, prevent laser from having exposed to
Active layer is damaged thin film transistor (TFT).
The display panel that can be seen that the embodiment of the present application by above Making programme can utilize existing film layer, profit
Pressure sensitivity resistance and pressure sensitivity signal wire are produced with existing technique, and because pressure sensitivity resistance in the first semiconductor layer can basis
Design is needed, the precision of pressure sensitivity touch control detection can be lifted, the pressure sensitive function of flexible display panels can also be realized.
The embodiment of the present application additionally provides a kind of display device, as shown in figure 8, the display device 800 includes above-mentioned each reality
The display panel of example is applied, can be mobile phone, tablet personal computer, wearable device etc..It is appreciated that display device 800 can also be wrapped
Structure known to optical cement, protective glass etc. is included, here is omitted.
Above description is only the preferred embodiment of the application and the explanation to institute's application technology principle.People in the art
Member should be appreciated that invention scope involved in the application, however it is not limited to the technology of the particular combination of above-mentioned technical characteristic
Scheme, while should also cover in the case where not departing from the inventive concept, is carried out by above-mentioned technical characteristic or its equivalent feature
Other technical schemes formed by any combination.Such as features described above has similar work(with (but not limited to) disclosed herein
The technical characteristic of energy carries out technical scheme formed by replacement mutually.
Claims (16)
1. a kind of display panel, it is characterised in that including substrate, the first semiconductor layer being formed on the substrate and the second half
Conductor layer, first semiconductor layer is located between the substrate and second semiconductor layer；
The display panel is provided with thin film transistor (TFT) and pressure sensitive unit；
The thin film transistor (TFT) includes active layer, and the active layer is located at second semiconductor layer；
The pressure sensitive unit includes pressure sensitivity resistance, and the pressure sensitivity resistance is located at first semiconductor layer.
2. display panel according to claim 1, it is characterised in that second semiconductor layer is the polysilicon of doping
Layer；
First semiconductor layer is the amorphous silicon layer of doping or the polysilicon layer of doping.
3. display panel according to claim 2, it is characterised in that the thickness of first semiconductor layer is d, 40nm≤
d≤60nm。
4. display panel according to claim 1, it is characterised in that be additionally provided with electric capacity on the display panel；
The thin film transistor (TFT) also includes grid, source electrode and drain electrode；
The display panel also includes gate metal layer, capacitance metal layer and Source and drain metal level；
The source electrode and the drain electrode are located at the source-drain electrode metal level, and a pole plate of the electric capacity is located at the capacitance metal
Layer；
The display panel also includes the pressure sensitivity signal wire electrically connected with the pressure sensitive unit.
5. display panel according to claim 4, it is characterised in that
The pressure sensitivity signal wire is arranged at the capacitance metal layer.
6. display panel according to claim 5, it is characterised in that the grid is located at the gate metal layer；
The gate metal layer is located between first semiconductor layer and second semiconductor layer；Or
The gate metal layer is located between second semiconductor layer and the Source and drain metal level.
7. display panel according to claim 4, it is characterised in that the gate metal layer includes first grid metal level
With second grid metal level,
The grid includes first grid and second grid, and the first grid is located at the first grid metal level, described the
Two grids are located at the second grid metal level；
The pressure sensitivity signal wire is arranged at the first grid metal level or second grid metal level.
8. display panel according to claim 7, it is characterised in that the first grid metal level is located at described the first half
Between conductor layer and second semiconductor layer；
The second grid metal level is located between second semiconductor layer and the Source and drain metal level；
The pressure sensitivity signal wire is arranged at the first grid metal level.
9. the display panel according to claim any one of 3-8, it is characterised in that the pressure sensitive unit includes described
Pressure sensitivity resistance and the first input end electrically connected with the pressure sensitivity resistance, the second input, the first test side, the second test side；
Voltage input signal of the pressure sensitivity resistance for receiving the first input end and second input input, and to
First test side and the second test side voltage sense signal.
10. display panel according to claim 9, it is characterised in that the display panel also includes integrated drive electronics,
The integrated drive electronics includes pressure sensitivity and detects circuit；
The first input end, second input, first test side and second test side and the pressure sensitivity
Detect circuit electrical connection；
The pressure sensitivity detection circuit is used to provide the first level signal to the first input end, is provided to second input
Second electrical level signal, detects the first detection signal of first test side and the second detection signal of second test side；
And according to first level signal, the second electrical level signal, the first detection signal and the second detection signal meter
Calculate pressure value.
11. display panel according to claim 1, it is characterised in that the pressure sensitive unit is in the display panel
Upper to be arranged in matrix, the length and width of each pressure sensitive unit is no more than 5mm.
12. display panel according to claim 1, it is characterised in that the display panel also includes being located at the substrate
First buffer layer between first semiconductor layer and positioned at first semiconductor layer and second semiconductor layer it
Between insulating barrier.
13. display panel according to claim 12, it is characterised in that the insulating barrier includes second buffer layer and is located at
Barrier layer between the second buffer layer and second semiconductor layer.
14. display panel according to claim 1, it is characterised in that the display panel also includes organic luminescent device；
The organic luminescent device is located at side of the thin film transistor (TFT) away from the substrate.
15. display panel according to claim 1, it is characterised in that the substrate is flexible substrate.
16. a kind of display device, it is characterised in that including the display panel as described in claim any one of 1-15.
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| CN201710520805.2A CN107275346B (en) | 2017-06-30 | 2017-06-30 | Display panel and display device |
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| CN107275346B CN107275346B (en) | 2019-11-22 |
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