CN107256877B - Light emitting diode - Google Patents

Light emitting diode Download PDF

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Publication number
CN107256877B
CN107256877B CN201710456417.2A CN201710456417A CN107256877B CN 107256877 B CN107256877 B CN 107256877B CN 201710456417 A CN201710456417 A CN 201710456417A CN 107256877 B CN107256877 B CN 107256877B
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light emitting
layer
semiconductor layer
transparent electrode
electrode layer
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CN107256877A (en
Inventor
吴世熙
金每恞
李剡劤
梁明学
尹馀镇
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Seoul Viosys Co Ltd
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Seoul Viosys Co Ltd
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Priority claimed from KR20130097079A external-priority patent/KR20150019796A/en
Priority claimed from KR20140103815A external-priority patent/KR20150020096A/en
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Publication of CN107256877A publication Critical patent/CN107256877A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/42Transparent materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector

Abstract

Disclosed herein is a light emitting diode. The light emitting diode includes a plurality of light emitting cells and interconnects connecting the light emitting cells to each other, wherein at least one of the interconnects includes a common cathode electrically connected in common to two light emitting cells; each of the light emitting cells includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; the two light emitting cells share the first conductive type semiconductor layer; the transparent electrode layer is continuously disposed between the two light emitting cells, and the common cathode is electrically connected to the two light emitting cells through the transparent electrode layer.

Description

Light emitting diode
Technical Field
The present invention relates to a light emitting diode, and more particularly, to a light emitting diode including a plurality of light emitting cells connected to each other on a single substrate by an interconnection.
Background
Gallium nitride (GaN) -based Light Emitting Diodes (LEDs) have been used in a wide range of applications including full-color LED displays, LED traffic signal panels, white LEDs, and the like. In recent years, a white light emitting diode having higher luminous efficiency than that of an existing fluorescent lamp is expected to surpass the existing fluorescent lamp in the field of general lighting.
The light emitting diode may be driven to emit light at a low forward voltage of about 2V to about 4V and in a case where a direct current needs to be supplied. Therefore, when the light emitting diode is directly connected to an Alternating Current (AC) power source, the light emitting diode repeats an on/off operation according to a direction of current, so light cannot be continuously emitted, and may be easily damaged by a reverse current.
To solve such problems of the LIGHT emitting diode, WO 2004/023568(a1) (named "LIGHT-EMITTING DEVICE HAVING LIGHT-EMITTINGELEMENTS") of Sakai et al discloses a LIGHT emitting diode that can be used by being directly connected to a high voltage AC power source.
The AC light emitting diode of WO 2004/023568(a1) includes a plurality of light emitting elements connected to each other by an air bridge interconnect to be driven by an AC power source. Such air bridge interconnects can be easily damaged by external forces and can be deformed by external forces to cause short circuits.
In order to solve such a disadvantage of the air bridge interconnection, for example, AC light emitting diodes are disclosed in korean patent nos. 10-069023 and 10-1186684.
Fig. 1 is a schematic plan view of a typical light emitting diode including a plurality of light emitting units, and fig. 2 and 3 are sectional views taken along line a-a of fig. 1.
Referring to fig. 1 and 2, the light emitting diode includes a substrate 21, a plurality of light emitting cells 26 including S1, S2, a transparent electrode layer 31, an insulating layer 33, and an interconnection 35. In addition, each of the light emitting cells 26 includes a lower semiconductor layer 25, an active layer 27, and an upper semiconductor layer 29, and the buffer layer 23 may be disposed between the substrate 21 and the light emitting cells 26.
The light emitting cell 26 is formed by patterning the lower semiconductor layer 25, the active layer 27, and the upper semiconductor layer 29 grown on the substrate 21, and the transparent electrode layer 31 is formed on each of the light emitting cells S1, S2. In each of the light emitting cells 26, the upper surface of the lower semiconductor layer 25 is partially exposed by partially removing the active layer 27 and the upper semiconductor layer 29 to be connected to the interconnection 35.
Next, an insulating layer 33 is formed to cover the light emitting unit 26. The insulating layer 33 includes a side insulating layer 33a covering the side surface of the light emitting unit 26 and an insulating protective layer 33b covering the transparent electrode layer 31. The insulating layer 33 is formed with an opening through which a part of the transparent electrode layer 31 is exposed and an opening through which the lower semiconductor layer 25 is exposed. Then, the interconnection 35 is formed on the insulating layer 33, wherein a first interconnection portion 35p of the interconnection 35 is connected to the transparent electrode layer 31 of one light emitting cell S1 through an opening of the insulating layer 33, and a second interconnection portion 35n of the interconnection 35 is connected to the lower semiconductor layer 25 of another light emitting cell S2 adjacent to the one light emitting cell S1 through another opening of the insulating layer 33. The second interconnection portion 35n is connected to the upper surface of the lower semiconductor layer 25 exposed by partially removing the active layer 27 and the upper semiconductor layer 29.
In the conventional art, the interconnection 35 is formed on the insulating layer 33, and thus deformation due to an external force can be prevented. In addition, since the interconnection 35 is separated from the light emitting cell 26 by the side insulating layer 33a, the light emitting cell 26 can be prevented from being short-circuited by the interconnection 35.
However, such conventional light emitting diodes may have limitations in terms of current spreading in the region of the light emitting cell 26. In particular, the current may be concentrated under one end of the interconnection 35 connected to the transparent electrode layer 31, rather than being uniformly diffused in the region of the light emitting cell 26. Current crowding can become severe as current density increases.
In addition, the transparent electrode layer 31 is restrictively placed in the region of the upper semiconductor layer 29. As a result, the transparent electrode layer 31 has a relatively narrow area and increases the resistance of the light emitting diode, thereby causing an increase in the forward voltage (Vf) of the light emitting diode. As the number of the light emitting cells 26 increases, the resistance of the transparent electrode layer 31 becomes considerably large.
On the other hand, in order to prevent current crowding, a current blocking layer 30 may be disposed between the transparent electrode layer 31 and the light emitting cell 26 to prevent current crowding under the first interconnection portion 35p of the interconnection 35.
Fig. 3 is a cross-sectional view of a light emitting diode including a current blocking layer 30 in the related art.
Referring to fig. 1 and 3, the current blocking layer 30 is disposed under the first interconnection portion 35p of the interconnection 35. The current blocking layer 30 blocks current from flowing from the first interconnect 35p to the upper semiconductor layer 29 located directly below the first interconnect 35 p. Accordingly, the current blocking layer 30 may prevent current crowding under the first interconnection portion 35p of the interconnection 35. In addition, the current blocking layer 30 may be formed as a reflector such as a distributed Bragg reflector (distributed Bragg reflector) to prevent light generated in the active layer 27 from being absorbed into the first interconnection portion 35p of the interconnection 35.
However, when the light emitting diode further includes the current blocking layer 30, as shown in fig. 3, an additional process of forming the current blocking layer 30 by photolithography and etching is required, so that it is difficult to secure process stability while increasing manufacturing costs. In particular, when the current blocking layer 30 is exposed outside the transparent electrode layer 31, the current blocking layer 30 may be damaged due to BOE or the like in a subsequent process. Therefore, in the related art, in order to prevent damage to the current blocking layer 30 in a subsequent process, the current blocking layer 30 is covered with the transparent electrode layer 31, as shown in fig. 3.
Further, since the transparent electrode layer 31 is limitedly disposed in the region of the upper semiconductor layer 29, it is difficult to achieve uniform current diffusion over the entire upper semiconductor layer 29, and the light emitting diode still has a problem of excessive resistance due to a small area of the transparent electrode layer 31.
Disclosure of Invention
An object of the present invention is to provide a light emitting diode.
Another object of the present invention is to provide a light emitting diode capable of solving at least one of the above technical problems.
The present invention provides a light emitting diode, including: a plurality of light emitting units; and interconnects connecting the light emitting cells to each other, wherein at least one of the interconnects may include a common cathode electrically connected to the two light emitting cells in common; each of the light emitting cells may include a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; the two light emitting cells may share the first conductive type semiconductor layer; wherein the transparent electrode layer may be continuously disposed between the two light emitting cells, and the common cathode may be electrically connected to the two light emitting cells through the transparent electrode layer.
The present invention also provides a light emitting diode, including: a first light emitting unit and a second light emitting unit separated from each other on a substrate; a first transparent electrode layer electrically connected to the first light emitting cell; an interconnection electrically connecting the first light emitting unit to the second light emitting unit; and a first insulating layer, wherein the first transparent electrode layer may be disposed on an upper surface of the first light emitting unit to be connected to the first light emitting unit while at least partially covering a side surface of the first light emitting unit, and the first insulating layer may separate the first transparent electrode layer from the side surface of the first light emitting unit.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
Fig. 1 is a schematic plan view of a light emitting diode in the prior art.
Fig. 2 is a sectional view taken along line a-a of fig. 1.
Fig. 3 is a cross-sectional view of a light emitting diode including a current blocking layer 30 in the related art.
Fig. 4 is a schematic plan view of a light emitting diode according to an exemplary embodiment of the present invention, and fig. 5 is a schematic sectional view taken along line B-B of fig. 4.
Fig. 6 to 10 are schematic cross-sectional views illustrating a method of manufacturing a light emitting diode according to the exemplary embodiment of fig. 4.
Fig. 11 is a schematic plan view of a light emitting diode according to another exemplary embodiment of the present invention, and fig. 12 is a sectional view taken along line B-B of fig. 11.
Fig. 13 is a schematic plan view of a light emitting diode according to an exemplary embodiment of the present invention.
Fig. 14 (a) and (B) are sectional views taken along line a-a and line B-B of fig. 13, respectively.
Fig. 15 is a schematic circuit diagram of the light emitting diode of fig. 13.
Fig. 16 is a schematic circuit diagram showing a light emitting diode according to still another embodiment of the present invention.
Detailed Description
The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout the drawings.
It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will be understood that for purposes of this disclosure, "at least one of X, Y and Z" can be interpreted as X only, Y only, Z only, or any combination of two or more of X, Y and Z (e.g., XYZ, XYY, YZ, ZZ).
Spatially relative terms, such as "below … …," "below … …," "below," "above … …," and "above," may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below …" can include both an orientation of "above …" and "below …". The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Fig. 4 is a schematic plan view of a light emitting diode according to an exemplary embodiment of the present invention, and fig. 5 is a schematic sectional view taken along line B-B of fig. 4.
Referring to fig. 4 and 5, the light emitting diode includes a substrate 151, a light emitting cell S1, a light emitting cell S2, a first insulating layer 160a, a second insulating layer 160b, a transparent electrode layer 161, and an interconnection 165. The light emitting diode may further include a buffer layer 153.
The substrate 151 may be an insulating substrate or a conductive substrate. For example, the substrate 151 may be a sapphire substrate, a gallium nitride substrate, a silicon carbide (SiC) substrate, or a silicon substrate. In addition, the substrate 151 may be a substrate having a concave-convex pattern (not shown) on an upper surface thereof, for example, a patterned sapphire substrate.
On the single substrate 151, the first and second light emitting cells S1 and S2 are separated from each other. The first and second light emitting cells S1 and S2 may be composed of a gallium nitride semiconductor. Each of the first and second light emitting cells S1 and S2 has a stacked structure 156, and the stacked structure 156 includes a lower semiconductor layer 155, an upper semiconductor layer 159 disposed on one region of the lower semiconductor layer 155, and an active layer 157 disposed between the lower semiconductor layer 155 and the upper semiconductor layer 159. Here, the lower semiconductor layer 155 and the upper semiconductor layer 159 may be a p-type semiconductor layer and an n-type semiconductor layer, respectively, or vice versa.
Each of the lower semiconductor layer 155, the active layer 157, and the upper semiconductor layer 159 may be formed of a gallium nitride-based material (e.g., (Al, In, Ga) N). The active layer 157 may be formed of a material having a composition capable of emitting light (e.g., UV light or blue light) in a desired wavelength range, and the lower and upper semiconductor layers 155 and 159 are formed of a material having a bandgap wider than that of the active layer 157.
As shown, the lower semiconductor layer 155 and/or the upper semiconductor layer 159 may be formed of a single layer or a plurality of layers. In addition, the active layer 157 may have a single quantum well structure or a multiple quantum well structure.
Each of the first and second light emitting cells S1 and S2 may have inclined side surfaces whose inclination angle with respect to the upper surface of the substrate 151 ranges from 15 ° to 80 °.
As shown in fig. 5, the active layer 157 and the upper semiconductor layer 159 may be placed on some regions of the lower semiconductor layer 155, and other regions of the lower semiconductor layer 155 may be exposed. Alternatively, the upper surface of the lower semiconductor layer 155 may be completely covered by the active layer 157, so that the side surface of the lower semiconductor layer 155 is exposed.
In fig. 5, the first and second light emitting units S1 and S2 are partially shown. However, it should be noted that the first and second light emitting units S1 and S2 may have similar or identical structures, as shown in fig. 4. In particular, the first and second light emitting cells S1 and S2 may have the same gallium nitride-based semiconductor stack structure and may have inclined side surfaces of the same structure.
The buffer layer 153 may be disposed between the light emitting cells S1, S2 and the substrate 151. When the substrate 151 is a growth substrate, the buffer layer 153 is used to relieve lattice mismatch between the substrate 151 and the lower semiconductor layer 155 formed thereon.
The transparent electrode layer 161 is disposed on each of the light emitting cells S1, S2. Specifically, the first transparent electrode layer 161 is disposed on the first light emitting cell S1, and the second transparent electrode layer 161 is disposed on the second light emitting cell S2. The transparent electrode layer 161 may be disposed on an upper surface of the upper semiconductor layer 159 to be connected to the upper semiconductor layer 159.
The first and/or second transparent electrode layers 161 and 161 may cover a portion of side surfaces of the first and/or second light emitting cells S1 and/or S2, and may cover at least three surfaces of the first and/or second light emitting cells S1 and/or S2. In the embodiment illustrated in fig. 4, each of the first and second transparent electrode layers 161 and 161 covers four side surfaces of the first or second light emitting cell S1 or S2.
Accordingly, the transparent electrode layer 161 may have a region wider than an upper region of the corresponding light emitting cell S1 or S2. In addition, the transparent electrode layer 161 may cover the entire upper surface of the upper semiconductor layer 159. The transparent electrode layer 161 has a region (or area) wider than that of the corresponding light emitting cell S1 or S2, so that the resistance of the transparent electrode layer 161 can be reduced. The transparent electrode layer 161 placed on the second light emitting cell S2 is adjacent to the upper semiconductor layer 159 of the second light emitting cell S2 and is insulated from the lower semiconductor layer 155 of the second light emitting cell S2 by the first insulating layer 160 a. That is, the transparent electrode layer 161 may be adjacent to the exposed region of the upper semiconductor layer 159 and may be placed on the first insulating layer 160a covering the exposed region of the lower semiconductor layer 155.
The first insulating layer 160a separates the transparent electrode layer 161 from the side surface of the corresponding light emitting cell S1 or S2 to prevent the light emitting cell S1 or S2 from being electrically connected to the transparent electrode layer 161. The first insulating layer 160a may cover the side surface of the corresponding light emitting cell S1 or S2 along the edge of the corresponding light emitting cell. In addition, the first insulating layer 160a may cover the upper surface of the substrate 151 around the light emitting cells S1, S2. On the other hand, the first insulating layer 160a has an opening 160hn exposing the lower semiconductor layer 155 and an opening 160hp exposing the upper semiconductor layer 159. The transparent electrode layer 161 is connected to the upper semiconductor layer 159 through the opening 160hp formed on the upper surface of each of the light emitting cells S1, S2. Since the first insulating layer 160a is formed along the edge of the upper surface of the upper semiconductor layer 159, the transparent electrode layer 161 may be recessed from the edge of the upper semiconductor layer 159 to be connected to the upper semiconductor layer 159. Accordingly, the light emitting diode according to the present embodiment can prevent current crowding at the edge of the upper semiconductor layer 159 by the sidewalls of the light emitting cells S1, S2.
The second insulating layer 160b may be formed on each of the light emitting cells S1, S2 such that it is disposed between the transparent electrode layer 161 and the light emitting cells S1, S2. A portion of the transparent electrode layer 161 is disposed on the second insulating layer 160 b. The second insulating layer 160b may be disposed near an edge of each of the light emitting cells S1, S2, without being limited thereto. Alternatively, the second insulating layer 160b may be disposed at a central region of each of the light emitting cells S1, S2. The second insulating layer 160b may be formed of the same material (e.g., silicon oxide or silicon nitride) as that of the first insulating layer 160 a.
The interconnection 165 electrically connects the first light emitting cell S1 to the second light emitting cell S2. The interconnection 165 includes a first connection portion (one end) 165p and a second connection portion (the other end) 165 n. The first connection portion 165p is electrically connected to the transparent electrode layer 161 on the first light emitting cell S1, and the second connection portion 165n is electrically connected to the lower semiconductor layer 155 of the second light emitting cell S2. Specifically, the second connection portion 165n may be connected to the lower semiconductor layer 155 through the opening 160hn of the first insulating layer 160 a. The first light emitting cell S1 is serially connected to the second light emitting cell S2 through the first connection portion 165p and the second connection portion 165n of the interconnection 165.
On the other hand, the first connection portion 165p may be disposed near one edge of the first light emitting unit S1, without being limited thereto. Alternatively, the first connection portion 165p may be disposed at a central region of the first light emitting unit S1.
The interconnection 165 may be in contact with the transparent electrode layer 161 over the entire overlapping region between the interconnection 165 and the transparent electrode layer 161. In the related art, a portion of the insulating layer 33 is disposed between the transparent electrode layer 31 and the interconnection 35. However, in this embodiment, the interconnection 165 is in direct contact with the transparent electrode layer 161 without any insulating material disposed therebetween.
In addition, the second insulating layer 160b may be disposed on the entire overlap region between the interconnection 165 and the transparent electrode layer 161 on the first light emitting cell S1.
In this embodiment, the second connection portion 165n is connected to the exposed upper side of the lower semiconductor layer 155. Alternatively, the second connection portion 165n may be connected to an inclined side surface of the second light emitting cell S2, and in particular, to an inclined side surface of the lower semiconductor layer 155 of the second light emitting cell S2. In this case, it is not necessary to expose the upper surface of the lower semiconductor layer 155, and the first insulating layer 160a is formed to expose the inclined side surface of the lower semiconductor layer 155.
In this embodiment, the light emitting diode is shown to include two light emitting units, i.e., a first light emitting unit S1 and a second light emitting unit S2. However, the present invention is not limited thereto, and more light emitting cells may be electrically connected to each other through the interconnection 165. For example, the interconnection 165 may electrically connect the lower semiconductor layers 155 of the adjacent light emitting cells to their transparent electrode layers 161 to form a serial array of light emitting cells. Although the light emitting diodes may have a single series array formed on a single substrate 151, the present invention is not limited thereto. Alternatively, the light emitting diodes may comprise a plurality of series arrays connected in parallel or anti-parallel with each other. In addition, the light emitting diode may be provided with a bridge rectifier (not shown) connected to the series array of the light emitting cells so that the light emitting cells can be driven by the AC power. The bridge rectifier may be formed by connecting light emitting cells having the same structure as that of the light emitting cells S1, S2 using the interconnection 165.
Fig. 6 to 10 are sectional views illustrating a method of manufacturing a light emitting diode according to the exemplary embodiment of fig. 4.
Referring to fig. 6, a semiconductor stacked structure 156 is formed on a substrate 151, the semiconductor stacked structure 156 including a lower semiconductor layer 155, an active layer 157, and an upper semiconductor layer 159. In addition, a buffer layer 153 may be formed on the substrate 151 before the lower semiconductor layer 155 is formed.
The substrate 151 may be sapphire (Al)2O3) Substrate, silicon carbide (SiC) substrate, zinc oxide (ZnO) substrate, silicon (Si) substrate, arsenicGallium arsenide (GaAs) substrate, gallium phosphide (GaP) substrate, lithium aluminum oxide (LiAl)2O3) A substrate, a Boron Nitride (BN) substrate, an aluminum nitride (AlN) substrate, or a gallium nitride (GaN) substrate, without being limited thereto. That is, the substrate 151 may be formed of a material selected from various materials according to a material of a semiconductor layer to be formed on the substrate 151. In addition, the substrate 151 may be a substrate having a concave-convex pattern on an upper surface thereof, for example, a patterned sapphire substrate.
The buffer layer 153 is formed to alleviate lattice mismatch between the substrate 151 and the lower semiconductor layer 155 formed thereon, and the buffer layer 153 may be formed of, for example, gallium nitride (GaN) or aluminum nitride (AlN). When the substrate 151 is a conductive substrate, the buffer layer 153 may be formed as an insulating layer or a semi-insulating layer, for example, AlN or semi-insulating GaN.
Each of the lower semiconductor layer 155, the active layer 157, and the upper semiconductor layer 159 may be formed of a gallium nitride-based semiconductor material, for example, (Al, In, Ga) N. The lower semiconductor layer 155, the upper semiconductor layer 159, and the active layer 157 may be intermittently or continuously formed by Metal Organic Chemical Vapor Deposition (MOCVD), molecular beam epitaxy, Hydride Vapor Phase Epitaxy (HVPE), and the like.
Here, the lower semiconductor layer 155 and the upper semiconductor layer 159 may be an n-type semiconductor layer and a p-type semiconductor layer, respectively, or vice versa. The n-type semiconductor layer may be formed by doping the gallium nitride-based compound semiconductor layer with, for example, a silicon (Si) impurity, and the p-type semiconductor layer may be formed by doping the gallium nitride-based compound semiconductor layer with, for example, a magnesium (Mg) impurity.
Referring to fig. 7, a plurality of light emitting cells S1, S2 are formed to be separated from each other by photolithography and etching. Each of the light emitting cells S1, S2 may be formed to have an inclined side surface, and an upper surface of the lower semiconductor layer 155 of each of the light emitting cells S1, S2 is partially exposed.
In each of the light emitting cells S1, S2, the lower semiconductor layer 155 is first exposed through mesa etching, and the light emitting cells are separated from each other through a cell isolation process. Alternatively, the light emitting cells S1, S2 may be first separated from each other by a cell isolation process and then mesa-etched to expose the lower semiconductor layer 155 of the light emitting cells S1, S2.
When the interconnection is connected to the inclined side surface, mesa etching for exposing the upper surface of the lower semiconductor layer 155 may be omitted.
Referring to fig. 8, the second insulating layer 160b covering some regions of the first light emitting cells S1 is formed together with the second insulating layer 160b covering the side surfaces of the first light emitting cells S1. The first insulating layer 160a may extend to cover a region between the first and second light emitting cells S1 and S2. The first insulating layer 160a has an opening 160hp exposing the upper semiconductor layer 159 and an opening 160hn exposing the lower semiconductor layer 155. On the other hand, the first insulating layer 160a may be connected to the second insulating layer 160b, but the present invention is not limited thereto. In some embodiments, the first insulating layer 160a may be separated from the second insulating layer 160 b.
The first insulating layer 160a and the second insulating layer 160b may be simultaneously formed of silicon oxide or silicon nitride through the same process. For example, the first and second insulating layers 160a and 160b may be formed by depositing an insulating material and then patterning by photolithography and etching.
Next, referring to fig. 9, a transparent electrode layer 161 is formed on the first and second light emitting cells S1 and S2. The transparent electrode layer 161 is formed of a conductive oxide such as Indium Tin Oxide (ITO) or zinc oxide, or a metal layer such as Ni/Au. The transparent electrode layer 161 is connected to the upper semiconductor layer 159 through the opening 160hp and the transparent electrode layer 161 covers the second insulating layer 160 b.
In addition, the transparent electrode layer 161 covers side surfaces of the light emitting cells S1, S2. The transparent electrode layer 161 may also cover at least three side surfaces of the corresponding light emitting cell S1 or S2. Here, the transparent electrode layer 161 is formed outside the opening 160hn so that the lower semiconductor layer 155 is exposed.
On the other hand, the transparent electrode layer 161 is separated from the side surface of the light emitting cell S1 or S2 by the first insulating layer 160 a. In addition, the first transparent electrode layer 161 positioned on the first light emitting unit S1 is separated from the second transparent electrode layer 161 positioned on the second light emitting unit S2, and the first transparent electrode layer 161 positioned on the first light emitting unit S1 may be separated from the second light emitting unit S2.
The transparent electrode layer 161 may be formed by a lift-off process, without being limited thereto. Alternatively, the transparent electrode layer 161 may be formed by photolithography and etching.
Referring to fig. 10, an interconnection 165 is formed on the transparent electrode layer 161. The interconnection 165 includes a first connection portion 165p and a second connection portion 165n, wherein the first connection portion 165p is connected to the first transparent electrode layer 161 of the first light emitting cell S1, and the second connection portion 165n is connected to the lower semiconductor layer 155 of the second light emitting cell S2. The interconnection 165 may be formed by a lift-off process.
According to this embodiment, the first insulating layer 160a and the second insulating layer 160b may be simultaneously formed, thereby simplifying the manufacturing process. Further, the method according to the present embodiment does not include an etching process using the BOE after forming the first and second insulating layers 160a and 160b, thereby preventing damage to the first and second insulating layers 160a and 160b in a subsequent process using the BOE or the like.
Fig. 11 is a plan view of a light emitting diode according to another exemplary embodiment of the present invention, and fig. 12 is a sectional view taken along line B-B of fig. 11.
Referring to fig. 11 and 12, the light emitting diode according to this embodiment is substantially similar to the light emitting diode described with reference to fig. 4 and 5 except for the position of the transparent electrode layer 161.
That is, in the embodiment illustrated in fig. 4 and 5, the transparent electrode layer 161 is formed to cover four side surfaces of the corresponding light emitting cell S1 or S2, and is separated from the adjacent light emitting cell. In contrast, in this embodiment, the first transparent electrode layer 161 covers three side surfaces of the first light emitting cell S1 while extending to cover a portion of the side surface of the second light emitting cell S2.
The first transparent electrode layer 161 may be connected to the lower semiconductor layer 155 of the second light emitting cell S2. However, the first transparent electrode layer 161 is separated from the second transparent electrode layer and also separated from the upper semiconductor layer 159 of the second light emitting cell S2.
According to the present embodiment, current may be supplied between the adjacent light emitting cells S1, S2 using the transparent electrode layer 161, thereby further reducing the forward voltage of the light emitting diode.
To avoid repetition, a description of a method of manufacturing the light emitting diode according to the embodiment of the present invention will be omitted.
Although various embodiments have been described above, the present invention is not limited thereto, and various modifications, changes, and substitutions may be made without departing from the scope of the present invention.
Fig. 13 is a schematic plan view of a light emitting diode according to an exemplary embodiment of the present invention, (a) and (B) of fig. 14 are sectional views taken along line a-a and line B-B of fig. 13, respectively, and fig. 15 is a schematic circuit diagram of the light emitting diode of fig. 13.
Referring to fig. 13 to 15, the light emitting diode includes a substrate 221, a plurality of light emitting cells LEC, a current blocking layer 229, a transparent electrode layer 231, an insulating protection layer 233, a first interconnection 235, a second interconnection 237, a first electrode pad 239a, and a second electrode pad 239 b.
The substrate 221 is for supporting the light emitting cells LEC, and may be a growth substrate for growing a nitride semiconductor layer, such as a sapphire substrate, a silicon substrate, a GaN substrate, without being limited thereto. The substrate 221 generally refers to a substrate in a light emitting diode chip.
A plurality of light emitting cells LEC are disposed on the substrate 221. As shown in (a) and (b) of fig. 14, each of the light emitting cells LEC includes a first conductive type semiconductor layer 223, an active layer 225, and a second conductive type semiconductor layer 227. Here, the first conductive type semiconductor layer 223 and the second conductive type semiconductor layer 227 may be an n-type semiconductor layer and a p-type semiconductor layer, respectively, or vice versa. The active layer 225 is disposed between the first conductive type semiconductor layer 223 and the second conductive type semiconductor layer 227, and may have a single quantum well structure or a multiple quantum well structure. The material and composition of the active layer 225 is determined according to the desired wavelength of light. For example, the active layer 225 may be formed of an AlInGaN-based compound semiconductor (e.g., InGaN). The first and second conductive type semiconductor layers 223 and 227 are composed of an AlInGaN-based compound semiconductor (e.g., GaN) having a band gap wider than that of the active layer 225. On the other hand, a buffer layer (not shown) may be disposed between the first conductive type semiconductor layer 223 and the substrate 221.
The first conductive type semiconductor layer 223, the active layer 225, and the second conductive type semiconductor layer 227 may be grown on the substrate 221 by metal organic chemical vapor deposition, and then patterned by photolithography and etching.
As shown in (a) of fig. 13 and 14, the active layer 225 and the second conductive type semiconductor layer 227 may be divided from each other on the single first conductive type semiconductor layer 223. That is, the two light emitting cells LEC may share the first conductive type semiconductor layer 223.
The interconnects (i.e., the first and second interconnects 235 and 237) electrically connect the light emitting cells LEC to each other. The first and second interconnections 235 and 237 connect the light emitting cells LEC placed on the different first conductive type semiconductor layers 223 in series with each other. The first interconnection 235 electrically connects the first conductive type semiconductor layer 223 of one light emitting cell to the second conductive type semiconductor layer 227 of the adjacent light emitting cell LEC.
The first interconnect 235 includes: a first connection portion 235a (anode) connected to the first conductive type semiconductor layer 223; a second connection part 235b (cathode) disposed on the second conductive type semiconductor layer 227 to be electrically connected to the second conductive type semiconductor layer 227; and an interconnecting portion 235c interconnecting the first and second connecting portions 235a and 235 b.
The second interconnector 237 includes: a first connection portion 237a (common anode) connected to the first conductive type semiconductor layer 223; a second connection portion 237b (common cathode) disposed on the second conductive type semiconductor layer 227 to be electrically connected to the second conductive type semiconductor layer 227; and an interconnecting portion 237c interconnecting the first connecting portion 237a and the second connecting portion 237 b.
The common anode 237a is commonly connected to the two light emitting cells LEC. For example, the common anode 237a is electrically connected to the first conductive type semiconductor layer 223, for example, shared by the two light emitting cells LEC. On the other hand, the common cathode 237b is commonly connected to the two light emitting units 2 LEC. For example, the common cathode 237b is electrically connected to the second conductive type semiconductor layer 227 disposed on the common first conductive type semiconductor layer 223. The common cathode 237b is disposed on an area between the two light emitting cells 2 LEC.
Although the first and second interconnections 235 and 237 have been described above, it should be understood that the light emitting cells LEC may be connected to each other through various types of interconnections. For example, similar to the interconnection in fig. 13 that connects the first light emitting unit to two light emitting units adjacent to the first light emitting unit, the first connection portion 235a connected to one light emitting unit LEC may be connected to the common cathode 237b through the interconnection portion, and the common cathode 237b is commonly connected to the two light emitting units LEC. In addition, the common anode 237a may be connected to the two second connection portions 235b, and the two first connection portions 235a may be connected to the common cathode 237 b.
A plurality of series arrays are formed by the interconnects 235, 237, and the plurality of series arrays are connected in parallel to each other.
On the other hand, the transparent electrode layer 231 is connected to the second conductive type semiconductor layer 227 of the light emitting cell LEC. Although some transparent electrode layers 231 are restrictively disposed on the corresponding light emitting cells, other transparent electrode layers 231 may be continuously disposed on the two light emitting cells LEC.
The cathodes 235b, 237b may be electrically connected to the second conductive type semiconductor layer 227 through the transparent electrode layer 231. In particular, the common cathode 237b may be electrically connected to the two light emitting cells LEC simultaneously through the transparent electrode layer 231 continuously disposed on the two light emitting cells.
A current blocking layer 229 is disposed under the common cathode 237 b. Specifically, the current blocking layer 229 is disposed under the transparent electrode layer 231 to separate the transparent electrode layer 231 from the side surface of the light emitting cell 2LEC, particularly, from the first conductive type semiconductor layer 223. The current blocking layer 229 may have a width greater than that of the common cathode 237 b. In addition, the current blocking layer 229 may partially cover an upper region of the light emitting cell LEC. In addition, a current blocking layer (not shown) may be disposed under the cathode 235 b.
The current blocking layer 229 is formed of an insulating layer to prevent the lower side of the cathodes 235b, 237bThe current is crowded. Further, the current blocking layer 229 may include a distributed bragg reflector. The distributed bragg reflector that reflects the light emitted from the active layer 225 may be formed by repeatedly stacking layers having different refractive indexes (e.g., TiO)2/SiO2) To form the composite material. Since the current blocking layer 229 includes a distributed bragg reflector, light generated from the active layer 225 can be prevented from being absorbed into the interconnection members 235, 237.
As shown in fig. 13, a portion of the current blocking layer 229 may extend to the outside of the first conductive type semiconductor layer 223. A part of the interconnection portion 237c may be placed on the extension of the current blocking layer 229, and thus, the extension will reflect light traveling toward the interconnection portion 237 c. On the other hand, the transparent electrode layer 231 may extend to cover the extended portion of the current blocking layer 229. In addition, the transparent electrode layer 231 may also extend to cover a portion of the adjacent first conductive type semiconductor layer 223.
The first electrode pad 239a and the second electrode pad 239b are placed at opposite ends of the serial array. The first and second electrode pads 239a and 239b may be disposed on the light emitting cells LEC at opposite sides of the serial array, respectively.
The insulating protection layer 233 may cover substantially the entire light emitting diode except for the regions where the interconnection members 235, 237 and the electrode pads 239a, 239b are to be formed. The insulating protective layer 233 may be formed to protect the light emitting diode from external moisture or external force.
According to this embodiment, as shown in fig. 15, two serial arrays of light emitting cells LEC may be formed between the first electrode pad 239a and the second electrode pad 239 b. In fig. 15, one light emitting unit is placed at one end of the serial array where the second electrode pad 239b is placed, and two light emitting units are placed at the other end of the serial array where the first electrode pad 239a is placed. However, the present invention is not limited to such an arrangement of the light emitting units LEC. For example, one or two light emitting units may be placed at either end of the arrays.
In addition, according to this embodiment, as indicated with a dotted line in fig. 15, the common cathode 237b or the interconnect 237 including the common cathode 237b is provided to an interconnect array connected in parallel to each other. As a result, the light emitting cells connected to the common cathode 237b have the same potential, thereby alleviating current crowding on a particular array.
Although this embodiment has been shown as having four light emitting cells in a serial array, the number of light emitting cells in the serial array is not particularly limited as long as the serial array includes one or more light emitting cells. In addition, the number of light emitting cells may be determined in various ways as needed or in consideration of available voltages.
In addition, this embodiment has been shown to have a series-parallel structure in which two series arrays are formed on the substrate 221 through an interconnect and are connected in parallel to each other. However, it should be understood that the number of the serial arrays formed on the substrate 221 is not limited thereto, and that there may be more serial arrays formed on the substrate 221.
Fig. 16 is a schematic circuit diagram illustrating a light emitting diode in which four series arrays are formed according to still another embodiment of the present invention.
Referring to fig. 16, the light emitting cells LEC are connected to each other by the interconnection to form four serial arrays connected in parallel to each other between the first and second electrode pads 239a and 239 b. Light emitting cells having an area larger than that of the light emitting cells within the series array may be disposed at opposite ends of the series array. In this embodiment, two light emitting cells are provided to the first electrode pad 239a, and one light emitting cell is provided to the second electrode pad 239 b. However, it should be understood that the present invention is not limited thereto, and various numbers of light emitting cells may be disposed to opposite ends of the series array.
On the other hand, some of the light emitting cells LEC within the adjacent series arrays are connected to each other by the common cathode 237b, and some of the light emitting cells are connected to each other by the common anode 237 a. In addition, an interconnection 237 including a common cathode 237b and a common anode 237a may connect adjacent light emitting cells to each other. The positions of the common cathode 237b and the common anode 237a are indicated by dotted lines. As described with reference to fig. 13, the light emitting cells 2LEC including the common cathode 237b or the common anode 237a may share the first conductive type semiconductor layer 223. In addition, all adjacent light emitting cells between the respective series arrays may share the first conductive type semiconductor layer 223. For example, in this embodiment, the first, second, and third light emitting cells in the respective series arrays may share the first conductive type semiconductor layer 223.
Although this embodiment has been shown as having three light emitting cells arranged in each series array, the number of light emitting cells in the series array is not particularly limited as long as the series array includes one or more light emitting cells.
Although the present invention has been described with reference to some embodiments in conjunction with the accompanying drawings, it will be apparent to those skilled in the art that various modifications and changes may be made to the present invention without departing from the spirit and scope of the invention. In addition, it is to be understood that some features of the specific embodiments may be practiced in other embodiments without departing from the spirit or scope of the present invention. Therefore, it is to be understood that the examples are provided by way of illustration only and are presented to provide a complete disclosure of the invention and a thorough understanding of the invention to those skilled in the art. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.

Claims (10)

1. A light emitting diode, the light emitting diode comprising:
a first light emitting unit and a second light emitting unit spaced apart from each other on a substrate, the first light emitting unit including a side surface opposite to the second light emitting unit;
a first transparent electrode layer electrically connected to the first light emitting cell;
an interconnection electrically connecting the first light emitting unit to the second light emitting unit; and
a first insulating layer, a second insulating layer,
wherein the first transparent electrode layer is disposed on an upper surface of the first light emitting unit to be electrically connected to the first light emitting unit while at least partially covering the side surface of the first light emitting unit,
a first insulating layer separating the first transparent electrode layer from the side surface of the first light emitting unit, wherein the first insulating layer includes an opening configured to expose the lower semiconductor layer of the first light emitting unit adjacent to the second light emitting unit,
wherein the opening is disposed between the covered side surface of the first light emitting cell and an end portion of the lower semiconductor layer of the first light emitting cell,
wherein the interconnection is directly connected to the lower semiconductor layer through the opening.
2. The light emitting diode of claim 1, further comprising:
and a second insulating layer disposed between the interconnection and the first light emitting cell on an upper surface of the first light emitting cell to block current.
3. A light emitting diode according to claim 2 wherein the second insulating layer is formed of the same material as that of the first insulating layer.
4. A light emitting diode according to claim 2 wherein the second insulating layer is disposed under the first transparent electrode layer, and the interconnection is connected to the first transparent electrode layer.
5. The light emitting diode of claim 1, wherein the first transparent electrode layer covers at least three side surfaces of the first light emitting unit.
6. The light emitting diode of claim 5, wherein a portion of the first transparent electrode layer partially covers a side surface of the second light emitting unit.
7. The light emitting diode of claim 1, wherein each of the first and second light emitting cells comprises a lower semiconductor layer, an upper semiconductor layer, and an active layer disposed between the lower semiconductor layer and the upper semiconductor layer;
the first transparent electrode layer is electrically connected to the upper semiconductor layer; and
the interconnection is electrically connected to the first transparent electrode layer at one end thereof, and is electrically connected to the lower semiconductor layer of the second light emitting cell at the other end thereof.
8. A light emitting diode according to claim 7 wherein the interconnect is directly connected to the first transparent electrode layer without including an insulating material disposed over the entire stacking area therebetween.
9. The light emitting diode of claim 8, further comprising:
a second insulating layer disposed on the upper semiconductor layer of the first light emitting cell,
wherein the second insulating layer is disposed under a region where the first transparent electrode layer and the interconnection are connected.
10. The light emitting diode of claim 7, wherein the first and second light emitting units have the same structure.
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