CN107229013A - Pin prints bad method in a kind of golden face tests of improvement PCB - Google Patents

Pin prints bad method in a kind of golden face tests of improvement PCB Download PDF

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Publication number
CN107229013A
CN107229013A CN201710499183.XA CN201710499183A CN107229013A CN 107229013 A CN107229013 A CN 107229013A CN 201710499183 A CN201710499183 A CN 201710499183A CN 107229013 A CN107229013 A CN 107229013A
Authority
CN
China
Prior art keywords
pcb
golden
tool
test
golden face
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710499183.XA
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Chinese (zh)
Inventor
李宁辉
蒋善刚
周睿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Aoshikang Precision Circuit Huizhou Co Ltd
Original Assignee
Aoshikang Precision Circuit Huizhou Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aoshikang Precision Circuit Huizhou Co Ltd filed Critical Aoshikang Precision Circuit Huizhou Co Ltd
Priority to CN201710499183.XA priority Critical patent/CN107229013A/en
Publication of CN107229013A publication Critical patent/CN107229013A/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • G01R31/2812Checking for open circuits or shorts, e.g. solder bridges; Testing conductivity, resistivity or impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Measuring Leads Or Probes (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Pin prints bad method in a kind of golden face tests of improvement PCB, comprises the following steps:(1)Tool boring point is selected, drilling file is made;(2)Tool sawing sheet;(3)According to step(1)Drilling file tool is drilled;(4)To tool assembling ox horn seat and measurement needle guard;(5)Making chases after the line film;(6)According to step(5)What is made chases after the line film to tool distribution, and assembles test probe;(7)PCB is filled on tool to carry out opening short-circuit board test;(8)PCB binding golden plates are carried out using tool to test.This method significantly reduces pin print caused by test bad by improving the drilling point selection of tool drilling file in test process.

Description

Pin prints bad method in a kind of golden face tests of improvement PCB
Technical field
The present invention relates to PCB manufacture fields, and in particular to pin prints bad method in a kind of golden face tests of improvement PCB.
Background technology
PCB binds golden plate, will golden bin part be fixed on pcb board, because golden face quality requirements are tighter, and golden face is softer, It is generally also relatively tight to golden face quality requirements in PCB processing procedures, and the method for common PCB finished product tests would generally PCB pads, The PAD such as BGA, IC leave many testing needle prints, have a strong impact on the quality requirements that PCB binds golden plate, cause to influence Products product Matter.
With the quality requirements that the growing production capacity of company and efficiency and client are increasingly lifted, gold now is bound to PCB The tool preparation method of board test is improved, and is printed with the testing needle for improving golden face, that is, is met the quality requirements of client, improved again Products quality, reduces cost, thus improve I take charge of PCB industries competitiveness.
The content of the invention
The technical problems to be solved by the invention are to provide pin in a kind of golden face tests of improvement PCB and print bad method, carry Rise the quality management and control of PCB binding golden plate tests, the production of reduction PCB product and qualitative control cost.
The technical problems to be solved by the invention are achieved by the following technical programs:
(1)The golden face measurement jig boring points of PCB are selected, drilling file is made;
(2)PCB gold face measurement jig sawing sheet;
(3)According to step(1)Drilling file the golden face measurement jigs of PCB are drilled;
(4)To the golden face measurement jig assembling ox horn seats of PCB and measurement needle guard;
(5)Making chases after the line film;It is to make the data for testing each PCB nexus to chase after the line film, forms measurement jig distribution network Network figure, guides measurement jig distribution;
(6)According to step(5)What is made chases after the line film to the golden face measurement jig distributions of PCB, and assembles test probe;
(7)Dress PCB carries out opening short-circuit board test on the golden face measurement jigs of PCB;
(8)PCB binding golden plates are carried out using the golden face measurement jigs of PCB to test.
Wherein, step(1)The golden face measurement jig boring points of middle selection selection PCB, make drilling file specific as follows:
Each boring point of PCB gold face measurement jig designs the region by the 1/6 of the long side of each PCB welding disking areas, should Region is not in welding disking area, and all boring points are located on a horizontal line.
Further, described test probe is the tylostyle of 115 ° -120 ° of syringe needle angle.
Further, described use tool carries out PCB binding golden plate open-short circuits, and pressure sets and arrived during test 45X0.1mm。
Employ after above-mentioned technical proposal, the present invention has the advantages that:
PCB gold face measurement jig is a kind of instrument for fixing pcb board and being tested, and drilling clicks deviation when making tool At the long side 1/6 of pad, and all boring points are offset at same direction, can so be fallen using tool test pcb board hour hands print Away from PAD(Pad on respective production drilling file)At edge 1/3, golden face PAD welding is not influenceed.And select syringe needle angle 115 ° -120 ° of tylostyle is difficult to protrude into plate face as test probe, syringe needle, further reduction pin print.Comprehensive lifting PCB bindings Bad defect caused by golden plate test quality, the golden face pin print of reduction PCB binding golden plates.
Embodiment
With reference to embodiment, the present invention will be described in detail, and embodiment is only the preferred embodiment of the present invention, It is not limitation of the invention.
Pin prints bad method in a kind of golden face tests of improvement PCB, comprises the following steps:
(1)Tool boring point is selected, drilling file is made;
(2)Tool sawing sheet;
(3)According to step(1)Drilling file tool is drilled;
(4)To tool assembling ox horn seat and measurement needle guard;
(5)Making chases after the line film;
(6)According to step(5)What is made chases after the line film to tool distribution, and assembles test probe;
(7)PCB is filled on tool to carry out opening short-circuit board test;
(8)PCB binding golden plate open-short circuits are carried out using tool, pressure, which is set, during test arrives 45X0.1mm.
Wherein, step(1)Middle selection selection tool boring point, makes drilling file specific as follows:
Each boring point design of tool at the 1/6 of the long side of each pad by region, the region not in pad, and All boring points are located on a horizontal line.Pin print can fall at away from PAD edges 1/3, and golden face PAD welding is not influenceed.
Wherein, described test probe is the tylostyle of 115 ° -120 ° of syringe needle angle.So that being checked under ten times of mirrors without bright Aobvious pin print.
After preferably being selected using the reconnaissance of this method improvement tool borehole data, the selection of improvement testing needle and test parameter, gold Face pin prints fraction defective to be reduced to about 3-5% from original 50%.
Above-described embodiment is the preferred embodiment of the present invention, in addition, and the present invention can also have other implementations. That is, on the premise of without departing from present inventive concept, any obvious replacement should also fall into the protection of the present invention Within the scope of.

Claims (4)

1. pin prints bad method in a kind of golden face tests of improvement PCB, it is characterised in that comprise the following steps:
(1)The golden face measurement jig boring points of PCB are selected, drilling file is made;
(2)PCB gold face measurement jig sawing sheet;
(3)According to step(1)Drilling file the golden face measurement jigs of PCB are drilled;
(4)To the golden face measurement jig assembling ox horn seats of PCB and measurement needle guard;
(5)Making chases after the line film;
(6)According to step(5)What is made chases after the line film to the golden face measurement jig distributions of PCB, and assembles test probe;
(7)Dress PCB carries out opening short-circuit board test on the golden face measurement jigs of PCB;
(8)PCB binding golden plates are carried out using the golden face measurement jigs of PCB to test.
2. wherein, step(1)The golden face measurement jig boring points of middle selection selection PCB, make drilling file specific as follows:
Each boring point of PCB gold face measurement jig designs the region by the 1/6 of the long side of each PCB welding disking areas, should Region is not in welding disking area, and all boring points are located on a horizontal line.
3. pin prints bad method in the golden face tests of improvement PCB according to claim 1, it is characterised in that described survey Sound out the tylostyle that pin is 115 ° -120 ° of syringe needle angle.
4. pin prints bad method in the golden face tests of improvement PCB according to claim 1, it is characterised in that described makes PCB binding golden plate open-short circuits are carried out with tool, pressure, which is set, during test arrives 45X0.1mm.
CN201710499183.XA 2017-06-27 2017-06-27 Pin prints bad method in a kind of golden face tests of improvement PCB Pending CN107229013A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710499183.XA CN107229013A (en) 2017-06-27 2017-06-27 Pin prints bad method in a kind of golden face tests of improvement PCB

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710499183.XA CN107229013A (en) 2017-06-27 2017-06-27 Pin prints bad method in a kind of golden face tests of improvement PCB

Publications (1)

Publication Number Publication Date
CN107229013A true CN107229013A (en) 2017-10-03

Family

ID=59935304

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710499183.XA Pending CN107229013A (en) 2017-06-27 2017-06-27 Pin prints bad method in a kind of golden face tests of improvement PCB

Country Status (1)

Country Link
CN (1) CN107229013A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114423169A (en) * 2022-02-28 2022-04-29 广东汇芯半导体有限公司 Etching method of aluminum-based copper-clad plate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102638938A (en) * 2012-04-19 2012-08-15 蔡新民 Manufacturing method of high-intermodulation and high-frequency circuit board
CN103419518A (en) * 2012-05-22 2013-12-04 上海百嘉电子有限公司 Method for preparing field type display back electrode plate of electronic ink
CN103895061A (en) * 2012-12-27 2014-07-02 中国航空工业集团公司第六三一研究所 Method for machining holes in printed boards
CN104317998A (en) * 2014-10-17 2015-01-28 深圳市百能信息技术有限公司 Method and device for making and compensating parameters of Gerber file
CN106332476A (en) * 2016-11-09 2017-01-11 珠海杰赛科技有限公司 Multi-layer PCB manufacturing process

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102638938A (en) * 2012-04-19 2012-08-15 蔡新民 Manufacturing method of high-intermodulation and high-frequency circuit board
CN103419518A (en) * 2012-05-22 2013-12-04 上海百嘉电子有限公司 Method for preparing field type display back electrode plate of electronic ink
CN103895061A (en) * 2012-12-27 2014-07-02 中国航空工业集团公司第六三一研究所 Method for machining holes in printed boards
CN104317998A (en) * 2014-10-17 2015-01-28 深圳市百能信息技术有限公司 Method and device for making and compensating parameters of Gerber file
CN106332476A (en) * 2016-11-09 2017-01-11 珠海杰赛科技有限公司 Multi-layer PCB manufacturing process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114423169A (en) * 2022-02-28 2022-04-29 广东汇芯半导体有限公司 Etching method of aluminum-based copper-clad plate

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Application publication date: 20171003