CN107222435A - Eliminate the method and device for exchanging head resistance of message - Google Patents
Eliminate the method and device for exchanging head resistance of message Download PDFInfo
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- CN107222435A CN107222435A CN201610162299.XA CN201610162299A CN107222435A CN 107222435 A CN107222435 A CN 107222435A CN 201610162299 A CN201610162299 A CN 201610162299A CN 107222435 A CN107222435 A CN 107222435A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/103—Packet switching elements characterised by the switching fabric construction using a shared central buffer; using a shared memory
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
- H04L49/252—Store and forward routing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9015—Buffering arrangements for supporting a linked list
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- Computer Networks & Wireless Communication (AREA)
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- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The embodiment of the invention discloses a kind of method for exchanging head resistance for eliminating message, including：At least one the 2nd VIQ chained list is set up according to the nodal information and destination interface information of the first virtual input queue VIQ chained lists, and updates the nodal information of the first VIQ chained lists；The nodal information of at least one the 2nd VIQ chained list is updated after the head of the queue message for determining at least one the 2nd VIQ chained list, the head of the queue message and the destination interface information of at least one the 2nd VIQ chained list are sent to second level storage.The embodiment of the present invention also discloses a kind of device for exchanging head resistance for eliminating message simultaneously.
Description
Technical field
The present invention relates to Large Volume Data switching technology, more particularly to a kind of side for exchanging head resistance for eliminating message
Method and device.
Background technology
With the fast development of data network, the exchange capacity of route switching chip is also in sharp increase, in the industry
Generally by the way of shared memory space is realized in a kind of management of queue linked list, to alleviate the pressure of exchange capacity；
Route switching chip by the message of source port according to route switching to destination interface, be generally divided into two-level memory knot
Structure and intergrade switching fabric.
First order storage organization uses virtual input queue (Virtual Input Queue, VIQ) mode, i.e.,
With message source port (iport) for queue number tissue storage of linked list；When message enters VIQ, first from VIQ's
A free address is taken in idle chained list, message body is stored in body random access memory (Random
Access Memory, RAM) in (data_ram), then it regard address of the message in data_ram as section
Point information, the queue linked list RAM (qlist_ram) that the affiliated queue tail pointer (qlist_tp) of write-in message is pointed to
In address, while regarding the nodal information as new qlist_tp；When message goes out VIQ, first with queue head pointer
(qlist_hp) the reading address for being data_ram, takes out message, discharges address to VIQ idle chained list,
The reading address by qlist_ram of qlist_hp, obtains new qlist_hp simultaneously.
Intergrade switching fabric dispatches out certain one by one between the VIQ of first order storage organization according to order-preserving algorithm
One queue, removes table of query and routing, obtains destination interface information (bitmap), returns to first order storage organization and takes
Go out head of the queue message body, second level storage organization is sent to together with bitmap；Here order-preserving is substantially introduced
Algorithm, packet is cut into message according to specific foundation and is sent to switching network, switching purpose end correspondingly according to
Message combination is reduced into packet by this specific foundation, and this foundation is exactly order-preserving algorithm.
Second level storage organization uses VOQ (Virtual Output Queue, VOQ) mode,
Queue number tissue storage of linked list is used as using destination interface (oport)；The message that first order storage is sent by
Bitmap is input in one or several corresponding destination interface chained list queue, again with guarantor between destination queue
Sequence algorithm dispatches out team, and which achieves exchange of the message from source to purpose.
Fig. 1 produces the schematic diagram of MESSAGE EXCHANGE head resistance, such as Fig. 1 when being and carrying out data exchange using prior art
It is shown, the message for going to multiple different purposes is there may be in a VIQ of first order storage, for example, the
The queue i_que_0 (iport=0) of one-level storage head of the queue message goes to the queue o_que_n-1 of second level storage
(oport=n-1), secondary head of the queue message goes to the queue o_que_2 (oport=2) of second level storage；If just
In scheduling queue i_que_0 head of the queue message, but just, queue o_que_n-1 will expire, because queue linked list is slow
Deposit can only Sequential output characteristic, once head of the queue message occur destination interface obstruction can not export, remainder report
Text will even go to idle destination interface and can not also export, then inevitable route switching chip can flow control the
The outlet of one-level storage, though at this moment queue i_que_0 still has the cell for going to queue o_que_2, and
There is sufficient space to receive new message in queue o_que_2, but because the obstruction of head of the queue message, it is impossible to
The storage address that head pointer obtains the head of the queue message of time team is skipped from queue linked list, and wholly off can only be adjusted
Degree, that is, produce and exchange the problem of head hinders, reduce system effectiveness and performance.
The content of the invention
In view of this, the embodiment of the present invention is expected to provide a kind of method and device for exchanging head resistance for eliminating message,
The problem of head hinders is exchanged to solve to produce, system effectiveness and performance is improved.
To reach above-mentioned purpose, the technical proposal of the invention is realized in this way：
The present invention provides a kind of method for exchanging head resistance for eliminating message, and methods described includes：
At least one is set up according to the nodal information and destination interface information of the first virtual input queue VIQ chained lists
2nd VIQ chained lists, and update the nodal information of the first VIQ chained lists；
Determine updated after the head of the queue message of at least one the 2nd VIQ chained list it is described at least one second
The nodal information of VIQ chained lists, by the head of the queue message and the destination of at least one the 2nd VIQ chained list
Message breath is sent to second level storage.
In such scheme, the nodal information and destination interface according to the first virtual input queue VIQ chained lists
Information sets up at least one the 2nd VIQ chained list, and updates the nodal information of the first VIQ chained lists, including：
According to the destination interface information of the nodal information of the first VIQ chained lists and head of the queue message set up at least one
Two VIQ chained lists；
The new tail of head pointer as at least one the 2nd VIQ chained list of the first VIQ chained lists is referred to
Pin；
The first VIQ chained lists are updated, the new head pointer of the first VIQ chained lists is obtained.
In such scheme, institute is updated after the head of the queue message for determining at least one the 2nd VIQ chained list
The nodal information of at least one the 2nd VIQ chained list is stated, by the head of the queue report of at least one the 2nd VIQ chained list
Literary and described destination interface information is sent to second level storage, including：
At least one the 2nd VIQ chained list according to being obtained the head pointer of at least one the 2nd VIQ chained list
Head of the queue message；
At least one described the 2nd VIQ chained list is updated, the new of at least one the 2nd VIQ chained list is obtained
Head pointer；
The head of the queue message and the destination interface information of at least one the 2nd VIQ chained list are sent collectively to
The second level is stored.
In such scheme, in the nodal information according to the first VIQ chained lists and the destination interface of head of the queue message
Information is set up before at least one the 2nd VIQ chained list, and methods described also includes：
Determined using order-preserving algorithm after the head of the queue message in the first VIQ chained lists, query routing obtains described
The destination interface information of head of the queue message.
In such scheme, the first VIQ chained lists are updated described, the new of the first VIQ chained lists is obtained
Head pointer after, methods described also includes：
According to the second level store flow control and using order-preserving algorithm obtain it is qualified described at least
One the 2nd VIQ chained list.
In such scheme, the head pointer of at least one the 2nd VIQ chained list described in the basis obtain it is described extremely
After the head of the queue message of a few 2nd VIQ chained list, at least one the 2nd VIQ chained list described in the renewal,
Before the new head pointer for obtaining at least one the 2nd VIQ chained list, methods described also includes：
The head pointer of release at least one the 2nd VIQ chained list gives the sky of the body random access memory
Not busy chained list.
In such scheme, the head pointer using the first VIQ chained lists as it is described at least one second
The new tail pointer of VIQ chained lists, including：
, will at least one described the 2nd VIQ chained list using the head pointer of the first VIQ chained lists as data are write
Tail pointer as write address, the chained list random access memory of write-in at least one the 2nd VIQ chained list
In, the new tail of head pointer as at least one the 2nd VIQ chained list of the first VIQ chained lists is referred to
Pin.
It is described to update the first VIQ chained lists in such scheme, obtain the new of the first VIQ chained lists
Head pointer, including：
Using the head pointer of the first VIQ chained lists as address is read, the chained list of the first VIQ chained lists is read
Random access memory, obtains the new head pointer of the first VIQ chained lists.
In such scheme, the head pointer of at least one the 2nd VIQ chained list described in the basis obtain it is described at least
The head of the queue message of one the 2nd VIQ chained list, including：
Using the head pointer of at least one the 2nd VIQ chained list as address is read, read body arbitrary access and deposit
Reservoir, obtains the head of the queue message of at least one the 2nd VIQ chained list.
In such scheme, at least one the 2nd VIQ chained list described in the renewal, obtain it is described at least one the
The new head pointer of two VIQ chained lists, including：
Using the head pointer of at least one the 2nd VIQ chained list as address is read, read it is described at least one the
The chained list random access memory of two VIQ chained lists, obtains the new head of at least one the 2nd VIQ chained list
Pointer.
The present invention also provides a kind of device for exchanging head resistance for eliminating message, and described device includes：
First processing module, for the nodal information and destination according to the first virtual input queue VIQ chained lists
Message breath sets up at least one the 2nd VIQ chained list, and updates the nodal information of the first VIQ chained lists；
Updated after Second processing module, the head of the queue message for determining at least one the 2nd VIQ chained list
The nodal information of at least one the 2nd VIQ chained list, by the head of the queue of at least one the 2nd VIQ chained list
Message and the destination interface information are sent to second level storage.
In such scheme, the first processing module, specifically for the nodal information according to the first VIQ chained lists
At least one the 2nd VIQ chained list is set up with the destination interface information of head of the queue message；
The new tail of head pointer as at least one the 2nd VIQ chained list of the first VIQ chained lists is referred to
Pin；
The first VIQ chained lists are updated, the new head pointer of the first VIQ chained lists is obtained.
In such scheme, the Second processing module, specifically for according at least one described the 2nd VIQ chain
The head pointer of table obtains the head of the queue message of at least one the 2nd VIQ chained list；
At least one described the 2nd VIQ chained list is updated, the new of at least one the 2nd VIQ chained list is obtained
Head pointer；
The head of the queue message and the destination interface information of at least one the 2nd VIQ chained list are sent collectively to
The second level is stored.
In such scheme, the first processing module refers to also particularly useful for by the head of the first VIQ chained lists
Pin is as data are write, and using the tail pointer of at least one the 2nd VIQ chained list as write address, write-in is described
In the chained list random access memory of at least one the 2nd VIQ chained list, the head of the first VIQ chained lists is referred to
Pin as at least one the 2nd VIQ chained list new tail pointer；
The first processing module, also particularly useful for using the head pointer of the first VIQ chained lists as read address,
The chained list random access memory of the first VIQ chained lists is read, the new of the first VIQ chained lists is obtained
Head pointer.
In such scheme, the Second processing module, also particularly useful at least one the 2nd VIQ chain by described in
The head pointer of table reads body random access memory as address is read, and obtains at least one described the 2nd VIQ
The head of the queue message of chained list；
The Second processing module, makees also particularly useful for by the head pointer of at least one the 2nd VIQ chained list
To read address, the chained list random access memory of at least one the 2nd VIQ chained list is read, obtains described
The new head pointer of at least one the 2nd VIQ chained list.
The method and device provided in an embodiment of the present invention that exchange head resistance for eliminating message, it is described by determining
The node letter of at least one the 2nd VIQ chained list is updated after the head of the queue message of at least one the 2nd VIQ chained list
Breath, second is sent to by the head of the queue message and the destination interface information of at least one the 2nd VIQ chained list
Level storage；Determine updated after the head of the queue message of at least one the 2nd VIQ chained list it is described at least one the
The nodal information of two VIQ chained lists, by the head of the queue message and the purpose of at least one the 2nd VIQ chained list
Port information is sent to second level storage；Without mobile message body, only to original VIQ chained lists (first
VIQ chained lists) nodal information requeued, obtain the 2nd VIQ chained lists, pass through the 2nd VIQ chained lists
Swapped with second level storage so that the message of different destination interfaces in different 2nd VIQ chained lists, from
And mutually obstruction is avoided, solve generation and exchange the problem of head hinders, improve system effectiveness and performance.
Brief description of the drawings
Fig. 1 produces the schematic diagram of MESSAGE EXCHANGE head resistance when being and carrying out data exchange using prior art；
Fig. 2 eliminates the flow chart of the embodiment of the method one for exchanging head resistance of message for the present invention；
Fig. 3 eliminates the flow chart of the embodiment of the method two for exchanging head resistance of message for the present invention；
The unicast message for the embodiment of the method two that Fig. 4 hinders for the exchanges head that the present invention eliminates message is secondary to join the team
Schematic diagram；
The unicast message for the embodiment of the method two that Fig. 5 hinders for the exchange head that the present invention eliminates message goes out the signal of team
Figure；
The multicast message for the embodiment of the method two that Fig. 6 hinders for the exchanges head that the present invention eliminates message is secondary to join the team
Schematic diagram；
The multicast message for the embodiment of the method two that Fig. 7 hinders for the exchange head that the present invention eliminates message goes out the signal of team
Figure；
Fig. 8 eliminates the structural representation of the device embodiment for exchanging head resistance of message for the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear
Chu, it is fully described by.
Fig. 2 eliminates the flow chart of the embodiment of the method one for exchanging head resistance of message for the present invention, as shown in Fig. 2
The method that the exchanges head provided in an embodiment of the present invention for eliminating message hinders mainly is improved the of route switching chip
In one-level storage, it may include steps of：
Step 201, built according to the nodal information and destination interface information of the first virtual input queue VIQ chained lists
At least one the 2nd VIQ chained list is found, and updates the nodal information of the first VIQ chained lists.
The device for exchanging head resistance of message is eliminated still first by message with the VIQ chained lists (that is, first of original presence
VIQ chained lists are the VIQ chained lists of original presence) storage, obtain first in intermediate switched fabric query routing
After the destination interface information of the head of the queue message of VIQ chained lists, nodal information is gone out into team from the first VIQ chained lists, root
The destination interface pointed to according to the destination interface information of head of the queue message sets up at least one new VIQ chained list (i.e.,
At least one the 2nd VIQ chained list is that the destination interface pointed to according to the destination interface information of head of the queue message is set up
At least one new VIQ chained list), i.e., it is secondary to join the team, because there is polytype exchange in route switching,
For example, man-to-man unicast message, a pair of N (N>1) multicast message, therefore can be according to actual need
Ask and set up the 2nd suitable VIQ chained lists, be not any limitation as herein；The node of the first VIQ chained lists is updated afterwards
Information, wherein, the nodal information of the first VIQ chained lists includes the head pointer and tail pointer of the first VIQ chained lists；
Secondary join the team is that the secondary of nodal information is joined the team, and message body does not really go out team from body RAM, report
The address that body of text takes is not released to idle chained list.
Step 202, determine updated after the head of the queue message of at least one the 2nd VIQ chained list described at least
The nodal information of one the 2nd VIQ chained list, by the head of the queue message of at least one the 2nd VIQ chained list and institute
State destination interface information and be sent to second level storage.
The device for eliminating the exchange head resistance of message determines at least one the 2nd VIQ chained list using order-preserving algorithm
After head of the queue message, the nodal information of at least one the 2nd VIQ chained list is updated, wherein, the 2nd VIQ chained lists
Nodal information includes the head pointer and tail pointer of the 2nd VIQ chained lists；Afterwards, by least one the 2nd VIQ
The head of the queue message and destination interface information of chained list are sent to second level storage, pass through one group of bus transfer to second
Level storage, second level storage easily can produce destination interface according to total caching depth and single queue depth
Single queue level flow control information because single queue of the 2nd VIQ chained lists and second level storage organization is all
Arranged by destination interface, when receiving single queue level flow control of second level storage, it is possible to distinguish ring
Should, the 2nd VIQ chained lists controlled by flow are just not involved in scheduling, lead in remaining 2nd VIQ chained lists
Cross order-preserving algorithmic dispatching and go out message and continue to transmit backward, then solve generation and exchange the problem of head hinders.
The method provided in an embodiment of the present invention that exchange head resistance for eliminating message, by determining described at least one
The nodal information of at least one the 2nd VIQ chained list is updated after the head of the queue message of individual 2nd VIQ chained lists, will
The head of the queue message and the destination interface information of at least one the 2nd VIQ chained list are sent to the second level and deposited
Storage；Determine updated after the head of the queue message of at least one the 2nd VIQ chained list it is described at least one second
The nodal information of VIQ chained lists, by the head of the queue message and the destination of at least one the 2nd VIQ chained list
Message breath is sent to second level storage；Without mobile message body, only to original VIQ chained lists (the first VIQ
Chained list) nodal information requeued, obtain the 2nd VIQ chained lists, pass through the 2nd VIQ chained lists and
Secondary storage is swapped so that the message of different destination interfaces is in different 2nd VIQ chained lists, so as to keep away
Exempt from mutually obstruction, solve generation and exchange the problem of head hinders, improve system effectiveness and performance.
In order to more embody the purpose of the present invention, on the basis of above-described embodiment, further illustrate
It is bright.
Fig. 3 eliminates the flow chart of the embodiment of the method two for exchanging head resistance of message for the present invention, as shown in figure 3,
The method of the exchange head resistance provided in an embodiment of the present invention for eliminating message may include steps of：
Step 301, determined using order-preserving algorithm after head of the queue message in the first VIQ chained lists, query routing is obtained
To the destination interface information of the head of the queue message.
The device of the exchange head resistance of elimination message determines the head of the queue report in the first VIQ chained lists using order-preserving algorithm
Wen Hou, goes query routing to return to destination interface information (bitmap), the head of the queue message is parsed from bitmap
Destination slogan.
The destination interface information of step 302, the nodal information according to the first VIQ chained lists and head of the queue message is set up
At least one the 2nd VIQ chained list.
The device for exchanging head resistance of message is eliminated according to the head pointer and tail pointer and head of the queue of the first VIQ chained lists
The destination slogan of message sets up at least one the 2nd VIQ chained list.
Step 303, it regard the head pointer of the first VIQ chained lists as at least one described the 2nd VIQ chained list
New tail pointer.
Specifically, the device that hinders of the exchanges head for eliminating message using the head pointer of the first VIQ chained lists as writing
Data, using the tail pointer of at least one the 2nd VIQ chained list as write address, write-in it is described at least one
In the chained list random access memory (RAM) of 2nd VIQ chained lists, by the head of the first VIQ chained lists
Pointer as at least one the 2nd VIQ chained list new tail pointer.
Eliminate message exchanges head hinder device using the head pointer of the first VIQ chained lists as data are write, will at least
The tail pointer of one the 2nd VIQ chained list writes the chained list of at least one the 2nd VIQ chained list as write address
In RAM；Afterwards, it regard the first VIQ chained lists m head pointer as the new of at least one the 2nd VIQ chained list
Tail pointer.
Step 304, renewal the first VIQ chained lists, obtain the new head pointer of the first VIQ chained lists.
Specifically, the device for eliminating the exchange head resistance of message regard the head pointer of the first VIQ chained lists as reading
Address, reads the chained list random access memory of the first VIQ chained lists, obtains the first VIQ chained lists
New head pointer.
The device for exchanging head resistance of message is eliminated using the head pointer of the first VIQ chained lists as address is read, the is read
The chained list RAM of one VIQ chained lists, obtains the new head pointer of the first VIQ chained lists.
Step 305, the flow stored according to the second level control and obtain eligible using order-preserving algorithm
At least one described the 2nd VIQ chained list.
Flow control and obtained using order-preserving algorithm that the device of the exchange head resistance of elimination message is stored according to the second level
To at least one qualified the 2nd VIQ chained list.
Step 306, obtained according to the head pointer of at least one the 2nd VIQ chained list it is described at least one the
The head of the queue message of two VIQ chained lists.
Specifically, eliminating the device for exchanging head resistance of message by least one described qualified the 2nd VIQ
The head pointer of chained list reads body random access memory (data_ram), obtains the symbol as address is read
The head of the queue message of at least one the 2nd VIQ chained list of conjunction condition.
The device for exchanging head resistance of message is eliminated by the head pointer of at least one qualified the 2nd VIQ chained list
As address is read, data_ram is read, the head of the queue report of at least one qualified the 2nd VIQ chained list is obtained
Text.
Step 307, the head pointer of release at least one the 2nd VIQ chained list give the body arbitrary access
The idle chained list of memory.
The head for eliminating at least one qualified the 2nd VIQ chained list of device release of the exchange head resistance of message refers to
Pin gives the idle chained list of the data_ram, and such message body really completes out team in first order storage.
Step 308, at least one described the 2nd VIQ chained list of renewal, obtain at least one described the 2nd VIQ
The new head pointer of chained list.
Specifically, the device for eliminating the exchange head resistance of message refers to the head of at least one the 2nd VIQ chained list
Pin reads the chained list random access memory of at least one the 2nd VIQ chained list as address is read
(RAM) the new head pointer of at least one the 2nd VIQ chained list, is obtained.
The device for exchanging head resistance of message is eliminated by the head pointer of at least one qualified the 2nd VIQ chained list
As address is read, the chained list RAM of at least one qualified the 2nd VIQ chained list is read, is met
The new head pointer of at least one the 2nd VIQ chained list of condition.
Step 309, head of the queue message and the destination interface information by least one the 2nd VIQ chained list
It is sent collectively to second level storage.
The device for exchanging head resistance of message is eliminated by the head of the queue report of at least one qualified the 2nd VIQ chained list
Text and destination interface information are sent collectively to second level storage, and complete first order storage goes out team.
Unicast message the first order store it is secondary join the team and dequeue process, just only need to separately open up one in resource
Caching the same the chained list RAM of block and the first VIQ chained lists, as the chained list RAM of the first VIQ chained lists,
The secondary chained list of joining the team of memory node information.
Different from man-to-man unicast message, another typical message --- multicast message is one in exchange chip
To N (N>1) exchange process, message can at most replicate N parts；So meeting when secondary join the team
There is the scene for the tail pointer that a message nodal information is write to N number of 2nd VIQ chained lists simultaneously, therefore money
The caching for needing the chained list RAM for opening up N blocks and the first VIQ chained lists the same on source；Another difference is,
Above-mentioned N number of 2nd VIQ chained lists may not be simultaneously by flow control, the 2nd VIQ not controlled by flow
Chained list can read message body from data_ram and be sent to second level storage, but as long as message body also has portion
Idle chained list cannot be released to by not replicating the address in completion, data_ram shared by message body, and
Bitmap contents now are the destination interface queue not controlled by flow.
It is described in further detail below with two types message.
The unicast message for the embodiment of the method two that Fig. 4 hinders for the exchanges head that the present invention eliminates message is secondary to join the team
Schematic diagram, it is assumed that first queue i_que_1 head of the queue message is chosen by order-preserving algorithm, goes
Query routing returns to bitmap=0x4 (oport=2)；According to first queue i_que_1 nodal information and bitmap
Set up second queue vo_que_2；First queue i_que_1 qlist_hp=0 is taken out, qlist_hp=0 is indicated
Be that the address of the head of the queue message in data_ram is 0, with 0 to write data, with secondary second team that joins the team
The qlist_tp=12 for arranging vo_que_2 is write address, write-in second queue vo_que_2 chained list RAM；With
0 as second queue vo_que_2 new tail pointer；With 0 to read address, first queue i_que_1 is read
Chained list RAM, obtain first queue i_que_1 new head pointer qlist_hp=13；That is, it is secondary to join the team
Preceding first queue i_que_1 chained list RAM is 0-13-2-6-7, first queue i_que_1's
Qlist_hp=0, qlist_tp=7, second queue vo_que_2 chained list RAM is 10-12, second queue
Vo_que_2 qlist_hp=10, qlist_tp=12；It is secondary join the team after first queue i_que_1 chained lists RAM
For 13-2-6-7, first queue i_que_1 qlist_hp=13, qlist_tp=7, second queue vo_que_2
Chained list RAM be 10-12-0, second queue vo_que_2 qlist_hp=10, qlist_tp=0；In figure
Eoc represents the mark of tail pointer.
The unicast message for the embodiment of the method two that Fig. 5 hinders for the exchange head that the present invention eliminates message goes out the signal of team
Figure, as shown in fig. 5, it is assumed that storage queue o_que_n-1 in the second level is full, produces forward single queue level stream
Amount control, then because message carried out pre- sequence in secondary queue by purpose, that is, have and only the
Two queue vo_que_n-1 message is destined to second level storage queue o_que_n-1's, therefore rejects second
Queue vo_que_n-1, it is a certain by order-preserving algorithmic dispatching between second queue vo_que_0~vo_que_n-2
The head of the queue message of second queue goes out team；Such as scheduling second queue vo_que_2 message goes out in the present embodiment
Team, takes out second queue vo_que_2 qlist_hp=10, with 10 to read address, reads data_ram and obtains
To second queue vo_que_2 head of the queue message；Address 10 is discharged to idle chained list so that the message body
Really team is completed out in first order storage；With 10 to read address, second queue vo_que_2 chained list is read
RAM, obtains queue vo_que_2 new head pointer qlist_hp=12, i.e. the second queue gone out before team
Vo_que_2 chained list RAM is 10-12-0, second queue vo_que_2 qlist_hp=10, qlist_tp=0；
The second queue vo_que_2 gone out after team chained list RAM is 12-0, second queue vo_que_2's
Qlist_hp=12, qlist_tp=0；Finally second queue vo_que_2 head of the queue message and bitmap=0x4
Second level storage is sent collectively to, storage queue o_que_n-1 joins the team in the second level, subsequent treatment is existing
Technology, will not be described here.
The multicast message for the embodiment of the method two that Fig. 6 hinders for the exchanges head that the present invention eliminates message is secondary to join the team
Schematic diagram, as shown in Figure 6, it is assumed that first queue i_que_0 head of the queue message is chosen by order-preserving algorithm, goes
Query routing returns to bitmap=0x7 (oport=0,1,2)；According to first queue i_que_0 nodal information
Multiple second queues, the respectively vo_que_1 of the 2nd vo_que_0 the 2nd, second are set up with bitmap
vo_que_2；First queue i_que_0 qlist_hp=15 is taken out, what qlist_hp=15 was indicated is the head of the queue
Address of the message in data_ram is 15, with 15 to write data, while with secondary second queue of joining the team
Vo_que_0 qlist_tp=1, second queue vo_que_1 qlist_tp=2, second queue vo_que_2
Qlist_tp=7 be write address, write-in second queue vo_que_0 chained list RAM0, second queue
Vo_que_1 chained list RAM1, second queue vo_que_2 chained lists RAM2 (wherein, second queues
What vo_que_0 chained list RAM0 was stored is second queue vo_que_0 chained list, and other are analogized)；With
15 as second queue vo_que_0, second queue vo_que_1, second queue vo_que_2 new tail
Pointer；With 15 to read address, first queue i_que_0 chained list RAM is read, first queue i_que_0 is obtained
New head pointer qlist_hp=14；That is, it is secondary join the team before first queue i_que_0 chained list RAM be
15-14-3-4-10-12, first queue i_que_0 qlist_hp=15, qlist_tp=12, second queue
Vo_que_0 chained list RAM0 is 1, second queue vo_que_0 qlist_hp=1, qlist_tp=1, the
Two queue vo_que_1 chained list RAM1 be 0-2, second queue vo_que_1 qlist_hp=0,
Qlist_tp=2, second queue vo_que_2 chained list RAM2 are 7, second queue vo_que_2's
Qlist_hp=7, qlist_tp=7；Eoc represents the mark of tail pointer in figure.
The multicast message for the embodiment of the method two that Fig. 7 hinders for the exchange head that the present invention eliminates message goes out the signal of team
Figure, as shown in Figure 7, it is assumed that storage queue o_que_0 in the second level is full, produces forward single queue level flow
Control, therefore second queue vo_que_0 is rejected, pressed between second queue vo_que_1~vo_que_n-1
The head of the queue message of a certain second queue of order-preserving algorithmic dispatching goes out team；In the present embodiment, because second queue
Vo_que_0, second queue vo_que_1, second queue vo_que_2 are that same message is replicated, according to
Order-preserving algorithm and flow control, second queue vo_que_1, second queue should be currently dispatched simultaneously
Vo_que_2 message goes out team, and they co-own a message body, thus head pointer points to data_ram
In same address, take out head pointer qlist_hp=15, with 15 for read address, read data_ram obtain
Second queue vo_que_1, second queue vo_que_2 head of the queue message, the message body also wait for list
The control of queue flow replicates a just calculated to second level storage queue o_que_0 and really completes out team after cancelling,
Therefore address 15 can not temporarily be released to idle chained list；With 15 to read address, second queue vo_que_1 is read
Chained list RAM1, obtain second queue vo_que_1 new head pointer qlist_hp=7, with 15 for read ground
Location, reads second queue vo_que_2 chained list RAM2, obtains second queue vo_que_2 new head
Pointer qlist_hp=13, i.e. the second queue vo_que_0 gone out before team chained list RAM0 is 15, second
Queue vo_que_0 qlist_hp=15, qlist_tp=15, the second queue vo_que_1 gone out before team chained list
RAM1 is 15-7-10-11, second queue vo_que_1 qlist_hp=15, qlist_tp=11, is gone out before team
Second queue vo_que_2 chained list RAM2 be 15-13, second queue vo_que_2 qlist_hp=15,
Qlist_tp=13；The second queue vo_que_0 gone out after team chained list RAM0 is 15, second queue vo_que_0
Qlist_hp=15, qlist_tp=15 it is constant, the second queue vo_que_1 gone out after team chained list RAM1
For 7-10-11, second queue vo_que_1 qlist_hp=7, qlist_tp=11, the second queue gone out after team
Vo_que_2 chained list RAM2 is 13, second queue vo_que_2 qlist_hp=13, qlist_tp=13；
The message and bitmap=0x6 are sent collectively to second level storage, in second level queue o_que_1 and second
Level queue o_que_2 joins the team respectively, and subsequent treatment is prior art, be will not be described here.
The method provided in an embodiment of the present invention that exchange head resistance for eliminating message, by according to the first VIQ chained lists
Nodal information and the destination interface information of head of the queue message set up at least one the 2nd VIQ chained list；By described
The head pointer of one VIQ chained lists as at least one the 2nd VIQ chained list new tail pointer；Update described
First VIQ chained lists, obtain the new head pointer of the first VIQ chained lists；According to it is described at least one second
The head pointer of VIQ chained lists obtains the head of the queue message of at least one the 2nd VIQ chained list；Described in updating at least
One the 2nd VIQ chained list, obtains the new head pointer of at least one the 2nd VIQ chained list.By described in extremely
The head of the queue message and the destination interface information of a few 2nd VIQ chained list are sent collectively to second level storage；
By without mobile message body, only being carried out to the nodal information of original VIQ chained lists (the first VIQ chained lists)
Requeue, obtain the 2nd VIQ chained lists, swapped, made with second level storage by the 2nd VIQ chained lists
The message of different destination interfaces is obtained in different 2nd VIQ chained lists, so as to avoid mutually obstruction, production is solved
It is raw to exchange the problem of head hinders, improve system effectiveness and performance.
Fig. 8 eliminates the structural representation of the device embodiment for exchanging head resistance of message for the present invention, such as Fig. 8 institutes
Show, the device 08 of the exchange head resistance provided in an embodiment of the present invention for eliminating message includes：First processing module
81st, Second processing module 82；Wherein,
The first processing module 81, for the nodal information according to the first virtual input queue VIQ chained lists and
Destination interface information sets up at least one the 2nd VIQ chained list, and updates the node letter of the first VIQ chained lists
Breath；
The Second processing module 82, the head of the queue message for determining at least one the 2nd VIQ chained list
The nodal information of at least one the 2nd VIQ chained list is updated afterwards, will at least one described the 2nd VIQ chained list
Head of the queue message and the destination interface information be sent to the second level storage.
Further, the first processing module 81, specifically for the nodal information according to the first VIQ chained lists
At least one the 2nd VIQ chained list is set up with the destination interface information of head of the queue message；
The new tail of head pointer as at least one the 2nd VIQ chained list of the first VIQ chained lists is referred to
Pin；
The first VIQ chained lists are updated, the new head pointer of the first VIQ chained lists is obtained.
Further, the Second processing module 82, specifically for according at least one described the 2nd VIQ chain
The head pointer of table obtains the head of the queue message of at least one the 2nd VIQ chained list；
At least one described the 2nd VIQ chained list is updated, the new of at least one the 2nd VIQ chained list is obtained
Head pointer；
The head of the queue message and the destination interface information of at least one the 2nd VIQ chained list are sent collectively to
The second level is stored.
Further, described device also includes：Acquisition module 83；Wherein,
The acquisition module 83, for determining the head of the queue message in the first VIQ chained lists using order-preserving algorithm
Afterwards, query routing obtains the destination interface information of the head of the queue message.
Further, described device also includes：Choose module 84；Wherein,
The selection module 84, is obtained for the flow control stored according to the second level and using order-preserving algorithm
To at least one qualified described the 2nd VIQ chained list.
Further, described device also includes：Release module 85；Wherein,
The release module 85, for discharging the head pointer of at least one the 2nd VIQ chained list to described
The idle chained list of body random access memory.
Further, the first processing module 81, refers to also particularly useful for by the head of the first VIQ chained lists
Pin is as data are write, and using the tail pointer of at least one the 2nd VIQ chained list as write address, write-in is described
In the chained list random access memory of at least one the 2nd VIQ chained list, the head of the first VIQ chained lists is referred to
Pin as at least one the 2nd VIQ chained list new tail pointer.
Further, the first processing module 81, refers to also particularly useful for by the head of the first VIQ chained lists
Pin reads the chained list random access memory of the first VIQ chained lists, obtains described first as address is read
The new head pointer of VIQ chained lists.
Further, the Second processing module 82, also particularly useful at least one the 2nd VIQ chain by described in
The head pointer of table reads body random access memory as address is read, and obtains at least one described the 2nd VIQ
The head of the queue message of chained list.
Further, the Second processing module 82, also particularly useful at least one the 2nd VIQ chain by described in
The head pointer of table reads the chained list random access memory of at least one the 2nd VIQ chained list as address is read
Device, obtains the new head pointer of at least one the 2nd VIQ chained list.
The device of the present embodiment, can be used for the technical scheme for performing above-mentioned shown embodiment of the method, it is realized
Principle is similar with technique effect, and here is omitted.
In actual applications, the first processing module 81, Second processing module 82, acquisition module 83,
Choosing module 84, release module 85 can be by central processing unit (CPU), the microprocessor on device
(MPU), the device such as digital signal processor (DSP) or field programmable gate array (FPGA) is realized.
It should be understood by those skilled in the art that, embodiments of the invention can be provided as method, system or meter
Calculation machine program product.Therefore, the present invention can using hardware embodiment, software implementation or combine software and
The form of the embodiment of hardware aspect.Moreover, the present invention can be used wherein includes calculating one or more
The computer-usable storage medium of machine usable program code (includes but is not limited to magnetic disk storage and optical storage
Device etc.) on the form of computer program product implemented.
The present invention is with reference to method according to embodiments of the present invention, equipment (system) and computer program product
Flow chart and/or block diagram describe.It should be understood that can be by computer program instructions implementation process figure and/or side
Each flow and/or square frame in block diagram and flow and/or the knot of square frame in flow chart and/or block diagram
Close.Can provide these computer program instructions to all-purpose computer, special-purpose computer, Embedded Processor or
The processor of other programmable data processing devices is to produce a machine so that by computer or other can
The instruction of the computing device of programming data processing equipment is produced for realizing in one flow or multiple of flow chart
The device for the function of being specified in one square frame of flow and/or block diagram or multiple square frames.
These computer program instructions, which may be alternatively stored in, can guide computer or other programmable data processing devices
In the computer-readable memory worked in a specific way so that be stored in the computer-readable memory
Instruction, which is produced, includes the manufacture of command device, and the command device is realized in one flow of flow chart or multiple streams
The function of being specified in one square frame of journey and/or block diagram or multiple square frames.
These computer program instructions can be also loaded into computer or other programmable data processing devices, made
Obtain and perform series of operation steps on computer or other programmable devices to produce computer implemented place
Reason, so that the instruction performed on computer or other programmable devices is provided for realizing in flow chart one
The step of function of being specified in flow or multiple flows and/or one square frame of block diagram or multiple square frames.
The foregoing is only a preferred embodiment of the present invention, is not intended to limit the protection model of the present invention
Enclose.
Claims (15)
1. a kind of method for exchanging head resistance for eliminating message, it is characterised in that methods described includes：
At least one is set up according to the nodal information and destination interface information of the first virtual input queue VIQ chained lists
2nd VIQ chained lists, and update the nodal information of the first VIQ chained lists；
Determine updated after the head of the queue message of at least one the 2nd VIQ chained list it is described at least one second
The nodal information of VIQ chained lists, by the head of the queue message and the destination of at least one the 2nd VIQ chained list
Message breath is sent to second level storage.
2. according to the method described in claim 1, it is characterised in that described according to the first virtual input queue
The nodal information and destination interface information of VIQ chained lists set up at least one the 2nd VIQ chained list, and update described
The nodal information of first VIQ chained lists, including：
According to the destination interface information of the nodal information of the first VIQ chained lists and head of the queue message set up at least one
Two VIQ chained lists；
The new tail of head pointer as at least one the 2nd VIQ chained list of the first VIQ chained lists is referred to
Pin；
The first VIQ chained lists are updated, the new head pointer of the first VIQ chained lists is obtained.
3. according to the method described in claim 1, it is characterised in that it is described determine it is described at least one the
The nodal information of at least one the 2nd VIQ chained list is updated after the head of the queue message of two VIQ chained lists, will be described
The head of the queue message of at least one the 2nd VIQ chained list and the destination interface information are sent to second level storage, bag
Include：
At least one the 2nd VIQ chained list according to being obtained the head pointer of at least one the 2nd VIQ chained list
Head of the queue message；
At least one described the 2nd VIQ chained list is updated, the new of at least one the 2nd VIQ chained list is obtained
Head pointer；
The head of the queue message and the destination interface information of at least one the 2nd VIQ chained list are sent collectively to
The second level is stored.
4. method according to claim 2, it is characterised in that described according to the first VIQ chained lists
Nodal information and the destination interface information of head of the queue message set up before at least one the 2nd VIQ chained list, it is described
Method also includes：
Determined using order-preserving algorithm after the head of the queue message in the first VIQ chained lists, query routing obtains described
The destination interface information of head of the queue message.
5. method according to claim 2, it is characterised in that update the first VIQ described
After chained list, the new head pointer for obtaining the first VIQ chained lists, methods described also includes：
According to the second level store flow control and using order-preserving algorithm obtain it is qualified described at least
One the 2nd VIQ chained list.
6. method according to claim 3, it is characterised in that described in the basis at least one
The head pointer of two VIQ chained lists is obtained after the head of the queue message of at least one the 2nd VIQ chained list, described
At least one described the 2nd VIQ chained list is updated, the new head for obtaining at least one the 2nd VIQ chained list refers to
Before pin, methods described also includes：
The head pointer of release at least one the 2nd VIQ chained list gives the sky of the body random access memory
Not busy chained list.
7. method according to claim 2, it is characterised in that described by the first VIQ chained lists
Head pointer as at least one the 2nd VIQ chained list new tail pointer, including：
, will at least one described the 2nd VIQ chained list using the head pointer of the first VIQ chained lists as data are write
Tail pointer as write address, the chained list random access memory of write-in at least one the 2nd VIQ chained list
In, the new tail of head pointer as at least one the 2nd VIQ chained list of the first VIQ chained lists is referred to
Pin.
8. method according to claim 2, it is characterised in that renewal the first VIQ chains
Table, obtains the new head pointer of the first VIQ chained lists, including：
Using the head pointer of the first VIQ chained lists as address is read, the chained list of the first VIQ chained lists is read
Random access memory, obtains the new head pointer of the first VIQ chained lists.
9. method according to claim 3, it is characterised in that described in the basis at least one second
The head pointer of VIQ chained lists obtains the head of the queue message of at least one the 2nd VIQ chained list, including：
Using the head pointer of at least one the 2nd VIQ chained list as address is read, read body arbitrary access and deposit
Reservoir, obtains the head of the queue message of at least one the 2nd VIQ chained list.
10. method according to claim 3, it is characterised in that described in the renewal at least one
Two VIQ chained lists, obtain the new head pointer of at least one the 2nd VIQ chained list, including：
Using the head pointer of at least one the 2nd VIQ chained list as address is read, read it is described at least one the
The chained list random access memory of two VIQ chained lists, obtains the new head of at least one the 2nd VIQ chained list
Pointer.
11. a kind of device for exchanging head resistance for eliminating message, it is characterised in that described device includes：
First processing module, for the nodal information and destination according to the first virtual input queue VIQ chained lists
Message breath sets up at least one the 2nd VIQ chained list, and updates the nodal information of the first VIQ chained lists；
Updated after Second processing module, the head of the queue message for determining at least one the 2nd VIQ chained list
The nodal information of at least one the 2nd VIQ chained list, by the head of the queue of at least one the 2nd VIQ chained list
Message and the destination interface information are sent to second level storage.
12. device according to claim 11, it is characterised in that the first processing module, specifically
For the nodal information and the destination interface information of head of the queue message according to the first VIQ chained lists set up at least one
Two VIQ chained lists；
The new tail of head pointer as at least one the 2nd VIQ chained list of the first VIQ chained lists is referred to
Pin；
The first VIQ chained lists are updated, the new head pointer of the first VIQ chained lists is obtained.
13. device according to claim 11, it is characterised in that the Second processing module, specifically
For obtaining at least one described the 2nd VIQ chained list according to the head pointer of at least one the 2nd VIQ chained list
Head of the queue message；
At least one described the 2nd VIQ chained list is updated, the new of at least one the 2nd VIQ chained list is obtained
Head pointer；
The head of the queue message and the destination interface information of at least one the 2nd VIQ chained list are sent collectively to
The second level is stored.
14. device according to claim 12, it is characterised in that the first processing module, also has
Body is used for the head pointer of the first VIQ chained lists as data are write, will at least one described the 2nd VIQ chain
The tail pointer of table is as write address, the chained list random access memory of write-in at least one the 2nd VIQ chained list
In device, using the head pointer of the first VIQ chained lists as at least one the 2nd VIQ chained list new tail
Pointer；
The first processing module, also particularly useful for using the head pointer of the first VIQ chained lists as read address,
The chained list random access memory of the first VIQ chained lists is read, the new of the first VIQ chained lists is obtained
Head pointer.
15. device according to claim 13, it is characterised in that the Second processing module, also has
Body is used for the head pointer of at least one the 2nd VIQ chained list as address is read, and reads body arbitrary access
Memory, obtains the head of the queue message of at least one the 2nd VIQ chained list；
The Second processing module, makees also particularly useful for by the head pointer of at least one the 2nd VIQ chained list
To read address, the chained list random access memory of at least one the 2nd VIQ chained list is read, obtains described
The new head pointer of at least one the 2nd VIQ chained list.
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