CN107197190B - Method and device for generating video clock - Google Patents
Method and device for generating video clock Download PDFInfo
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- CN107197190B CN107197190B CN201710624376.3A CN201710624376A CN107197190B CN 107197190 B CN107197190 B CN 107197190B CN 201710624376 A CN201710624376 A CN 201710624376A CN 107197190 B CN107197190 B CN 107197190B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/4302—Content synchronisation processes, e.g. decoder synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
- H04N21/4363—Adapting the video or multiplex stream to a specific local network, e.g. a IEEE 1394 or Bluetooth® network
- H04N21/43632—Adapting the video or multiplex stream to a specific local network, e.g. a IEEE 1394 or Bluetooth® network involving a wired protocol, e.g. IEEE 1394
- H04N21/43635—HDMI
Abstract
The application provides a method and a device for generating a video clock, wherein the method comprises the following steps: acquiring MIPI line synchronous signals according to which the MIPI sends each line of data; determining a target line synchronous signal required by transmitting each line of data by the MIPI according to the clock frequency of the target video clock; determining a first pulse number of clock pulses sent by a target video clock in a first time length and a second pulse number of clock pulses required by the HDMI in the first time length; adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number; according to the third pulse number of the clock pulses of the adjusted video clock in the second duration and the fourth pulse number of the clock pulses required by the HDMI in the second duration, the frequency of the adjusted target video clock is adjusted, so that the number of the clock pulses sent by the current adjusted target video clock in the second duration is the same as the fourth pulse number, and the video clock required by the HDMI can be generated through the embodiment of the application.
Description
Technical Field
The present disclosure relates to the field of video interface conversion, and in particular, to a method and an apparatus for determining a video clock.
Background
In the Multimedia device, the Interface used for transmitting the Multimedia data may be a Mobile Industry Processor Interface (MIPI) or a High Definition Multimedia Interface (HDMI).
In a multimedia device, multimedia data often needs to be converted from MIPI input to HDMI output, for example, when the multimedia device performs image pickup and displays a picked-up video, the MIPI is usually connected with a camera, and sends a CSI-2 and I2C data signal collected by an image sensor in the camera to an image processing device, and the image processing device converts the CSI-2 and I2C data signal into a digital signal and sends the digital signal to a display through the HDMI.
However, the inventor found in the course of research that when multimedia data is sent out from HDMI, the multimedia device does not have a video clock required by HDMI, and therefore, a video clock required by HDMI needs to be generated.
Disclosure of Invention
Based on this, the application provides a method for generating a video clock, which is used for generating the video clock required by the HDMI.
The application also provides a device for generating the video clock, which is used for ensuring the realization and the application of the method in practice.
The technical scheme for solving the problems is as follows:
the application discloses a method for generating a video clock, which comprises the following steps:
acquiring MIPI line synchronous signals according to which MIPI transmits each line of data, wherein the MIPI line synchronous signals are used for representing the data transmission rule of the MIPI for transmitting each line of data;
according to the data sending rule corresponding to the MIPI line synchronous signal, determining a target line synchronous signal required by the MIPI to send each line of data according to the clock frequency of a target video clock, wherein the target video clock is a video clock initially set in the multimedia equipment; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
determining a first pulse number of clock pulses sent by the target video clock within a first time length and a second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the number of first pulses sent by the target video clock in a first time duration meets a preset number;
determining HDMI line synchronizing signals required by each line of data transmitted by the HDMI according to the adjusted video clock;
adjusting the frequency of the adjusted target video clock according to the third pulse number of the clock pulses of the adjusted video clock in the second duration and the fourth pulse number of the clock pulses required by the HDMI in the second duration, so that the number of the clock pulses sent by the current adjusted target video clock in the second duration is the same as the fourth pulse number, and using the current adjusted target video clock as the video clock according to which the HDMI sends data, wherein the second duration is the duration from the time when the MIPI sends a line of data according to the MIPI line synchronizing signal to the time when the HDMI sends the line of data according to the HDMI line synchronizing signal.
Wherein the adjusting the frequency of the adjusted target video clock according to the third number of the clock pulses of the adjusted video clock in the second duration and the fourth number of the clock pulses required by the HDMI in the second duration includes:
if the number of the third pulses is larger than the number of the fourth pulses within the second duration, reducing the frequency of the video clock after the frequency adjustment;
and if the third pulse number is smaller than the fourth pulse number in the second duration, increasing the frequency of the video clock after the frequency adjustment.
After the currently adjusted target video clock is used as the video clock according to which the HDMI sending data is based, the method further includes:
counting the number of third pulses and the number of fourth pulses within the second duration in the currently adjusted target video clock;
judging whether the number of the third pulses is the same as that of the fourth pulses;
and when the number of the third pulses is different from that of the fourth pulses, adjusting the frequency of the currently adjusted target video clock, so that the number of clock pulses sent by the currently adjusted target video clock in the second time duration is the same as that of the fourth pulses.
Wherein the adjusting the clock frequency of the target video clock according to the first number of pulses and the second number of pulses comprises:
if the number of the first pulses is larger than the number of the second pulses, reducing the frequency of the target video clock;
and if the number of the first pulses is less than the number of the second pulses, increasing the frequency of the target video clock.
The application also discloses a method for generating the video clock, which comprises the following steps:
acquiring MIPI (mobile industry processor interface) line synchronous signals according to which MIPI transmits each line of data and MIPI frame synchronous signals according to which MIPI transmits each frame of data, wherein the MIPI line synchronous signals are used for representing the data transmission rule of the MIPI for transmitting each line of data, and the MIPI frame synchronous signals are used for representing the data transmission rule of the MIPI for transmitting each frame of data;
according to the data sending rule corresponding to the MIPI line synchronous signal, determining a target line synchronous signal required by the MIPI to send each line of data according to the clock frequency of a target video clock, wherein the target video clock is a video clock initially set in the multimedia equipment; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
determining a first pulse number of clock pulses sent by the target video clock within a first time length and a second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the number of first pulses sent by the target video clock in a first time duration meets a preset number;
determining an HDMI frame synchronization signal required by the HDMI to send each frame of data according to the adjusted video clock;
and adjusting the frequency of the adjusted target video clock according to the fifth pulse number of the clock pulses of the adjusted video clock in a third time length and the sixth pulse number of the clock pulses required by the HDMI in the third time length, so that the fifth pulse number and the sixth pulse number sent by the current adjusted target video clock in the third time length are the same, and the current adjusted target video clock is used as the video clock according to which the HDMI sends data, wherein the third time length is the time length from MIPI sending a frame of data according to the MIPI frame synchronizing signal to HDMI sending the frame of data according to the HDMI frame synchronizing signal.
Wherein the adjusting the frequency of the adjusted target video clock according to the fifth number of clock pulses of the adjusted video clock in a third duration and the sixth number of clock pulses of the HDMI in the third duration includes:
if the fifth pulse number is larger than the sixth pulse number within the third duration, reducing the frequency of the adjusted target video clock;
and if the fifth pulse number is smaller than the sixth pulse number in the third duration, increasing the frequency of the adjusted target video clock.
Wherein the adjusting the clock frequency of the target video clock according to the first number of pulses and the second number of pulses comprises:
if the number of the first pulses is larger than the number of the second pulses, reducing the frequency of the target video clock;
and if the number of the first pulses is less than the number of the second pulses, increasing the frequency of the target video clock.
The application also discloses a device for generating the video clock, which comprises:
the device comprises a first acquisition unit, a second acquisition unit and a control unit, wherein the first acquisition unit is used for acquiring MIPI (mobile industry processor interface) line synchronous signals according to which MIPI transmits data of each line, and the MIPI line synchronous signals are used for representing the data transmission rule of the MIPI for transmitting the data of each line;
a first determining unit, configured to determine, according to the data sending rule corresponding to the MIPI line synchronization signal, a target line synchronization signal required by the MIPI to send each line of data according to a clock frequency of a target video clock, where the target video clock is a video clock initially set in the multimedia device; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
the second determining unit is used for determining the first pulse number of clock pulses sent by the target video clock within the first time length and the second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
the first adjusting unit is used for adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the first pulse number sent by the target video clock in a first duration meets a preset number;
the third determining unit is used for determining that the HDMI sends HDMI line synchronizing signals required by each line of data according to the adjusted video clock;
and a second adjusting unit, configured to adjust the frequency of the adjusted target video clock according to a third pulse number of clock pulses of the adjusted video clock in a second duration and a fourth pulse number of clock pulses required by the HDMI in the second duration, so that the number of clock pulses sent by the current adjusted target video clock in the second duration is the same as the fourth pulse number, and the current adjusted target video clock is used as a video clock according to which the HDMI sends data, where the second duration is a duration from MIPI sending a line of data according to the MIPI line synchronization signal to HDMI sending the line of data according to the HDMI line synchronization signal.
Wherein the first adjusting unit includes:
the first frequency adjusting subunit is used for reducing the frequency of the target video clock under the condition that the first pulse number is greater than the second pulse number;
and a second frequency adjustment subunit, configured to increase the frequency of the target video clock when the first number of pulses is smaller than the second number of pulses.
Wherein the second adjusting unit includes:
a first adjusting subunit, configured to reduce the frequency of the video clock after the frequency adjustment if the number of the third pulses is greater than the number of the fourth pulses within the second duration;
and the second adjusting subunit is configured to increase the frequency of the video clock after the frequency adjustment if the third number of pulses is smaller than the fourth number of pulses within the second duration.
The device also includes:
the counting unit is used for counting the number of third pulses and the number of fourth pulses within the second duration in the currently adjusted target video clock;
the judging unit is used for judging whether the number of the third pulses is the same as that of the fourth pulses;
and the third adjusting unit is used for adjusting the frequency of the currently adjusted target video clock when the number of the third pulses is different from the number of the fourth pulses, so that the number of clock pulses sent by the currently adjusted target video clock in the second time length is the same as the number of the fourth pulses.
The application also discloses a device for generating the video clock, which comprises:
a second obtaining unit, configured to obtain an MIPI line synchronization signal according to which each line of data is sent by MIPI, and an MIPI frame synchronization signal according to which each frame of data is sent by MIPI, where the MIPI line synchronization signal is used to characterize a data sending rule of each line of data sent by MIPI, and the MIPI frame synchronization signal is used to characterize a data sending rule of each frame of data sent by MIPI;
a first determining unit, configured to determine, according to the data sending rule corresponding to the MIPI line synchronization signal, a target line synchronization signal required by the MIPI to send each line of data according to a clock frequency of a target video clock, where the target video clock is a video clock initially set in the multimedia device; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
the second determining unit is used for determining the first pulse number of clock pulses sent by the target video clock within the first time length and the second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
the first adjusting unit is used for adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the first pulse number sent by the target video clock in a first duration meets a preset number;
the fourth determining unit is used for determining the HDMI frame synchronizing signal required by the HDMI to send each frame of data according to the adjusted video clock;
and a fourth adjusting unit, configured to adjust the frequency of the adjusted target video clock according to a fifth pulse number of clock pulses of the adjusted video clock in a third duration and a sixth pulse number of clock pulses required by the HDMI in the third duration, so that the number of clock pulses sent by the current adjusted target video clock in the third duration is the same as the sixth pulse number, and the current adjusted target video clock is used as the video clock according to which the HDMI sends data, where the third duration is a duration between sending a frame of data according to the MIPI frame synchronization signal and sending the frame of data according to the HDMI frame synchronization signal.
Wherein the first adjusting unit includes:
the first frequency adjusting subunit is used for reducing the frequency of the target video clock under the condition that the first pulse number is greater than the second pulse number;
and a second frequency adjustment subunit, configured to increase the frequency of the target video clock when the first number of pulses is smaller than the second number of pulses.
Wherein the fourth adjusting unit includes:
a third adjusting subunit, configured to reduce the frequency of the adjusted target video clock if the number of fifth pulses is greater than the number of sixth pulses within a third duration;
and the fourth adjusting subunit is used for increasing the frequency of the adjusted target video clock if the number of the fifth pulses in the third duration is less than the number of the sixth pulses.
The beneficial effect of this application does:
in the embodiment of the application, a first time length between any two adjacent rising edges in a target line synchronizing signal represents the time for transmitting one line of data by the MIPI, and since the time length for transmitting one line of data by the MIPI is the same as the time length for transmitting one line of data by the HDMI, the first time length can be regarded as the time length for transmitting one line of data by the HDMI, the speed of the frequency of a target video clock relative to the frequency of a video clock required by the HDMI is determined by comparing the number of first pulses transmitted by the target video clock in the first time length with the number of second pulses required by the HDMI, the number of first pulses transmitted by the target video clock after the frequency is adjusted in the first time length meets a preset number by adjusting the frequency of the target video clock, and at this time, the frequency of the target video clock is close to the frequency of the video clock required by the HDMI; in a second time length of a line of data converted from MIPI input to HDMI output, the number of third pulses sent by the target video clock after the frequency is adjusted and the number of fourth pulses required by the HDMI reflect the speed of the frequency of the target video clock after the frequency is adjusted relative to the frequency of the video clock required by the HDMI, the number of the third pulses sent by the target video clock with the currently adjusted frequency in the second time length is equal to the number of the fourth pulses through the adjustment of the frequency of the target video clock with the adjusted frequency, because the number of the pulses of the video clock in the fixed second duration represents the frequency of the video clock, the number of the pulses of the target video clock with the currently adjusted frequency in the second duration is the same as the number of the fourth pulses required by the HDMI, which indicates that the frequency of the target video clock with the currently adjusted frequency is the frequency of the video clock required by the HDMI, and the video clock at this time is the video clock required by the HDMI.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of an embodiment of a method for generating a video clock according to the present application;
FIG. 2 is a flow chart of another embodiment of a method for generating a video clock according to the present application;
fig. 3 is a schematic structural diagram of an embodiment of a video clock generation apparatus according to the present application;
fig. 4 is a schematic structural diagram of another embodiment of a video clock generation apparatus according to the present application.
Detailed Description
The method for generating the video clock is applied to the digital clock in the multimedia device, and aims to adjust the frequency of the digital clock and generate the video clock required by the HDMI when the video data is converted from MIPI (Mobile industry processor interface) input to HDMI (high-definition multimedia interface) output.
The method for generating the video clock according to the embodiment of the present application may be executed by a device for generating the video clock, and the device may be integrated in an interface chip in the multimedia device or may be separately configured.
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, a flowchart of an embodiment of a method for generating a video clock according to the present application is shown, which may specifically include the following steps:
step 101: and acquiring MIPI line synchronous signals according to which the MIPI transmits each line of data, wherein the MIPI line synchronous signals are used for representing the data transmission rule of the MIPI transmitting each line of data.
In this embodiment, video data is transmitted according to the specification of the MIPI protocol, and in the transmission process, the time length for transmitting each line of data by the MIPI is the same and the time length interval for transmitting any two adjacent lines of data is the same, so that a line synchronization signal for transmitting data by the MIPI can be generated according to the data transmission rule for transmitting each line of data by the MIPI. In this embodiment, the MIPI protocol parsing module parses a frame synchronization short packet, a line synchronization short packet, and video data sent by the MIPI sending data from the MIPI protocol, and then the synchronization signal generating module in the multimedia device generates a MIPI line synchronization signal according to the line synchronization short packet, where the MIPI line synchronization signal may represent a time when the MIPI sends a line of data through a high-low transition of a level. In this step, the generated MIPI line synchronization signal is acquired from the synchronization signal generation module.
Step 102: according to a data sending rule corresponding to the acquired MIPI line synchronous signal, determining a target line synchronous signal required by the MIPI to send each line of data according to the clock frequency of a target video clock, wherein the target video clock is a video clock initially set in the multimedia equipment; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal.
In this embodiment, there is one initially set video clock in the multimedia device, and for convenience of description, this initially set video clock is referred to as a target video clock in this step, and the frequency of the target video clock is an initial default value, but the frequency of the target video clock is not the frequency of the video clock required by HDMI. In this step, the target video clock may be a counting clock in the multimedia device. Therefore, an object of the embodiments of the present application is to adjust the frequency of the target video clock to the frequency of the video clock required for HDMI. After the MIPI line synchronizing signal is obtained, a target line synchronizing signal required by the MIPI line synchronizing signal for transmitting each line of data according to the clock frequency of a target video clock is determined according to a data transmitting rule corresponding to the MIPI line synchronizing signal, the target line synchronizing signal represents a synchronizing signal according to which the MIPI transmits each line of data under the target video clock, and the data transmitting rule corresponding to the target line synchronizing signal is the same as the data transmitting rule corresponding to the MIPI line synchronizing signal.
In this step, the process of determining the target horizontal synchronizing signal according to the MIPI horizontal synchronizing signal is a process of clock domain crossing synchronization, and the MIPI horizontal synchronizing signal is synchronized to the target video clock under the video clock set by the MIPI protocol. Specifically, 2-level pipelining may be directly performed, of course, this step is only one implementation manner for determining the target line synchronization signal according to the MIPI line synchronization signal, and in practical application, the step may also be implemented by other implementation manners, and this embodiment does not limit a specific synchronization manner.
Step 103: and determining a first pulse number of clock pulses sent by the target video clock within a first time length and a second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal.
After the target horizontal synchronizing signal is determined, then, the time length determined by any two adjacent rising edges in the target horizontal synchronizing signal is counted, in this embodiment, the time length determined by any two rising edges is referred to as a first time length, and since one rising edge in the target horizontal synchronizing signal represents the time when the MIPI sends a line of data, the time length between two adjacent rising edges in the target horizontal synchronizing signal represents the time length when the MIPI sends a line of data. Because the time length of transmitting one line of data by the MIPI is the same as the time length of transmitting one line of data by the HDMI, the first time length can be regarded as the time length of transmitting one line of data by the HDMI, and the first pulse number of the clock pulse of the target video clock and the second pulse number of the clock pulse of the video clock required by the HDMI in the first time length are determined.
The first pulse number in the first duration can be obtained by counting the number of clock pulses contained in the target video clock corresponding to two adjacent rising edges in the target line synchronization signal; the second number of pulses of the video clock required by the HDMI is related to the resolution required by the display to play video, and the higher the required resolution is, the more the second number of pulses of the video clock required by the HDMI is, for example, when the required resolution of the display is 720P, the frequency of the video clock required by the HDMI is 74.25MHZ, and the second number of pulses of the video clock required by the HDMI is 1650.
Step 104: and adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the first pulse number sent by the target video clock in the first duration meets the preset number.
After the first pulse number of the target video clock and the second pulse number of the video clock required by the HDMI are obtained, comparing the first pulse number with the second pulse number, and adjusting the frequency of the target video clock according to the comparison result so that the first pulse number in the first duration meets the preset number.
Specifically, the process of adjusting the frequency of the target video clock according to the comparison result may include steps a1 to a 2:
step A1: and if the number of the first pulses is larger than that of the second pulses, reducing the frequency of the target video clock.
If the comparison result shows that the frequency of the target video clock is greater than the frequency of the video clock required by the HDMI, the frequency of the target video clock is reduced in this step until the first number of pulses in the first duration meets the preset number, and the preset number in this step is any value within a range centered on the number of pulses required by the HDMI, for example, if the number of pulses of the video clock required by the HDMI is 1650, the preset number in this step may be any value within a range of [1640,1660 ]. Of course, in practical applications, the preset number may also be set to other values, and the preset number is not specifically limited in this embodiment.
Step A2: and if the number of the first pulses is less than the number of the second pulses, increasing the frequency of the target video clock.
If the comparison result shows that the number of the first pulses is smaller than the number of the second pulses, the frequency of the target video clock is smaller than the frequency of the video clock required by the HDMI, and therefore the frequency of the target video clock is increased in the step until the number of the first pulses in the first duration meets the preset number.
Step 105: and determining the HDMI line synchronizing signal required by the HDMI to transmit each line of data according to the adjusted video clock.
In the multimedia device, after the MIPI transmits a line of data, the line of data is transmitted to the display through the HDMI, and therefore, in this step, the video format generation module in the multimedia device generates an HDMI line synchronization signal according to the target line synchronization signal.
In practical application, the time when the MIPI sends one line of data, that is, the time when the MIPI buffers one line of data, is a fixed value, and the time when the MIPI buffers one line of data is the time when the HDMI sends one line of data, therefore, the time interval between the time when the MIPI sends one line of data and the time when the HDMI sends one line of data is the time when the MIPI buffers one line of data, and therefore, the rising edges in the HDMI line synchronization signal in this step correspond to the rising edges in the destination line synchronization signal one by one.
Step 106: and adjusting the frequency of the adjusted target video clock according to the third pulse number of the clock pulses of the adjusted video clock in the second duration and the fourth pulse number of the clock pulses required by the HDMI in the second duration, so that the number of the clock pulses sent by the current adjusted target video clock in the second duration is the same as the fourth pulse number, and taking the current adjusted target video clock as the video clock according to which the HDMI sends data, wherein the second duration is the duration from the time when the MIPI sends one line of data according to the MIPI line synchronization signal to the time when the HDMI sends one line of data according to the HDMI line synchronization signal.
Since the target line synchronizing signal corresponds to the rising edge of the HDMI line synchronizing signal, and both MIPI and HDMI transmit a line of data according to the rising edge. In this step, a time period from the MIPI sending out a frame of data according to the MIPI line synchronization signal to the HDMI sending out the frame of data according to the HDMI frame synchronization signal is called a second time period, and then, a third number of pulses sent out by the target video clock after the frequency is adjusted within the second time period and a fourth number of pulses of the video clock required by the HDMI are determined.
Since the second duration is the time it takes the MIPI to cache a line of data, the second duration is independent of the frequency of the target video clock and is a fixed value. Therefore, in this step, the relationship between the frequency of the target video clock after the frequency adjustment and the frequency of the video clock required by the HDMI is determined by comparing the third pulse number and the fourth pulse number of the video clock after the frequency adjustment within the second duration. And adjusting the frequency of the target video clock after the frequency is adjusted in real time according to the judgment result, so that the number of the third pulses and the number of the fourth pulses of the video clock after the frequency is adjusted currently in the second time length are the same.
Specifically, the process of adjusting the video clock frequency after the frequency adjustment may include steps B1 to B2:
step B1: and if the number of the third pulses is larger than the number of the fourth pulses in the second duration, reducing the frequency of the video clock after the frequency is adjusted in real time.
According to the comparison result of the number of the third pulses and the number of the fourth pulses after the frequency is adjusted in the second duration, if the number of the third pulses after the frequency is adjusted in the second duration is larger than the number of the fourth pulses, it is indicated that the frequency of the video clock after the frequency is adjusted is larger than the frequency of the video clock required by the HDMI, and therefore the frequency of the video clock after the frequency is adjusted is reduced in the step until the number of the third pulses after the frequency is adjusted currently in the second duration is the same as the number of the fourth pulses.
Step B2: and if the number of the third pulses is less than the number of the fourth pulses in the second duration, increasing the frequency of the video clock after the frequency is adjusted in real time.
If the third pulse number of the video clock with the frequency adjusted in the second duration is smaller than the fourth pulse number, it indicates that the frequency of the video clock with the frequency adjusted is smaller than the frequency of the video clock required by the HDMI, and therefore in this step, the frequency of the video clock with the frequency adjusted is increased until the third pulse number with the current frequency adjusted in the second duration is the same as the fourth pulse number.
The video clock required by the HDMI is generated through the steps 101 to 106, and in practical applications, the number of the third pulses in the second duration may not be guaranteed to be the same as the number of the fourth pulses in real time through the steps 101 to 106. In order to make the number of the third pulses in the second duration be the same as the number of the fourth pulses required by the HDMI in real time, in the process that the HDMI sends data to the display according to the clock frequency of the generated target video clock, the embodiment may also count the number of the third pulses and the number of the fourth pulses in the second duration in real time, and determine whether the number of the third pulses is the same as the number of the fourth pulses in real time, and when the number of the third pulses is different from the number of the fourth pulses, adjust the frequency of the generated target video clock so that the number of the third pulses in the second duration is the same as the number of the fourth pulses in real time, even if the frequency of the generated target video clock is kept at the frequency required by the HDMI.
In this embodiment, a first time length between any two adjacent rising edges in the target line synchronizing signal represents time for transmitting one line of data by the MIPI, and since the time length for transmitting one line of data by the MIPI is the same as the time length for transmitting one line of data by the HDMI, the first time length can be regarded as the time length for transmitting one line of data by the HDMI, the speed of the frequency of the target video clock relative to the frequency of the video clock required by the HDMI is determined by comparing a first number of pulses transmitted by the target video clock in the first time length with a second number of pulses required by the HDMI, the first number of pulses transmitted by the target video clock after the frequency is adjusted in the first time length satisfies a preset number by adjusting the frequency of the target video clock, and at this time, the frequency of the target video clock is close to the frequency of the video clock required by the HDMI; in a second time length of a line of data converted from MIPI input to HDMI output, the number of third pulses sent by the target video clock after the frequency is adjusted and the number of fourth pulses required by the HDMI reflect the speed of the frequency of the target video clock after the frequency is adjusted relative to the frequency of the video clock required by the HDMI, the number of the third pulses sent by the target video clock with the currently adjusted frequency in the second time length is equal to the number of the fourth pulses through the adjustment of the frequency of the target video clock with the adjusted frequency, because the number of the pulses of the video clock in the fixed second duration represents the frequency of the video clock, the number of the pulses of the target video clock with the currently adjusted frequency in the second duration is the same as the number of the fourth pulses required by the HDMI, which indicates that the frequency of the target video clock with the currently adjusted frequency is the frequency of the video clock required by the HDMI, and the video clock at this time is the video clock required by the HDMI.
Referring to fig. 2, a flowchart of another embodiment of a method for generating a video clock according to the present application is shown, which may specifically include the following steps:
step 201: the method comprises the steps of obtaining MIPI line synchronizing signals according to which the MIPI sends data of each line and MIPI frame synchronizing signals according to which the MIPI sends data of each frame, wherein the MIPI line synchronizing signals are used for representing data sending rules of the MIPI sending data of each line, and the MIPI frame synchronizing signals are used for representing data sending rules of the MIPI sending data of each frame.
In this step, a process of acquiring the MIPI row synchronization signal according to which the MIPI transmits each row of data is the same as the corresponding process in step 101 in the embodiment shown in fig. 1, and the specific process may refer to step 101, which is not described herein again. The process of acquiring the MIPI frame synchronization signal is similar to the process of acquiring the MIPI line synchronization signal, and specifically includes: the MIPI frame synchronization signal is generated by the synchronization signal generation module according to the frame synchronization short packet analyzed by the MIPI analysis module, and in this embodiment, the MIPI frame synchronization signal is obtained from the synchronization signal generation module, and the MIPI frame synchronization signal is used to represent a data transmission rule corresponding to each frame of data sent by the MIPI.
Step 202: according to a data sending rule corresponding to the MIPI line synchronous signal, determining a target line synchronous signal required by the MIPI to send each line of data according to the clock frequency of a target video clock, wherein the target video clock is a video clock initially set in the multimedia equipment; and the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal.
Step 203: and determining a first pulse number of clock pulses sent by the target video clock within a first time length and a second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal.
Step 204: and adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the first pulse number sent by the target video clock in the first duration meets the preset number.
The specific implementation of the above steps 202 to 204 is the same as the implementation of the steps 102 to 104 in the embodiment corresponding to fig. 1, and the specific process may refer to the steps 102 to 104, which is not described herein again.
Step 205: and determining an HDMI frame synchronization signal required by the HDMI to transmit each frame of data according to the adjusted video clock.
In the multimedia device, after the MIPI sends a frame of data, the frame of data is sent to the display through the HDMI, and therefore, in this step, the video format generation module in the multimedia device generates an HDMI frame synchronization signal according to the MIPI frame synchronization signal.
In practical application, the time when the MIPI sends a frame of data, that is, the time when the MIPI buffers a frame of data, is a fixed value, and the time when the MIPI buffers a frame of data is the time when the HDMI sends a frame of data, therefore, the time interval between the time when the MIPI sends a frame of data and the time when the HDMI sends a frame of data is the time when the MIPI buffers a frame of data, and therefore, the rising edges in the HDMI frame synchronization signal in this step correspond to the rising edges in the MIPI frame synchronization signal one by one.
Step 206: and adjusting the frequency of the adjusted target video clock according to the fifth pulse number of the clock pulses of the adjusted target video clock in the third time length and the sixth pulse number of the clock pulses required by the HDMI in the third time length, so that the number of the clock pulses sent by the current adjusted target video clock in the third time length is the same as the sixth pulse number, and using the current adjusted target video clock as a video clock according to which the HDMI sends data, wherein the third time length is the time length from sending a frame of data according to the MIPI frame synchronization signal to sending a frame of data according to the HDMI frame synchronization signal.
In the step, a time length from the time when the MIPI sends one frame of data to the time when the HDMI sends the frame of data is called as a third time length. In this embodiment, for convenience of description, the number of clock pulses of the target video clock adjusted in the third duration is referred to as a fifth number of pulses, and the number of clock pulses required by the HDMI in the third duration is referred to as a sixth number of pulses.
Specifically, the process of adjusting the adjusted target video clock according to the fifth pulse number and the sixth pulse number may include steps C1 to C2:
step C1: and if the number of the fifth pulses in the third duration is greater than the number of the sixth pulses, reducing the frequency of the video clock after the frequency is adjusted.
According to the comparison result of the fifth pulse number and the sixth pulse number after the frequency is adjusted in the third duration, if the fifth pulse number after the frequency is adjusted in the third duration is larger than the sixth pulse number, the frequency of the video clock after the frequency is adjusted is larger than the frequency of the video clock required by the HDMI, so that the frequency of the video clock after the frequency is adjusted is reduced in real time in the step until the fifth pulse number after the frequency is adjusted in the third duration in due period is the same as the sixth pulse number.
Step C2: and if the number of the fifth pulses in the third duration is less than the number of the sixth pulses, increasing the frequency of the target video clock after the frequency is adjusted.
If the fifth pulse number of the target video clock with the frequency adjusted in the third duration is smaller than the sixth pulse number, it indicates that the frequency of the target video clock with the frequency adjusted is smaller than the frequency of the video clock required by the HDMI, and therefore in this step, the frequency of the target video clock with the frequency adjusted is increased until the fifth pulse number with the current frequency adjusted in the third duration is the same as the sixth pulse number.
The video clock required by the HDMI is generated through the steps 201 to 206, and in practical applications, the number of the fifth pulses in the third duration may not be guaranteed to be the same as the number of the sixth pulses in real time through the steps 201 to 206. In order to make the number of the fifth pulses in the third duration be the same as the number of the sixth pulses required by the HDMI in real time, in the process of sending data by the HDMI according to the generated target video clock and the HDMI frame synchronization signal, the present embodiment may also count the number of the fifth pulses and the number of the sixth pulses in the third duration in real time, and determine whether the number of the fifth pulses is the same as the number of the sixth pulses in real time, and when the number of the fifth pulses is different from the number of the sixth pulses, adjust the frequency of the current target video clock, so that the number of the fifth pulses in the third duration is the same as the number of the sixth pulses in real time, even if the frequency of the current target video clock is kept at the frequency required by the HDMI.
In this embodiment, a first time length between any two adjacent rising edges in the target line synchronizing signal represents time for transmitting one line of data by the MIPI, and since the time length for transmitting one line of data by the MIPI is the same as the time length for transmitting one line of data by the HDMI, the first time length can be regarded as the time length for transmitting one line of data by the HDMI, the speed of the frequency of the target video clock relative to the frequency of the video clock required by the HDMI is determined by comparing a first number of pulses transmitted by the target video clock in the first time length with a second number of pulses required by the HDMI, the first number of pulses transmitted by the target video clock after the frequency is adjusted in the first time length satisfies a preset number by adjusting the frequency of the target video clock, and at this time, the frequency of the target video clock is close to the frequency of the video clock required by the HDMI; in a second time length of a frame of data converted from MIPI input to HDMI output, the number of third pulses sent by the target video clock after the frequency is adjusted and the number of fourth pulses required by HDMI reflect the speed of the frequency of the target video clock after the frequency is adjusted relative to the frequency of the video clock required by HDMI, the number of the third pulses sent by the target video clock with the currently adjusted frequency in the second time length is equal to the number of the fourth pulses through the adjustment of the frequency of the target video clock with the adjusted frequency, because the number of the pulses of the video clock in the fixed second duration represents the frequency of the video clock, the number of the pulses of the target video clock with the currently adjusted frequency in the second duration is the same as the number of the fourth pulses required by the HDMI, which indicates that the frequency of the target video clock with the currently adjusted frequency is the frequency of the video clock required by the HDMI, and the video clock at this time is the video clock required by the HDMI.
Referring to fig. 3, a schematic structural diagram of an embodiment of a video clock generation apparatus according to the present application is shown, which may specifically include:
a first obtaining unit 301, configured to obtain an MIPI row synchronization signal according to which each row of data is sent by the MIPI, where the MIPI row synchronization signal is used to represent a data sending rule of each row of data sent by the MIPI;
a first determining unit 302, configured to determine, according to a data sending rule corresponding to the MIPI line synchronization signal, a target line synchronization signal required by the MIPI to send each line of data according to a clock frequency of a target video clock, where the target video clock is a video clock initially set in the multimedia device; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
a second determining unit 303, configured to determine, based on a first time length between two adjacent rising edges of the target line synchronizing signal, a first pulse number of clock pulses sent by the target video clock within the first time length, and a second pulse number of clock pulses required by the HDMI within the first time length;
a first adjusting unit 304, configured to adjust a clock frequency of the target video clock according to the first number of pulses and the second number of pulses, so that the number of first pulses sent by the target video clock in the first duration satisfies a preset number;
the first adjusting unit 304 may include:
the first frequency adjusting subunit is used for reducing the frequency of the target video clock under the condition that the first pulse number is greater than the second pulse number;
and a second frequency adjustment subunit, configured to increase the frequency of the target video clock when the first number of pulses is smaller than the second number of pulses.
A third determination unit 305 configured to determine an HDMI line synchronization signal required for the HDMI to transmit each line of data according to the adjusted video clock;
a second adjusting unit 306, configured to adjust the frequency of the adjusted target video clock according to a third number of clock pulses of the adjusted video clock in the second duration and a fourth number of clock pulses required by the HDMI in the second duration, so that the number of clock pulses sent by the current adjusted target video clock in the second duration is the same as the fourth number of pulses, and the current adjusted target video clock is used as a video clock according to which the HDMI sends data, where the second duration is a duration from sending one line of data by the MIPI according to the MIPI line synchronization signal to sending one line of data by the HDMI according to the HDMI line synchronization signal.
Wherein, the second adjusting unit 306 may include:
the first adjusting subunit is configured to reduce the frequency of the video clock after the frequency adjustment if the number of the third pulses is greater than the number of the fourth pulses within the second duration;
and the second adjusting subunit is configured to increase the frequency of the video clock after the frequency adjustment if the number of the third pulses is smaller than the number of the fourth pulses within the second duration.
The embodiment of the device can also comprise:
a counting unit 307, configured to count a third pulse number and a fourth pulse number within a second duration of the currently adjusted target video clock;
a determining unit 308, configured to determine whether the third pulse number is the same as the fourth pulse number;
a third adjusting unit 309, configured to adjust the frequency of the currently adjusted target video clock when the third pulse number is different from the fourth pulse number, so that the number of clock pulses sent by the currently adjusted target video clock in the second duration is the same as the fourth pulse number.
Referring to fig. 4, a schematic structural diagram of another embodiment of the video clock generation apparatus of the present application is shown, which may specifically include:
a second obtaining unit 401, configured to obtain an MIPI line synchronization signal according to which each line of data is sent by the MIPI, and an MIPI frame synchronization signal according to which each frame of data is sent by the MIPI, where the MIPI line synchronization signal is used to represent a data sending rule of each line of data sent by the MIPI, and the MIPI frame synchronization signal is used to represent a data sending rule of each frame of data sent by the MIPI;
a first determining unit 402, configured to determine, according to a data sending rule corresponding to the MIPI line synchronization signal, a target line synchronization signal required by the MIPI to send each line of data according to a clock frequency of a target video clock, where the target video clock is a video clock initially set in the multimedia device; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
a second determining unit 403, configured to determine, based on a first time length between two adjacent rising edges of the target line synchronizing signal, a first pulse number of clock pulses sent by the target video clock within the first time length, and a second pulse number of clock pulses required by the HDMI within the first time length;
a first adjusting unit 404, configured to adjust a clock frequency of the target video clock according to the first number of pulses and the second number of pulses, so that the number of first pulses sent by the target video clock in the first duration satisfies a preset number;
the first adjusting unit 404 may include:
the first frequency adjusting subunit is used for reducing the frequency of the target video clock under the condition that the first pulse number is greater than the second pulse number;
and a second frequency adjustment subunit, configured to increase the frequency of the target video clock when the first number of pulses is smaller than the second number of pulses.
A fourth determination unit 405, configured to determine an HDMI frame synchronization signal required for the HDMI to transmit each frame of data according to the adjusted video clock;
a fourth adjusting unit 406, configured to adjust the frequency of the adjusted target video clock according to the third number of clock pulses of the adjusted video clock in the third duration and the fourth number of clock pulses required by the HDMI in the third duration, so that the number of clock pulses sent by the current adjusted target video clock in the third duration is the same as the fourth number of pulses, and the current adjusted target video clock is used as the video clock according to which the HDMI sends data, where the third duration is a duration from sending a frame of data by the MIPI according to the MIPI frame synchronization signal to sending a frame of data by the HDMI according to the HDMI frame synchronization signal.
Wherein, the fourth adjusting unit 406 may include:
a third adjusting subunit, configured to reduce the frequency of the adjusted target video clock if the number of fifth pulses is greater than the number of sixth pulses within a third duration;
and the fourth adjusting subunit is used for increasing the frequency of the adjusted target video clock if the number of the fifth pulses in the third duration is less than the number of the sixth pulses.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A method for generating a video clock, comprising:
acquiring MIPI line synchronous signals according to which MIPI transmits each line of data, wherein the MIPI line synchronous signals are used for representing the data transmission rule of the MIPI for transmitting each line of data;
according to the data sending rule corresponding to the MIPI line synchronous signal, determining a target line synchronous signal required by the MIPI to send each line of data according to the clock frequency of a target video clock, wherein the target video clock is a video clock initially set in the multimedia equipment; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
determining a first pulse number of clock pulses sent by the target video clock within a first time length and a second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the number of first pulses sent by the target video clock in a first time duration meets a preset number;
determining HDMI line synchronizing signals required by each line of data transmitted by the HDMI according to the adjusted target video clock;
and adjusting the frequency of the adjusted target video clock according to the third pulse number of the clock pulses of the adjusted target video clock in the second time length and the fourth pulse number of the clock pulses required by the HDMI in the second time length, so that the number of the clock pulses sent by the current adjusted target video clock in the second time length is the same as the fourth pulse number, and taking the current adjusted target video clock as the video clock according to which the HDMI sends data, wherein the second time length is the time length from the MIPI sending of one line of data according to the MIPI line synchronizing signal to the HDMI sending of the one line of data according to the HDMI line synchronizing signal.
2. The method of claim 1, wherein the adjusting the frequency of the adjusted target video clock according to the third number of clock pulses of the adjusted target video clock in the second duration and the fourth number of clock pulses required by the HDMI in the second duration comprises:
if the number of the third pulses is larger than the number of the fourth pulses within the second duration, reducing the frequency of the video clock after the frequency adjustment;
and if the third pulse number is smaller than the fourth pulse number in the second duration, increasing the frequency of the video clock after the frequency adjustment.
3. The method according to claim 1, wherein the step of setting the currently adjusted target video clock as the video clock according to which the HDMI transmission data is received further comprises:
counting the number of third pulses and the number of fourth pulses within the second duration in the currently adjusted target video clock;
judging whether the number of the third pulses is the same as that of the fourth pulses;
and when the number of the third pulses is different from that of the fourth pulses, adjusting the frequency of the currently adjusted target video clock, so that the number of clock pulses sent by the currently adjusted target video clock in the second time duration is the same as that of the fourth pulses.
4. A method for generating a video clock, comprising:
acquiring MIPI (mobile industry processor interface) line synchronous signals according to which MIPI transmits each line of data and MIPI frame synchronous signals according to which MIPI transmits each frame of data, wherein the MIPI line synchronous signals are used for representing the data transmission rule of the MIPI for transmitting each line of data, and the MIPI frame synchronous signals are used for representing the data transmission rule of the MIPI for transmitting each frame of data;
according to the data sending rule corresponding to the MIPI line synchronous signal, determining a target line synchronous signal required by the MIPI to send each line of data according to the clock frequency of a target video clock, wherein the target video clock is a video clock initially set in the multimedia equipment; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
determining a first pulse number of clock pulses sent by the target video clock within a first time length and a second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the number of first pulses sent by the target video clock in a first time duration meets a preset number;
determining an HDMI frame synchronization signal required by the HDMI to send each frame of data according to the adjusted target video clock;
adjusting the frequency of the adjusted target video clock according to the fifth pulse number of the clock pulses of the adjusted target video clock in a third time length and the sixth pulse number of the clock pulses required by the HDMI in the third time length, so that the fifth pulse number and the sixth pulse number sent by the current adjusted target video clock in the third time length are the same, and the current adjusted target video clock is used as the video clock according to which the HDMI sends data, wherein the third time length is the time length from MIPI sending a frame of data according to the MIPI frame synchronization signal to HDMI sending the frame of data according to the HDMI frame synchronization signal.
5. The method of claim 4, wherein the adjusting the frequency of the adjusted target video clock according to a fifth number of clock pulses of the adjusted target video clock in a third duration and a sixth number of clock pulses required by the HDMI in the third duration comprises:
if the fifth pulse number is larger than the sixth pulse number within the third duration, reducing the frequency of the adjusted target video clock;
and if the fifth pulse number is smaller than the sixth pulse number in the third duration, increasing the frequency of the adjusted target video clock.
6. The method according to any one of claims 1 to 5, wherein the adjusting the clock frequency of the target video clock according to the first number of pulses and the second number of pulses comprises:
if the number of the first pulses is larger than the number of the second pulses, reducing the frequency of the target video clock;
and if the number of the first pulses is less than the number of the second pulses, increasing the frequency of the target video clock.
7. An apparatus for generating a video clock, comprising:
the device comprises a first acquisition unit, a second acquisition unit and a control unit, wherein the first acquisition unit is used for acquiring MIPI (mobile industry processor interface) line synchronous signals according to which MIPI transmits data of each line, and the MIPI line synchronous signals are used for representing the data transmission rule of the MIPI for transmitting the data of each line;
a first determining unit, configured to determine, according to the data sending rule corresponding to the MIPI line synchronization signal, a target line synchronization signal required by the MIPI to send each line of data according to a clock frequency of a target video clock, where the target video clock is a video clock initially set in the multimedia device; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
the second determining unit is used for determining the first pulse number of clock pulses sent by the target video clock within the first time length and the second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
the first adjusting unit is used for adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the first pulse number sent by the target video clock in a first duration meets a preset number;
the third determining unit is used for determining that the HDMI sends the HDMI line synchronizing signal required by each line of data according to the adjusted target video clock;
and a second adjusting unit, configured to adjust the frequency of the adjusted target video clock according to a third pulse number of clock pulses of the adjusted target video clock in a second duration and a fourth pulse number of clock pulses required by the HDMI in the second duration, so that the number of clock pulses sent by the current adjusted target video clock in the second duration is the same as the fourth pulse number, and the current adjusted target video clock is used as a video clock according to which the HDMI sends data, where the second duration is a duration between sending a line of data according to the MIPI line synchronization signal and sending the line of data according to the HDMI line synchronization signal.
8. The apparatus of claim 7, wherein the second adjusting unit comprises:
a first adjusting subunit, configured to reduce the frequency of the video clock after the frequency adjustment if the number of the third pulses is greater than the number of the fourth pulses within the second duration;
and the second adjusting subunit is configured to increase the frequency of the video clock after the frequency adjustment if the third number of pulses is smaller than the fourth number of pulses within the second duration.
9. The apparatus of claim 7, further comprising:
the counting unit is used for counting the number of third pulses and the number of fourth pulses within the second duration in the currently adjusted target video clock;
the judging unit is used for judging whether the number of the third pulses is the same as that of the fourth pulses;
and the third adjusting unit is used for adjusting the frequency of the currently adjusted target video clock when the number of the third pulses is different from the number of the fourth pulses, so that the number of clock pulses sent by the currently adjusted target video clock in the second time length is the same as the number of the fourth pulses.
10. An apparatus for generating a video clock, comprising:
a second obtaining unit, configured to obtain an MIPI line synchronization signal according to which each line of data is sent by MIPI, and an MIPI frame synchronization signal according to which each frame of data is sent by MIPI, where the MIPI line synchronization signal is used to characterize a data sending rule of each line of data sent by MIPI, and the MIPI frame synchronization signal is used to characterize a data sending rule of each frame of data sent by MIPI;
a first determining unit, configured to determine, according to the data sending rule corresponding to the MIPI line synchronization signal, a target line synchronization signal required by the MIPI to send each line of data according to a clock frequency of a target video clock, where the target video clock is a video clock initially set in the multimedia device; the data transmission rule corresponding to the target line synchronizing signal is the same as the data transmission rule corresponding to the MIPI line synchronizing signal;
the second determining unit is used for determining the first pulse number of clock pulses sent by the target video clock within the first time length and the second pulse number of clock pulses required by the HDMI within the first time length based on the first time length between two adjacent rising edges of the target line synchronizing signal;
the first adjusting unit is used for adjusting the clock frequency of the target video clock according to the first pulse number and the second pulse number, so that the first pulse number sent by the target video clock in a first duration meets a preset number;
the fourth determining unit is used for determining the HDMI frame synchronizing signal required by the HDMI to send each frame of data according to the adjusted target video clock;
and a fourth adjusting unit, configured to adjust the frequency of the adjusted target video clock according to a fifth pulse number of clock pulses of the adjusted target video clock in a third duration and a sixth pulse number of clock pulses required by the HDMI in the third duration, so that the number of clock pulses sent by the current adjusted target video clock in the third duration is the same as the sixth pulse number, and the current adjusted target video clock is used as the video clock according to which the HDMI sends data, where the third duration is a duration between sending a frame of data according to the MIPI frame synchronization signal and sending the frame of data according to the HDMI frame synchronization signal.
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| CN102088590A (en) * | 2009-12-03 | 2011-06-08 | 北京彩讯科技股份有限公司 | Method for multiplexing transmission channel by multi-channel real-time images |
| CN101783868B (en) * | 2010-03-24 | 2012-01-11 | 北京邮电大学 | Method for transmitting user data by adopting video synchronizing signal lines |
| US20110310980A1 (en) * | 2010-06-22 | 2011-12-22 | Qualcomm Mems Technologies, Inc. | Apparatus and methods for processing frames of video data across a display interface using a block-based encoding scheme and a tag id |
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