CN107181564B - Signal synthesis method and device based on lookup table - Google Patents
Signal synthesis method and device based on lookup table Download PDFInfo
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- CN107181564B CN107181564B CN201710231836.6A CN201710231836A CN107181564B CN 107181564 B CN107181564 B CN 107181564B CN 201710231836 A CN201710231836 A CN 201710231836A CN 107181564 B CN107181564 B CN 107181564B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0015—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the adaptation strategy
- H04L1/0016—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the adaptation strategy involving special memory structures, e.g. look-up tables
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Abstract
The invention relates to the technical field of signal processing, and discloses a signal synthesis method and device based on a lookup table. One of the signal synthesis methods comprises: inputting each signal in a target signal source into a preset lookup table as a bit address, wherein the target signal source comprises M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of the synthesized signal corresponding to each address value, the code period of the signals to be synthesized is the same as the period of the main code clock signals, the phases of the main code clock signals are different from each other, M is an integer greater than or equal to 2, N is an integer greater than or equal to 1, and 2 is an integer greater than or equal to 2N‑1＜M≤2N(ii) a Determining a target address value of the lookup table according to each signal in the target signal source; and determining a target composite signal from the lookup table according to the target address value. The process does not need additional logic control devices, and meanwhile, the consumption of storage space is small.
Description
Technical Field
The invention relates to the technical field of signal processing, in particular to a signal synthesis method and device based on a lookup table.
Background
Because the satellite signal has the characteristics of multiple signal branches, complex modulation mode and the like, the synthesis of the satellite signal with subcarrier or requiring constant envelope output is usually realized by adopting a lookup table mode.
Currently, for a plurality of satellite signals, the following two methods are generally used for synthesizing the plurality of satellite signals (assuming that the plurality of satellite signals include a signal one and a signal two): (1) and finally, a time slot switch is utilized to carry out odd-even time slot switching on the outputs of the two lookup tables so as to complete the output of the composite code. (2) And the first signal and the second signal are used as address codes to look up corresponding composite codes from an ultra-long look-up table and output.
The above-mentioned method (1) has less consumption of the memory space, but it requires the time slot switch as a logic control device, and the design is complicated. Although the above-mentioned method (2) does not require an additional logic control device, it consumes a large amount of memory space. It can be seen that how to find a signal synthesis method that consumes less memory space without additional logic control devices becomes a problem to be considered by those skilled in the art.
Disclosure of Invention
The invention provides a signal synthesis method and a signal synthesis device based on a lookup table, and aims to provide a signal synthesis method which is low in consumption of storage space and does not need to be additionally provided with an additional logic control device.
A first aspect of an embodiment of the present invention provides a signal synthesis method based on a lookup table, including:
inputting each signal in a target signal source into a preset lookup table as a bit address, wherein the target signal source comprises M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of the synthesized signal corresponding to each address value, the code period of the signals to be synthesized is the same as the period of the main code clock signals, the phases of the main code clock signals are different from each other, M is an integer greater than or equal to 2, N is an integer greater than or equal to 1, and 2 is an integer greater than or equal to 2N-1＜M≤2N；
Determining a target address value of the lookup table according to each signal in the target signal source;
and determining a target composite signal from the lookup table according to the target address value.
A second aspect of the embodiments of the present invention provides a signal synthesis apparatus based on a lookup table, including:
an address input module, configured to input each signal in a target signal source into a preset lookup table as a bit address, where the target signal source includes M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of a synthesized signal corresponding to each address value, a code period of the signal to be synthesized is the same as a period of the main code clock signal, phases of the main code clock signals are different from each other, and M is greater than or equal to MOr an integer of 2, N is an integer of 1 or more, 2N-1＜M≤2N；
The address determination module is used for determining a target address value of the lookup table according to each signal in the target signal source;
and the synthetic signal determining module is used for determining a target synthetic signal from the lookup table according to the target address value.
In the embodiment of the invention, each signal in a target signal source is input into a preset lookup table as a one-bit address bit, the target signal source comprises M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of the synthesized signal corresponding to each address value, the code period of the signals to be synthesized is the same as the period of the main code clock signals, the phases of the main code clock signals are different from each other, M is an integer greater than or equal to 2, N is an integer greater than or equal to 1, and 2N-1＜M≤2N(ii) a Determining an address value of the lookup table according to the state of each signal in the target signal source; and determining a target synthesis signal from the lookup table according to the address value. In the process, the main code clock signal is also used as an address bit to be input into the lookup table, and the corresponding lookup table address value is correspondingly switched along with the state switching of the main code clock, so that the amplitude values of the synthetic signals respectively corresponding to different main code clock states can be determined, and the odd-even time slot switching function similar to that of a time slot switch is realized. In addition, compared with the traditional method for synthesizing signals by using an ultra-long lookup table, the lookup table provided by the application has smaller consumption of the total storage space. Therefore, the signal synthesis method based on the lookup table provided by the embodiment of the invention does not need to add an additional logic control device, and simultaneously has smaller consumption on the storage space.
Drawings
FIG. 1A is a flowchart of a first embodiment of a method for signal synthesis based on a lookup table according to an embodiment of the present invention;
FIG. 1B is a flow chart of one embodiment of step 103 of FIG. 1A;
FIG. 1C is a schematic diagram of a signal synthesis method based on a lookup table shown in FIG. 1A in a practical application scenario;
FIG. 1D is a schematic diagram of waveforms of respective signals in the application scenario shown in FIG. 1C;
FIG. 2A is a flowchart of a second embodiment of a signal synthesis method based on a lookup table according to an embodiment of the present invention;
FIG. 2B is a schematic diagram of the signal synthesis method based on the lookup table shown in FIG. 2A in a practical application scenario;
FIG. 2C is a schematic diagram of waveforms of respective signals in the application scenario shown in FIG. 2B;
fig. 3 is a block diagram of an embodiment of a signal synthesis apparatus based on a lookup table according to an embodiment of the present invention.
Detailed Description
The invention provides a signal synthesis method and a signal synthesis device based on a lookup table, and aims to provide a signal synthesis method which is low in consumption of storage space and does not need to be additionally provided with an additional logic control device.
In order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the embodiments described below are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1A, a first embodiment of a signal synthesis method based on a lookup table according to the present invention includes:
101. inputting each signal in a target signal source into a preset lookup table as a bit address, wherein the target signal source comprises M signals to be synthesized and N main code clock signals;
the target signal source refers to each input signal related to signal synthesis, and comprises M signals to be synthesized and N main code clock signals, wherein M is an integer greater than or equal to 2Number, N is an integer greater than or equal to 1, 2N-1＜M≤2N. The signal to be synthesized refers to a plurality of target source signals needing signal synthesis, and the code periods of the target source signals are the same. The master code clock signal is a clock signal corresponding to the signal to be synthesized, and the period of the master code clock signal is the same as the code period of the signal to be synthesized; if there are a plurality of master code clock signals, the phases of the master code clock signals are different from each other. And realizing time division multiplexing on the signals to be synthesized by utilizing different time slots of the main code clock to obtain the synthesized signals.
If there are 2 signals to be synthesized, the time zone needs to be divided into 2 time slots, each time slot transmits one of the signals to be synthesized, and because a single master code clock signal can complete the switching of 2 time slots, only 1 master code clock signal is needed. If there are 6 signals to be synthesized, i.e. M ═ 6, according to 2N-1＜6≤2NN-3 can be obtained, i.e. 3 master code clock signals are required; the 3 main code clock signals with different phases and the same period can divide the time into 2 at most3Each time slot can transmit 1 signal to be synthesized, and two extra time slot intervals can be used as redundancy.
And inputting each signal in the target signal source into a preset lookup table as one address bit, wherein the lookup table records the amplitude information of the synthesized signal corresponding to each address value, and the number of the address bits is the number of the signals in the target signal source. The amplitude information of the synthesized signal corresponding to each address value can be set and recorded in the lookup table in advance according to actual requirements, and the amplitude information of the corresponding synthesized signal can be output subsequently according to the value of the address value.
Further, the look-up table may be preset according to the following steps:
(1) determining a carrier period;
(2) dividing the carrier cycle into more than one time slot;
(3) and setting the amplitude information of the synthetic signal corresponding to each address value under each time slot, and recording the amplitude information in the lookup table.
When the signals to be synthesized are synthesized, carrier modulation may need to be performed, so the period of the adopted carrier signal is determined first. After the carrier period is determined, the carrier period is divided into more than one time slot, each time slot is a time interval, and the time length of each time slot can be the same or different. Specifically, the carrier cycle may be divided into 8 slots at equal intervals. After the time slot division of the carrier cycle is completed, the amplitude information of the synthesized signal corresponding to each address value under each time slot is set and recorded in the lookup table. The more the number of the time slot divisions is, the more the amplitude information recorded by the lookup table is, and since the amplitude information represents discrete values of the synthesized signal at different time points, the more sampling points of the synthesized signal obtained in a specified time period (one carrier period) are, the higher the resolution is.
102. Determining a target address value of the lookup table according to each signal in the target signal source;
in step 101, each signal of the target signal source is input into the look-up table as a bit of address bits, so that the address value of the look-up table is determined by the state of the respective signal of the target signal source. If the state of a signal in the target signal source changes, the target address value of the determined lookup table also changes correspondingly.
103. And determining a target composite signal from the lookup table according to the target address value.
After the target address value of the lookup table is determined, the amplitude information of the synthesized signal at the corresponding time is found from the lookup table according to the target address value, and then the synthesized signal output can be obtained.
Further, as shown in fig. 1B, if the lookup table sets amplitude information of the synthesized signal corresponding to each address value in each carrier timeslot, step 103 may specifically include:
1031. determining amplitude information of the synthesized signal at each moment from the lookup table according to the target address value and the target time slot at each moment;
according to the address value of the lookup table at the current moment and the carrier time slot in which the current moment is located, the amplitude information of the synthetic signal at the current moment can be correspondingly found out from the lookup table, and the amplitude information of the synthetic signal at each moment can be determined by using the same method.
1032. And performing signal reconstruction on the amplitude information of the synthetic signal at each moment to obtain the target synthetic signal.
Since the amplitude information of the synthesized signal is a plurality of discrete values, in order to obtain a continuous synthesized signal, signal reconstruction needs to be performed on the amplitude information of the synthesized signal at each time, so as to obtain a complete and continuous synthesized signal output.
In the embodiment of the invention, each signal in a target signal source is input into a preset lookup table as a one-bit address bit, the target signal source comprises M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of the synthesized signal corresponding to each address value, the code period of the signals to be synthesized is the same as the period of the main code clock signals, the phases of the main code clock signals are different from each other, M is an integer greater than or equal to 2, N is an integer greater than or equal to 1, and 2N-1＜M≤2N(ii) a Determining an address value of the lookup table according to the state of each signal in the target signal source; and determining a target synthesis signal from the lookup table according to the address value. In the process, the main code clock signal is also used as an address bit to be input into the lookup table, and the corresponding lookup table address value is correspondingly switched along with the state switching of the main code clock, so that the amplitude values of the synthetic signals respectively corresponding to different main code clock states can be determined, and the odd-even time slot switching function similar to that of a time slot switch is realized. In addition, compared with the traditional method for synthesizing signals by using an ultra-long lookup table, the lookup table provided by the application has smaller consumption of the total storage space. Therefore, the signal synthesis method based on the lookup table provided by the embodiment of the invention does not need to add an additional logic control device, and simultaneously has smaller consumption on the storage space.
For ease of understanding, a signal synthesis method based on a lookup table in the embodiment shown in fig. 1A is described below as a practical application scenario.
Referring to fig. 1C, a practical application scenario of the signal synthesis method based on the lookup table in the embodiment shown in fig. 1A is shown.
In fig. 1C, the target signal source includes 2 signals a and B to be synthesized, one master code clock signal Tm. The code periods of A and B are the same, and the period of Tm is the same as the code period. A. B and Tm are both input into a preset lookup table as 1 address bit, and a composite signal S is output. In addition, the signal synthesis process further comprises carrier modulation, and the period of the carrier Tc is Ts. The contents of the preset lookup table are shown in table 1:
TABLE 1
In the lookup table shown in table 1, a carrier period Ts is divided into 8 equally spaced time slots as an abscissa, a 3-bit lookup table address is used as an ordinate, and a specific value in each time slot of each address in the lookup table represents an amplitude of a corresponding synthesized signal, and can be assigned in advance according to actual requirements, and a current address and an amplitude of a corresponding synthesized signal in the current time slot are output at the current moment. Because the 1 bit address bit is the input main code clock signal, the corresponding lookup table address value is correspondingly switched along with the state switching of the main code clock, so that the synthetic signal amplitude values respectively corresponding to different main code clock states can be determined, and the odd-even time slot switching function similar to a time slot switch is realized.
Fig. 1D shows a waveform diagram of signals a and B to be synthesized, a master code clock Tm, a synthesized signal S, and a carrier Tc, corresponding to fig. 1C. As can be seen from fig. 1D, the period of the carrier Tc is half of the code period of the signal to be synthesized, and the synthesized signal S sequentially outputs the respective signal codes of a and B, i.e., a1, B1, a2, B2 … …, accordingly, in accordance with the odd-even slot switching of the main code clock Tm.
Therefore, in the application scene, the time division synthesis of the multipath signals can be carried out on the basis of no time slot switch by inputting the main code clock signal into a preset lookup table as an address bit. In addition, for more signals to be synthesized, the same method can be used for synthesizing the signals by only increasing the appropriate number of master code clock signals with different phases.
Referring to fig. 2A, a second embodiment of a signal synthesis method based on a lookup table according to the present invention includes:
201. inputting each signal in a target signal source into a preset lookup table as a bit address, wherein the target signal source comprises M signals to be synthesized, N main code clock signals and K selection signals;
the lookup table records amplitude information of a synthesized signal corresponding to each address value, the code period of the signal to be synthesized is the same as the period of the main code clock signal, the phases of the main code clock signals are different from each other, M is an integer greater than or equal to 4, N and K are integers greater than or equal to 1, and 2N-1＜M≤2N(ii) a The M signals to be synthesized are divided into L groups of signals to be synthesized, the number of the signals in each group of signals to be synthesized is more than or equal to 2, L is an integer more than or equal to 2, and 2K-1＜L≤2KThe target synthetic signal is a synthetic signal corresponding to a target signal to be synthesized, and the target signal to be synthesized is a group of signals to be synthesized determined according to the state of the selection signal.
Compared with the step 101, the step 201 includes more than 4 signals to be synthesized, the signals to be synthesized are divided into a plurality of groups, each group of signals to be synthesized includes at least 2 signals to be synthesized, the target source signal further includes a selection signal, and it is possible to determine which group of signals to be synthesized corresponds to the currently output synthesized signal according to different states of the selection signal.
202. Determining a target address value of the lookup table according to each signal in the target signal source;
in contrast to step 102, the address values of the lookup table in step 202 further include a selection signal for determining which set of signals to be synthesized corresponds to which is currently output. One selection signal has two states of "1" and "0", and the two selection signals have 4 states of "00", "01", "10" and "11", and so on, each state can output a composite signal of a certain group of signals to be synthesized correspondingly.
203. And determining a target composite signal from the lookup table according to the target address value.
Step 203 is the same as step 103, please refer to the related description in step 103.
In the embodiment of the invention, each signal in a target signal source is input into a preset lookup table as a one-bit address bit, the target signal source comprises M signals to be synthesized, N main code clock signals and K selection signals, the lookup table records amplitude information of the synthesized signal corresponding to each address value, the code period of the signals to be synthesized is the same as the period of the main code clock signals, the phases of the main code clock signals are different from each other, M is an integer greater than or equal to 4, N and K are integers greater than or equal to 1, and 2N-1＜M≤2N(ii) a The M signals to be synthesized are divided into L groups of signals to be synthesized, the number of the signals in each group of signals to be synthesized is more than or equal to 2, L is an integer more than or equal to 2, and 2K-1＜L≤2KThe target synthetic signal is a synthetic signal corresponding to a target signal to be synthesized, and the target signal to be synthesized is a group of signals to be synthesized determined according to the state of the selection signal. Determining an address value of the lookup table according to the state of each signal in the target signal source; and determining a target synthesis signal from the lookup table according to the address value. In the process, the main code clock signal is also used as an address bit to be input into the lookup table, and the corresponding lookup table address value is correspondingly switched along with the state switching of the main code clock, so that the amplitude values of the synthetic signals respectively corresponding to different main code clock states can be determined, and the odd-even time slot switching function similar to that of a time slot switch is realized. In addition, compared with the traditional method for synthesizing signals by using an ultra-long lookup table, the lookup table provided by the application has smaller consumption of the total storage space. At the same time, the state switching of the selection signal is utilized to freely select the output of the synthesis signals corresponding to the signals to be synthesized of different groups in the same lookup table, thereby greatly improving the output qualityPracticality and flexibility are improved.
For ease of understanding, a signal synthesis method based on a lookup table in the embodiment shown in fig. 2A is described below as a practical application scenario.
Referring to fig. 2B, a practical application scenario of the signal synthesis method based on the lookup table in the embodiment shown in fig. 2A is shown.
In fig. 2B, the target signal source includes 4 signals to be synthesized A, B, C and D, 2 main code clock signals T1 and T2, and 1 selection signal X. A. B, C and D have the same code period, T1 and T2 have the same period as the code period, and T1 and T2 are 90 degrees out of phase. A. B, C, D, T1, T2 and X are input as 1 address bit into a preset lookup table, and the resultant signal S is output. In addition, the signal synthesis process further comprises carrier modulation, and the period of the carrier Tc is Ts. The contents of the preset lookup table are shown in table 2:
TABLE 2
In the lookup table shown in table 2, the carrier period Ts is divided into 8 equally spaced time slots as abscissa, a 7-bit lookup table address is used as ordinate, and a specific value in each time slot of each address in the lookup table represents the amplitude of the corresponding synthesized signal, which can be assigned in advance according to actual requirements, and the current address and the amplitude of the corresponding synthesized signal in the current time slot are output at the current time. Because the 1-bit address bit is the input selection signal (the underlined address bit in table 2), the composite signals corresponding to the signals to be synthesized of different groups can be freely selected in the same lookup table to be output by utilizing the state switching of the selection signal, and the practicability and the flexibility are greatly improved.
Fig. 2C shows waveforms of signals to be synthesized A, B, C and D, master code clocks T1 and T2, a selection signal X, a synthesized signal S, and a carrier Tc, corresponding to fig. 2B. As can be seen from fig. 2C, the period of the carrier Tc is half of the code period of the signal to be synthesized, and when the selection signal X is "1", the synthesized signal S sequentially outputs the respective signal codes of a and B, i.e., a1, B1, a2, B2 … …, accordingly, in accordance with the odd-even slot switching of the main code clock T1; when the selection signal X is "0", the composite signal S sequentially outputs the respective signal codes of C and D, i.e., C5, D5, C6, D6 … …, respectively, according to the odd-even slot switching of the main code clock T1. It can be seen that the different states of the selection signal X represent the combined signal outputs of the signals to be combined A and B and the combined signal outputs of the signals to be combined C and D, respectively.
Further, since another main code clock signal T2 having a phase different from that of T1 by 90 degrees is included as an address bit in the present application scenario, 4 slots formed by different states (00, 01, 10, and 11) of T1 and T2 can transmit signal codes of 4-way signals, respectively. The synthesized signal S may be a1, B1, C1, D1, a2, B2, C2, D2 … …, that is, one code period is divided into 4 slots, and one channel of signal to be synthesized is transmitted in each slot. Moreover, by using different states of the selection signal X, switching output of various types of composite signals such as a1, B1, C1, D1, a2, B2, C2, D2 … …, or a1, B1, a2, B2 … … can be realized, compatibility and universality are good, and a user can realize various complex modulation modes by configuring different lookup table contents according to needs.
Therefore, in the application scene, the time division synthesis of the multipath signals can be carried out on the basis of no time slot switch by inputting the main code clock signal into a preset lookup table as an address bit. In addition, for more signals to be synthesized, the same method can be used for synthesizing the signals by only increasing the appropriate number of master code clock signals with different phases. Meanwhile, by using different states of the selection signal, various synthetic signals corresponding to different signal combinations to be synthesized can be output at different moments, and the practicability and the flexibility are greatly improved.
The above mainly describes a signal synthesis method based on a lookup table, and a signal synthesis apparatus based on a lookup table will be described in detail below.
Referring to fig. 3, an embodiment of a signal synthesis apparatus based on a lookup table according to the present invention includes:
an address input module 301, configured to input each signal in a target signal source into a preset lookup table as a bit address, where the target signal source includes M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of a synthesized signal corresponding to each address value, a code period of the signal to be synthesized is the same as a period of the main code clock signal, phases of the main code clock signals are different from each other, M is an integer greater than or equal to 2, N is an integer greater than or equal to 1, and 2 is an integer greater than or equal to 1N-1＜M≤2N；
An address determining module 302, configured to determine a target address value of the lookup table according to each signal in the target signal sources;
a composite signal determining module 303, configured to determine a target composite signal from the lookup table according to the target address value.
Further, in the address input module 301, M is greater than or equal to 4, the target signal source further includes K selection signals, K is an integer greater than or equal to 1, the M signals to be synthesized are divided into L groups of signals to be synthesized, the number of signals in each group of signals to be synthesized is greater than or equal to 2, L is an integer greater than or equal to 2, and 2K-1＜L≤2KThe target synthetic signal is a synthetic signal corresponding to a target signal to be synthesized, and the target signal to be synthesized is a group of signals to be synthesized determined according to the state of the selection signal.
Further, the signal synthesizing apparatus may further include:
a carrier determining module 304, configured to determine a carrier period;
a time slot dividing module 305, configured to divide the carrier cycle into more than one time slot;
and an amplitude information recording module 306, configured to set the amplitude information of the synthesized signal corresponding to each address value in each time slot, and record the amplitude information in the lookup table.
Further, the time slot dividing module 305 may be specifically configured to divide the carrier period into 8 time slots at equal intervals.
Further, the synthesized signal determining module 303 may specifically include:
a magnitude information determining unit 3031, configured to determine, from the lookup table, magnitude information of the synthesized signal at each time according to the target address value and the target time slot at each time;
a signal reconstructing unit 3032, configured to perform signal reconstruction on the amplitude information of the synthesized signal at each time to obtain the target synthesized signal.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A method for signal synthesis based on a look-up table, comprising:
inputting each signal in a target signal source into a preset lookup table as a bit address, wherein the target signal source comprises M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of the synthesized signal corresponding to each address value, and the code period of the signals to be synthesized and the main codeThe clock signals have the same period, the phases of the main code clock signals are different from each other, M is an integer greater than or equal to 2, N is an integer greater than or equal to 1, and 2N-1＜M≤2N；
Determining a target address value of the lookup table according to the state of each signal in the target signal source;
and determining a target composite signal from the lookup table according to the target address value.
2. The signal synthesis method according to claim 1, wherein M is greater than or equal to 4, the target signal source further comprises K selection signals, K is an integer greater than or equal to 1, the M signals to be synthesized are divided into L groups of signals to be synthesized, the number of signals in each group of signals to be synthesized is greater than or equal to 2, L is an integer greater than or equal to 2, and 2K-1＜L≤2KThe target synthetic signal is a synthetic signal corresponding to a target signal to be synthesized, and the target signal to be synthesized is a group of signals to be synthesized determined according to the state of the selection signal.
3. A signal synthesis method according to claim 1 or 2, characterized in that the look-up table is preset according to the following steps:
determining a carrier period;
dividing the carrier cycle into more than one time slot;
and setting the amplitude information of the synthetic signal corresponding to each address value under each time slot, and recording the amplitude information in the lookup table.
4. The signal synthesis method according to claim 3, wherein the dividing the carrier cycle into more than one time slot is specifically: the carrier cycle is divided into 8 slots at equal intervals.
5. The signal synthesis method of claim 3, wherein the determining a target synthesized signal from the look-up table based on the target address value specifically comprises:
determining amplitude information of the synthesized signal at each moment from the lookup table according to the target address value and the target time slot at each moment;
and performing signal reconstruction on the amplitude information of the synthetic signal at each moment to obtain the target synthetic signal.
6. A look-up table based signal synthesis apparatus, comprising:
an address input module, configured to input each signal in a target signal source into a preset lookup table as a bit address, where the target signal source includes M signals to be synthesized and N main code clock signals, the lookup table records amplitude information of a synthesized signal corresponding to each address value, a code period of the signal to be synthesized is the same as a period of the main code clock signal, phases of the main code clock signals are different from each other, M is an integer greater than or equal to 2, N is an integer greater than or equal to 1, and 2 is an integer greater than or equal to 2N-1＜M≤2N；
The address determination module is used for determining a target address value of the lookup table according to the state of each signal in the target signal source;
and the synthetic signal determining module is used for determining a target synthetic signal from the lookup table according to the target address value.
7. The signal synthesizing apparatus according to claim 6, wherein M is greater than or equal to 4, the target signal source further comprises K selection signals, K is an integer greater than or equal to 1, the M signals to be synthesized are divided into L groups of signals to be synthesized, the number of signals in each group of signals to be synthesized is greater than or equal to 2, L is an integer greater than or equal to 2, 2K-1＜L≤2KThe target synthetic signal is a synthetic signal corresponding to a target signal to be synthesized, and the target signal to be synthesized is a group of signals to be synthesized determined according to the state of the selection signal.
8. The signal synthesizing apparatus according to claim 6 or 7, characterized by further comprising:
the carrier determining module is used for determining a carrier period;
the time slot dividing module is used for dividing the carrier cycle into more than one time slot;
and the amplitude information recording module is used for setting the amplitude information of the synthetic signal corresponding to each address value under each time slot and recording the amplitude information in the lookup table.
9. The signal synthesis apparatus according to claim 8, wherein the time slot dividing module is specifically configured to divide the carrier period into 8 time slots at equal intervals.
10. The signal synthesis apparatus according to claim 8, wherein the synthesized signal determination module specifically includes:
the amplitude information determining unit is used for determining the amplitude information of the synthetic signal at each moment from the lookup table according to the target address value and the target time slot at each moment;
and the signal reconstruction unit is used for performing signal reconstruction on the amplitude information of the synthetic signal at each moment to obtain the target synthetic signal.
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