CN107132897A - Mainboard based on processor soars - Google Patents
Mainboard based on processor soars Download PDFInfo
- Publication number
- CN107132897A CN107132897A CN201710311598.XA CN201710311598A CN107132897A CN 107132897 A CN107132897 A CN 107132897A CN 201710311598 A CN201710311598 A CN 201710311598A CN 107132897 A CN107132897 A CN 107132897A
- Authority
- CN
- China
- Prior art keywords
- interface
- mainboard
- feiteng processor
- internal memory
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
Abstract
The invention discloses a mainboard based on a Feiteng processor. The method comprises the following steps: the system comprises a Feiteng processor, a gate array chip, a BIOS chip, a memory device, a network card, at least one general input/output GPIO device, a display card and an expansion interface; the gate array chip is connected with the Feiteng processor and used for controlling the power-on time sequence of the Feiteng processor; the BIOS chip, the memory device, the network card, the at least one GPIO device, the display card and the expansion interface are respectively connected to the Feiteng processor; the expansion interfaces include at least one PCIE interface, at least one UART interface, at least one LPC interface, and at least one I2C interface. Therefore, according to the technical scheme, the safety problem caused by the adoption of a foreign central processing unit can be solved by taking a domestic Feiteng processor with own intellectual property rights as the central processing unit of the mainboard. And moreover, a hardware interface is arranged when the mainboard is designed, and corresponding reinforcement measures are adopted while the reliability of the interface is ensured. Therefore, the mainboard of this application can deal with multiple abominable service environment.
Description
Technical field
The present invention relates to computer realm, more particularly to a kind of mainboard based on Feiteng processor.
Background technology
Central processing unit（Central Processing Unit, CPU）Instruct and handle for analytical Calculation machine and calculate
Data in machine software, are the arithmetic core and control core of computer.Mainboard is one of most basic important component of computer,
Main circuit system for installing composition computer, is the surface-mounted integrated circuit for connecting computer all parts.
Feiteng processor is the four core CPU that China has independent intellectual property right.Wherein, FT1500A processors are 64 logical
With CPU, compatible ARM V8 instructions, using international advanced 28nm techniques flow.The processor has the spies such as high-performance, low-power consumption
Point, thus it is widely used in the products such as server, high-performance computer, high-end Embedded Application.
At present, most computers product is using external cpu chip.But, due to external cpu chip core technology not
It can grasp, the security in use can not ensure.Therefore, a kind of motherboard design based on Feiteng processor turns into active demand.
The content of the invention
The invention provides a kind of mainboard based on Feiteng processor, to solve to use foreign countries' CPU cores in the prior art
The safety issue of piece and the motherboard design demand of Feiteng processor.Including：
Feiteng processor, gate array chip, basic input and output BIOS chips, memory device, network interface card, at least one universal input are defeated
Go out GPIO devices, video card and expansion interface；
The gate array chip is connected with the Feiteng processor, the electrifying timing sequence for controlling Feiteng processor；
The BIOS chips, the memory device, the network interface card, at least one described GPIO device, the video card and the expansion
Exhibition interface is respectively connecting to the Feiteng processor；
The expansion interface includes at least one peripheral component interconnection PCIE interfaces, the transmission of at least one universal asynchronous receiving-transmitting at a high speed
Device UART interface, at least one low pin count mesh LPC interface and at least one I2C interface.
It is preferred that, the memory device includes the first internal memory and the second internal memory, first internal memory and second internal memory
It is connected respectively with the Feiteng processor by two passages, first internal memory is connected by welding with the mainboard, described
Second internal memory is connected by internal memory socket with the mainboard.
It is preferred that, the memory size of first internal memory is 2GB, and the memory size of second internal memory is 8GB.
It is preferred that, the BIOS chips are connected by serial peripheral equipment interface SPI bus.
It is preferred that, the network interface card is connected by gigabit GMII GMII with the Feiteng processor.
It is preferred that, the video card includes digital visual interface DVI, Video Graphics Array USB interface and Low Voltage Differential Signal
LVDS interface.
It is preferred that, the quantity of at least one PCIE interface is 3, and the quantity of at least one UART interface is 2
Individual, the quantity of at least one LPC interface is 1, and the quantity of at least one I2C interface is 2, it is described at least one
The quantity of GPIO devices is 16.
It is preferred that, the Feiteng processor is FT1500A processors.
As can be seen here, by the technical scheme of application the application, based on the domestic place of soaring with own intellectual property
Device is managed as the central processing unit of mainboard, the safety problem brought using external central processing unit is can solve the problem that.Also, in design
Hardware interface setting is carried out during mainboard, while interface reliability is ensured, using corresponding reinforcement measure.Therefore, the application
Mainboard can tackle a variety of severe use environments.
Brief description of the drawings
Fig. 1 is the schematic block diagram of the mainboard based on Feiteng processor of the application one embodiment；
Fig. 2 is the structural representation of the mainboard based on Feiteng processor of the application one embodiment.
Embodiment
As shown in figure 1, a kind of schematic block diagram of the mainboard based on Feiteng processor proposed for the application.Specifically, originally
The mainboard 100 of application includes：Feiteng processor 101, gate array chip 102, BIOS chips 103, memory device 104, network interface card 105,
At least one universal input output GPIO devices 106, video card 107 and expansion interface 108.
Wherein, the gate array chip 102 is connected with the Feiteng processor 101, the upper electricity for controlling Feiteng processor
Sequential；
It is the BIOS chips 103, the memory device 104, the network interface card 105, at least one described GPIO device 106, described
Video card 107 and the expansion interface 108 are respectively connecting to the Feiteng processor 101；
The expansion interface 108 includes at least one PCIE interface 109, at least one UART interface 110, at least one LPC and connect
Mouth 111 and at least one I2C interface 112.
As can be seen here, by the technical scheme of application the application, based on the domestic place of soaring with own intellectual property
Device is managed as the central processing unit of mainboard, the safety problem brought using external central processing unit is can solve the problem that.Also, in design
Hardware interface setting is carried out during mainboard, while interface reliability is ensured, using corresponding reinforcement measure.Therefore, the application
Mainboard can tackle a variety of severe use environments.
It should be understood that the application is to the gate array chip on mainboard, basic input-output system BIOS chip, memory device, net
The type and model of card, GPIO devices, video card and expansion interface are not limited.
Preferably, gate array chip can use the EPM2210 chips of ALTERA companies, and EPM2210 chips are used to control to fly
Rise the electrifying timing sequence of processor.
Preferably, basic input output system（Basic Input Output System, BIOS）Chip can pass through string
Row Peripheral Interface（Serial Peripheral Interface, SPI）Bus is connected.Specifically, BIOS chips can be used
W25Q64 chips.
Preferably, network interface card can pass through gigabit GMII（Gigabit Medium Independent
Interface, GMII）It is connected with the Feiteng processor.Specifically, the network interface card can use MICREL KSZ9031 network interface cards
Realize.
Preferably, video card can include digital visual interface（Digital Visual Interface, DVI）, video figure
Shape array（Video Graphics Array, VGA）Interface and Low Voltage Differential Signal（Low Voltage Differential
Signaling, LVDS）Interface.Specifically, video card can pass through peripheral component interconnection PCIE X8 interfaces and processing of soaring at a high speed
Device is connected, and DVI, USB interface and LVDS interface can be drawn by video card.Video card can use display chip E8860, and it is drawn
Three interfaces can and deposit.
Preferably, Feiteng processor can be FT1500A processors.It should be understood that type of the application for Feiteng processor
Number do not limit.
Preferably, the memory device includes the first internal memory and the second internal memory, first internal memory and second internal memory
It is connected respectively with the Feiteng processor by two passages, first internal memory is connected by welding with the mainboard, described
Second internal memory is connected by internal memory socket with the mainboard.
Preferably, the memory size of first internal memory is 2GB, and the memory size of second internal memory is 8GB.
Specifically, memory device can be connected by DDR3 passages with Feiteng processor.The memory device is included in two groups
Deposit, respectively the first internal memory and the second internal memory.Two groups of internal memories can pass through two different passages（Such as CH1 and CH2）Point
It is not connected with Feiteng processor.First internal memory can be directly weldingly fixed on mainboard using particle, and the second internal memory can be used
The form of internal memory socket is fixed on mainboard.First internal memory can be the DDR3 internal memories that capacity is 2GB, and the second internal memory can be appearance
Measure the DDR3 internal memories for 8GB.
As can be seen here, by the technical scheme of application the application, based on the domestic place of soaring with own intellectual property
Device is managed as the central processing unit of mainboard, the safety problem brought using external central processing unit is can solve the problem that.Also, in design
Hardware interface setting is carried out during mainboard, while interface reliability is ensured, using corresponding reinforcement measure.Therefore, the application
Mainboard can tackle a variety of severe use environments.In addition, the application uses two kinds of forms of memory on board and internal memory socket, make
The selection for obtaining internal memory is more flexible, scalability and strong applicability.
Preferably, the quantity of at least one PCIE interface is 3, and the quantity of at least one UART interface is 2
Individual, the quantity of at least one LPC interface is 1, and the quantity of at least one I2C interface is 2, it is described at least one
The quantity of GPIO devices is 16.
It should be understood that the application is not limited the quantity of above-mentioned interface.
Specifically, three peripheral components being connected with Feiteng processor are interconnected at a high speed（Peripheral Component
Interconnect Express, PCIE）Interface can be 3 PCIE X8 interfaces, can be with extension standards PCIE X1 interfaces, mark
Quasi- PCIE X2, standard PCIE X4 and standard PCIE X8 peripheral hardware.
Specifically, Feiteng processor can connect 2 road universal asynchronous receiving-transmitting transmitters（Universal Asynchronous
Receiver Transmitter, UART）Interface.UART interface output for standard life span（Time to Live, TTL）
Level, can export corresponding serial ports to complete corresponding Function Extension for extending different serial port drive chips.
Specifically, Feiteng processor can connect 2 road I2C interfaces, and extension arbitrarily meets the functional chip of I2C interfaces, from
And complete different Function Extensions.
Specifically, Feiteng processor can connect 16 universal input outputs（General Purpose Input
Output, GPIO）, so that arbitrarily control input output.
Specifically, Feiteng processor can connect 1 road low pin count mesh（Low Pin Count, LPC）Interface, extends phase
The LPC bridge pieces answered, so as to extend different functions.
As can be seen here, by the technical scheme of application the application, based on the domestic place of soaring with own intellectual property
Device is managed as the central processing unit of mainboard, the safety problem brought using external central processing unit is can solve the problem that.Also, in design
Hardware interface setting is carried out during mainboard, while interface reliability is ensured, using corresponding reinforcement measure.Therefore, the application
Mainboard can tackle a variety of severe use environments.In addition, the application uses two kinds of forms of memory on board and internal memory socket, make
The selection for obtaining internal memory is more flexible, scalability and strong applicability.
Fig. 2 is the structural representation of the mainboard based on Feiteng processor of the application one embodiment.As shown in Fig. 2 should
Mainboard 200 includes：FT1500A processors 201, EPM2210 chips 202, W25Q64 chips 203, in the first internal memory 204, second
Deposit 205, KSZ9031 network interface cards 206,16 GPIO devices 207, AMD E8860 video cards 208,3 PCIE interfaces 209,2 UART
Interface 110,1 LPC interface 111 and 2 I2C interfaces 112.
FT1500A processors connect W25Q64 chips by spi bus.First internal memory is welded on mainboard, passes through DDR3
Passage is connected with FT1500A processors.Second internal memory is connected by internal memory socket with mainboard, passes through DDR3 passages and FT1500A
Processor is connected.KSZ9031 network interface cards are connected by GMII with FT1500A processors.AMD E8860 video cards can pass through PCIE
X8 interfaces are connected with FT1500A processors.AMD E8860 video cards can draw DVI 113, USB interface 114 and LVDS interface
115.16 GPIO devices, 3 PCIE interfaces, 2 UART interfaces, 1 LPC interface and 2 I2C interfaces respectively with FT1500A
Processor is connected.
As can be seen here, by the technical scheme of application the application, based on the domestic place of soaring with own intellectual property
Device is managed as the central processing unit of mainboard, the safety problem brought using external central processing unit is can solve the problem that.Also, in design
Hardware interface setting is carried out during mainboard, while interface reliability is ensured, using corresponding reinforcement measure.Therefore, the application
Mainboard can tackle a variety of severe use environments.In addition, the application uses two kinds of forms of memory on board and internal memory socket, make
The selection for obtaining internal memory is more flexible, scalability and strong applicability.
Through the above description of the embodiments, those skilled in the art can be understood that the present invention can lead to
Hardware realization is crossed, the mode of necessary general hardware platform can also be added to realize by software.Understood based on such, this hair
Bright technical scheme can be embodied in the form of software product, and the software product can be stored in a non-volatile memories
Medium（Can be CD-ROM, USB flash disk, mobile hard disk etc.）In, including some instructions are to cause a computer equipment（Can be
Personal computer, server, or network equipment etc.）Perform the method described in each implement scene of the invention.
It will be appreciated by those skilled in the art that accompanying drawing is a schematic diagram for being preferable to carry out scene, module in accompanying drawing or
Flow is not necessarily implemented necessary to the present invention.
It will be appreciated by those skilled in the art that the module in device in implement scene can be described according to implement scene into
Row is distributed in the device of implement scene, can also carry out one or more dresses that respective change is disposed other than this implement scene
In putting.The module of above-mentioned implement scene can be merged into a module, can also be further split into multiple submodule.
The invention described above sequence number is for illustration only, and the quality of implement scene is not represented.
Disclosed above is only several specific implementation scenes of the present invention, and still, the present invention is not limited to this, Ren Heben
What the technical staff in field can think change should all fall into protection scope of the present invention.
Claims (8)
1. a kind of mainboard based on Feiteng processor, it is characterised in that including：Feiteng processor, gate array chip, input substantially it is defeated
Go out system bios chip, memory device, network interface card, at least one universal input output GPIO devices, video card and expansion interface；
The gate array chip is connected with the Feiteng processor, the electrifying timing sequence for controlling Feiteng processor；
The BIOS chips, the memory device, the network interface card, at least one described GPIO device, the video card and the expansion
Exhibition interface is respectively connecting to the Feiteng processor；
The expansion interface includes at least one peripheral component interconnection PCIE interfaces, the transmission of at least one universal asynchronous receiving-transmitting at a high speed
Device UART interface, at least one low pin count mesh LPC interface and at least one I2C interface.
2. mainboard according to claim 1, it is characterised in that the memory device includes the first internal memory and the second internal memory,
First internal memory and second internal memory are connected with the Feiteng processor respectively by two passages, and first internal memory leads to
Cross welding to be connected with the mainboard, second internal memory is connected by internal memory socket with the mainboard.
3. mainboard according to claim 2, it is characterised in that the memory size of first internal memory is 2GB, described second
The memory size of internal memory is 8GB.
4. the mainboard according to any one of claim 1-3, it is characterised in that the BIOS chips are connect by serial peripheral
Mouth spi bus connection.
5. the mainboard according to any one of claim 1-4, it is characterised in that the network interface card is independently connect by gigabit media
Mouth GMII is connected with the Feiteng processor.
6. the mainboard according to any one of claim 1-5, it is characterised in that the video card includes digital visual interface
DVI, Video Graphics Array USB interface and Low Voltage Differential Signal LVDS interface.
7. the mainboard according to any one of claim 1-6, it is characterised in that the quantity of at least one PCIE interface
For 3, the quantity of at least one UART interface is 2, and the quantity of at least one LPC interface is 1, it is described at least
The quantity of one I2C interface is 2, and the quantity of at least one GPIO device is 16.
8. the mainboard according to any one of claim 1-7, it is characterised in that the Feiteng processor is at FT1500A
Manage device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710311598.XA CN107132897A (en) | 2017-05-05 | 2017-05-05 | Mainboard based on processor soars |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710311598.XA CN107132897A (en) | 2017-05-05 | 2017-05-05 | Mainboard based on processor soars |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107132897A true CN107132897A (en) | 2017-09-05 |
Family
ID=59731398
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710311598.XA Pending CN107132897A (en) | 2017-05-05 | 2017-05-05 | Mainboard based on processor soars |
Country Status (1)
| Country | Link |
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| CN (1) | CN107132897A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108762382A (en) * | 2018-05-15 | 2018-11-06 | 北京中电智诚科技有限公司 | A kind of processor board based on the CPU that soars |
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Application publication date: 20170905 |
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