CN104021103A - Serial port expansion device for embedded microprocessor - Google Patents

Serial port expansion device for embedded microprocessor Download PDF

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Publication number
CN104021103A
CN104021103A CN201410245633.9A CN201410245633A CN104021103A CN 104021103 A CN104021103 A CN 104021103A CN 201410245633 A CN201410245633 A CN 201410245633A CN 104021103 A CN104021103 A CN 104021103A
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microprocessor
port
programmable logic
logic device
pld
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CN104021103B (en
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陈伟
宾显文
林钦坚
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HI-TARGET SURVEYING INSTRUMENT Co Ltd
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HI-TARGET SURVEYING INSTRUMENT Co Ltd
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Abstract

The invention discloses a serial port expansion device for an embedded microprocessor. The serial port expansion device comprises the microprocessor and a programmable logic device. The microprocessor comprises M serial ports and N control ports. The programmable logic device comprises K universal input and output ports, wherein K>M>0, and N>0. The microprocessor is used for setting port communication modes of the programmable logic device through the N control ports. The programmable logic device is used for programming a programmable logic circuit inside the device and controlling the communication interconnection relation of the universal input and output ports on the programmable logic device. The universal input and output ports of the programmable logic device are connected with one or more peripheral devices, and signal transmission between the peripheral devices and the microprocessor and/or signal transmission between the peripheral devices are achieved. According to the serial port expansion device of the embedded microprocessor, the number of the ports is convenient and easy to increase, switching is flexible, cost is low, efficiency is high, and transportability is high.

Description

A kind of serial ports expansion device of embedded microprocessor
Technical field
The present invention relates to embedded system technology field, relate in particular to a kind of serial ports expansion device of embedded microprocessor.
Background technology
Asynchronous reception/the transmission interface of general serial (Universal Asynchronous Receiver/Transmitter is called for short UART), is also called for short serial ports.Serial ports is a kind of general serial data bus for asynchronous communication, and this bus two-way communication, can realize full duplex transmission and reception.Serial ports is the most frequently used interface the most simply and easily in Embedded System Design, is commonly used to and PC (Personal Computer, personal computer) or other outer net devices communicating.
Existing embedded microprocessor has 1-6 serial ports conventionally, and quantity is very limited; And embedded microprocessor is as the core of embedded system, need to the peripherals of microprocessor communication conventionally have a variety of, the serial ports quantity even having considerably beyond microprocessor itself.For example: at GNSS (Global Navigation Satellite System, GLONASS (Global Navigation Satellite System)) in receiver, its built-in microprocessor has 6 serial ports, and comprise GPS (Global Positioning System with the peripherals of microprocessor communication, GPS) mainboard, GPRS (General Packet Radio Service, general packet radio service technology) module, bluetooth communication, station telecommunication module, outer PC etc., wherein, GPS mainboard need to take 3 serial ports, GPRS module need to take 1 serial ports, bluetooth communication need to take 1 serial ports, station telecommunication module need to take 1 serial ports, also need in addition 2 serial ports and PC or other external device communication.Therefore, all and peripherals microprocessor communication needs 8 serial ports altogether, and microprocessor self only has 6 serial ports, and this just occurs the problem of microprocessor serial ports lazy weight, therefore needs the serial ports quantity of microprocessor to expand.
The common technology means that address the above problem are to utilize special serial port extended chip to increase serial ports quantity; Or, by digital circuit or analog switch, the serial ports of microprocessor is carried out to time division multiplex, make multiple peripherals can the same microprocessor serial ports of time-sharing multiplex.Wherein, adopt the serial ports that special serial port extended chip is expanded out to allow peripherals to work simultaneously, and there is no the problem of time-sharing multiplex; But there is the defects such as cost is high, driver is complicated.Carry out extended serial port with special serial port extended chip in the embedded design of operation system time, also need to develop corresponding chip driver program, increased difficulty and the complicacy of exploitation; And because loss of data also may appear in the problem of driver and operating system framework self.
In addition, between external unit, also need in some cases to intercom mutually and without the switching processing of microprocessor.For example, in above-mentioned GNSS receiver, under certain mode of operation, GPS mainboard need to GPRS module, bluetooth communication, station telecommunication module, PC direct communication, in fact do not need the participation through microprocessor, but each peripherals of the prior art is processed and is carried out data transmission again by the serial ports switching of microprocessor, data transmission efficiency is lower on the one hand, unnecessarily take on the other hand the resource of microprocessor and reduced the overall performance of microprocessor, therefore this is not only the problem of microprocessor serial ports lazy weight, also there is the problem of the switching interconnection between the peripheral hardware that how to solve microprocessor.
The special serial port extended chip of available technology adopting can not solve the problem of direct communication between peripheral hardware, still needs to process or forward through microprocessor, thereby has increased the work load of microprocessor.And employing digital circuit or analog switch carry out the solution of serial ports switching peripheral hardware by same multiple peripheral hardware time-sharing multiplexs microprocessor serial ports, although can solve the problem of direct communication between peripheral hardware, but shortcoming is also apparent, that is: multiple peripheral hardwares can not communicate with microprocessor simultaneously.This scheme a kind of simple and effective solution of also can yet be regarded as in specific application scenario, but because the connection between circuit is just difficult to change after determining again, therefore this scheme dirigibility and extensibility are all poor.
Summary of the invention
Technical matters to be solved by this invention is, a kind of serial ports expansion device of embedded microprocessor is provided, realize and how the serial ports quantity of embedded microprocessor being expanded, reduce expansion complexity and cost, improve the dirigibility of the serial ports interconnection between microprocessor and external unit or between external unit and external unit, and overcome the defect that microprocessor of the prior art can not communicate by a serial ports while and multiple external units.
For solving above technical matters, the embodiment of the present invention provides a kind of serial ports expansion device of embedded microprocessor, comprises microprocessor and programmable logic device (PLD).
Described microprocessor comprises M serial ports and N control port; Described programmable logic device (PLD) comprises K universal input and output port; Wherein, K > M > 0, N > 0;
Described microprocessor, for arranging the port communication pattern of described programmable logic device (PLD) by a described N control port;
Described programmable logic device (PLD), for according to described port communication pattern, programmes to the Programmable Logic Device of device inside, controls the communication interconnect relation of each universal input and output port in described programmable logic device (PLD);
Each universal input and output port of described programmable logic device (PLD), be used for according to the communication interconnect relation of described universal input and output port, connect one or more peripherals, realize the signal transmission between described peripherals and described microprocessor, and/or, realize the signal transmission between described peripherals.
Preferably, described programmable logic device (PLD) is CPLD device.
In one can implementation, the port communication pattern of described programmable logic device (PLD) is indicated and controlled to the control port of the N on described microprocessor, for by parallel communication fashion.
Wherein, the output level of N control port described in described microprocessor control, for forming the N bit of the port communication pattern of indicating described programmable logic device (PLD), the quantity of described port communication pattern is 2 n.Or, the level of any P control port of N control port described in described microprocessor control, for forming the P bit of the port communication pattern of indicating described programmable logic device (PLD), the quantity of described port communication pattern is 2 p, 0 < P < N; The level of remaining (N-P) individual control port of described microprocessor control, carries out the peripherals of current port communication pattern for gating.
Further, described programmable logic device (PLD), also for port communication pattern described in each is set up to port interconnection mapping relations one by one, and according to the interconnection mapping relations of the current level value of a described N control port and described universal input and output port, logical device internal circuit is programmed, the corresponding universal input and output port of level value that gating is current with described control port.
In another can implementation, the port communication pattern of described programmable logic device (PLD) is indicated and controlled to the control port of the N on described microprocessor, for by serial communication mode.
The serial ports expansion device of embedded microprocessor provided by the invention, adopts programmable logic device (PLD) as bridge, between microprocessor and peripheral hardware in embedded system, and between peripheral hardware and peripheral hardware, provides one port interconnection scheme flexibly.Microprocessor is by especially CPLD (Complex Programmable Logic Device of programmable logic device (PLD), CPLD) device connection, can be by setting up the universal input and output port (GPIO of microprocessor self serial ports and CPLD device, General Purpose Input/Output) mapping relations, the serial ports of microprocessor is expanded to the universal input and output port possessing for CPLD device, thereby be connected with external unit by the universal input and output port of CPLD device.The present invention only need to pass through the software control to the internal logic circuit in programmable logic device (PLD), can realize the switching controls of each universal input and output port to programmable logic device (PLD), without hardware circuit is carried out to any amendment, therefore convenient and simple to the serial ports quantity expansion of microprocessor, switch flexibly, cost poor efficiency is high, portable strong.
Brief description of the drawings
Fig. 1 is the structural representation of an embodiment of the serial ports expansion device of a kind of embedded microprocessor provided by the invention;
Fig. 2 is the structural representation that the serial ports expansion device of embedded microprocessor provided by the invention is connected with external unit.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described.
Referring to Fig. 1, it is the structural representation of an embodiment of the serial ports expansion device of a kind of embedded microprocessor provided by the invention.
The serial ports expansion device of described embedded microprocessor comprises microprocessor 100 and programmable logic device (PLD) 200.
When concrete enforcement, described microprocessor 100 comprises M serial ports and N control port; Described programmable logic device (PLD) 200 comprises K universal input and output port (General Purpose Input/Output is called for short GPIO); Wherein, K > M > 0, N > 0.The universal input and output port quantity that is programmable logic device (PLD) 200 is more than the quantity of microprocessor 100.
Described microprocessor 100, for arranging the port communication pattern of described programmable logic device (PLD) 200 by a described N control port.
Described programmable logic device (PLD) 200, for according to described port communication pattern, programmes to the Programmable Logic Device of device inside, controls the communication interconnect relation of each universal input and output port in described programmable logic device (PLD) 200.
Each universal input and output port of described programmable logic device (PLD) 200, be used for according to the communication interconnect relation of described universal input and output port, connect one or more peripherals, realize the signal transmission between described peripherals and described microprocessor 100, and/or, realize the signal transmission between described peripherals.
Wherein, described programmable logic device (PLD) 200 is preferably CPLD (Complex Programmable Logic Device, CPLD) device.CPLD is from PAL (Programmable Array Logic, programmable logic array) and GAL (Generic Array Logic, generic array logic) the device device that develops out, PAL and GAL device relatively, CPLD scale is large, complex structure, belongs to large scale integrated circuit scope.
CPLD be a kind of user according to needing separately the digital integrated circuit of constitutive logic function voluntarily, its basic design method is by Integrated Development software platform, utilize the method such as schematic diagram, hardware description language, generate corresponding file destination, by downloading cable, code is sent in target CPLD chip, realizes the digital display circuit of design function.
It should be noted that, programmable logic device (PLD) provided by the invention can adopt the programmable logic device (PLD) that is different from CPLD, for example: FPGA (Field-Programmable Gate Array, field programmable gate array) device.Although adopt the implementation of FPGA expansion microprocessor serial ports quantity also comparatively flexible, extensibility and portable high, but because the cost of FPGA device is higher, and power consumption is large, its needed peripheral support circuit and driver all compare to CPLD device and want complicated, are not suitable for the application scenario of low cost, low-power consumption.And CPLD device has flexible in programming, integrated level is high, the cycle of designing and developing is short, the scope of application is wide, developing instrument is advanced, design and manufacture cost is low, require low, standardized product without series of advantages such as test, strong security, price are popular to deviser's hardware experience, the present invention preferably adopts the programmable logic device (PLD) of CPLD device as expansion microprocessor serial ports.
When concrete enforcement, CPLD device 200 can carry out programmed logic function with ladder diagram, also can write with hardware description language, and conventional language has Verilog HDL and VHDL.
Verilog HDL is a kind of hardware description language (Hardware Description Language, be called for short HDL), with textual form, the structure of digital display circuit hardware and the language of behavior are described, with it can presentation logic circuit diagram, logical expression, the logic function can also representative digit flogic system completing.VHDL (Very-High-Speed Integrated Circuit Hardware Description Language, Very High Speed Integrated Circuit (VHSIC) hardware description language) and Verilog HDL are most popular two kinds of hardware description languages in the world.Therefore, in the present embodiment, can adopt this two kinds of hardware description languages, the annexation of each interface to CPLD device 200 is described and programmes, by describe CPLD each interface annexation code " programming " or download in CPLD device 200.
As specific embodiment, as shown in Figure 1, microprocessor 100 has six serial ports COMA~COMF, and five control port IO1~IO5.IO (Input-Output) IO interface (as the Extended Capabilities Port to the microprocessor serial ports) quantity having on CPLD device 200 is much larger than the serial ports quantity on microprocessor 100.Especially, the CPLD device 200 of model has 36 IO interface as shown in Figure 1.Wherein, IO interface 1~12 physical connection on six serial ports COMA~COMF and the CPLD device 200 of microprocessor 100, the each serial ports on microprocessor 100 corresponds respectively to two IO interfaces of CPLD device 200; Microprocessor 100 is by the level value of control port IO1~IO5, control the port communication pattern of CPLD device 200, set up a kind of corresponding relation of port interconnection, six serial ports COMA~COMF of microprocessor 100 can be communicated by one or more IO interfaces and external unit on CPLD device 200.Microprocessor 100 is directly linked on the IO interface of CPLD device 200 with all serial ports of peripheral hardware, as long as the IO of CPLD device 200 is abundant, just can access more port and external unit, upgradability and diffusivity are that ordinary numbers logic chip is incomparable.
The signal communication relation of other universal input and output port on each serial ports and the CPLD device 200 of control microprocessor 100; Or, when the one or more IO interfaces on CPLD device 200 are when connecting peripherals, CPLD device 200 can be connected described peripherals according to the level value of control port IO1~IO5 and is connected with the signal of microprocessor 100, or the signal between two kinds of peripherals connects, without the processing through microprocessor 100.Therefore CPLD device 200 has played connection-bridge beam action in the present invention.
For example, CPLD device 200 carries out programming Control by following false code to the connected relation of each interface on chip:
Preferably, the port communication pattern of described programmable logic device (PLD) 200 is indicated and controlled to N control port on described microprocessor 100, for by parallel communication fashion.
In the present embodiment, alternatively, described microprocessor 100 is controlled the output level of a described N control port, and for forming the N bit of the port communication pattern of indicating described programmable logic device (PLD) 200, the quantity of described port communication pattern is 2 n.Particularly, when the microprocessor 100 in Fig. 1 has 5 control port IO1~IO5, can be using the level value of each control port as " 0 " or " 1 " that represents binary numeral, for example, low level represents binary numeral " 0 "; High level represents binary numeral " 1 "; Therefore, the level value of 5 control port IO1~IO5 of microprocessor 100 can form the binary numeral of 5, its span is 00000~11111 (scale-of-two), and therefore 5 of microprocessor 100 control port IO1~IO5 can array output totally 2 5(32) plants the control signal of form, thereby can export the port communication pattern of 32 kinds.
In addition, in the specific implementation, often can only adopt again the level value of one or more control port output to represent the port communication pattern of programmable logic device (PLD) 200, other control port is connected for the switching of directly controlling peripheral hardware.Particularly, described microprocessor 100 is controlled the level of any P control port of a described N control port, and for forming the P bit of the port communication pattern of indicating described programmable logic device (PLD), the quantity of described port communication pattern is 2 p, 0 < P < N; Described microprocessor 100 is controlled the level of remaining (N-P) individual control port, carries out the peripherals of current port communication pattern for gating.
As shown in Figure 2, the structural representation being connected with external unit for the serial ports expansion device of embedded microprocessor provided by the invention.
CPLD chip 200 in Fig. 2 is expanded the serial ports of microprocessor 100, and is connected with external unit GPS module, radio station module, bluetooth module, GPRS module and external interface 1 and external interface 2.
Five control port IO1~IO5 at microprocessor 100 are parallel communication fashion, and the control port IO1 shown in Fig. 2 is for switching external interface 1 and the external interface 2 of CPLD device 200, and control port IO2 is used for switching GPRS module or radio station module; Control port IO3~IO5 is used to indicate the port communication pattern of CPLD device 200, and its indicating range is 000~111 (scale-of-two), and totally 8 kinds of patterns, specifically as shown in table 1.
The port communication pattern of table 1 parallel communication fashion arranges
In practical operation, external unit can be divided into command module and Data-Link module, for example, command module can comprise external interface 1, external interface 2 and bluetooth module etc., Data-Link module can comprise GPRS module and radio station module.Therefore, as shown in table 1, can be by the level value of the port IO1 of control microprocessor 100, the command channel that gating is different; By controlling the level value of port IO2 of microprocessor 100, the Data-Link that gating is different; By controlling the level value of port IO3~IO5 of microprocessor 100, switch different port communication pattern or the mode of operations of CPLD.
In the application of GNSS receiver, the duty of GNSS receiver adopts the mechanism of state machine to move, and under different states, between microprocessor 100 and peripheral hardware and peripheral hardware and peripheral hardware, the connecting object of interface is not identical.Therefore, each port communication pattern of CPLD device 200 also can adopt the mechanism of state machine to arrange.Wherein, the corresponding a kind of holotype of a kind of state.CPLD device 200 carries out different software controls according to different patterns to the Programmable Logic Device of device inside, and the state different according to control port IO3~IO5 (level value) switches port communication pattern.
For example, microprocessor 100 is as shown in table 2 by the interconnected relationship of 8 kinds of port communication patterns of control port IO3~IO5 control CPLD device 200.
The port connection status of eight kinds of port communication patterns of table 2CPLD device
In table 2, except pattern 8 is for carrying out self-inspection for CPLD device 200 each serial ports, all the other 7 patterns are normal mode of operation.Wherein, " COMA~COMF " represents 6 serial ports of microprocessor 100, and " COM1~COM3 " represents three serial ports of GPS module, the serial ports of peripheral hardware after " Data-Link " expression Data-Link module gating, the serial ports of peripheral hardware after " order " expression command module gating.
In the specific implementation, the mapping relations of the port communication pattern shown in table 2 realize by carry out software control in CPLD device 200.Therefore, in the present embodiment, described programmable logic device (PLD) 200, also for port communication pattern described in each being set up one by one to GPIO interconnection mapping relations, and according to the current level value of a described N control port and described GPIO port interconnection mapping relations, logical device internal circuit is programmed, the corresponding GPIO port of level value that gating is current with described control port.And N control port on described microprocessor 100 is for by serial communication mode, indicate and control the port communication pattern of described programmable logic device (PLD).
In the present embodiment, in fact CPLD device 200 plays a kind of effect of port switch.And each input/output port of CPLD device 200 can be passed through the different level of 0R (zero ohm) wire jumper resistance selection.The object of design is the peripheral port for compatible varying level like this.While adopting 0R wire jumper resistance to carry out level switching to each GPIO port of CPLD device 200, can carry out piecemeal power supply to the input/output port of CPLD device 200, compatible with COM S (Complementary Metal Oxide Semiconductor simultaneously, complementary metal oxide semiconductor (CMOS)) and TTL (Transistor-Transistor Logic, logic gates) level standard.When different external units is connected on CPLD device 200, its serial ports level can be 3.3V or 5V.Therefore,, as long as the IO level of CPLD device 200 is designed to consistent with peripheral hardware serial ports level, and do not need extra level transferring chip, system complexity and the cost that can effectively reduce.CPLD device 200 core voltage can be passed through the different level of 0R wire jumper resistance selection simultaneously, and low level core voltage can make power consumption lower, and the chip price of high level core voltage is lower, therefore can take into account two factors of power consumption and cost.
The serial ports expansion device of embedded microprocessor provided by the invention, adopts programmable logic device (PLD) as bridge, between microprocessor and peripheral hardware in embedded system, and between peripheral hardware and peripheral hardware, provides one serial ports interconnect scheme flexibly.Microprocessor connects by programmable logic device (PLD) especially CPLD device, can be by setting up the mapping relations of GPIO port of microprocessor self serial ports and CPLD device, the serial ports of microprocessor is expanded to the GPIO port possessing for CPLD device, thereby be connected with external unit by the GPIO port of CPLD device.The present invention only need to pass through the software control to the internal logic circuit in programmable logic device (PLD), can realize the switching controls of each GPIO port to programmable logic device (PLD), without hardware circuit is carried out to any amendment, therefore convenient and simple to the expansion of microprocessor serial ports quantity, switch flexibly, cost poor efficiency is high, portable strong.
The above is the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications are also considered as protection scope of the present invention.

Claims (7)

1. a serial ports expansion device for embedded microprocessor, is characterized in that, comprises microprocessor and programmable logic device (PLD);
Described microprocessor comprises M serial ports and N control port; Described programmable logic device (PLD) comprises K universal input and output port; Wherein, K > M > 0, N > 0;
Described microprocessor, for arranging the port communication pattern of described programmable logic device (PLD) by a described N control port;
Described programmable logic device (PLD), for according to described port communication pattern, programmes to the Programmable Logic Device of device inside, controls the communication interconnect relation of each universal input and output port in described programmable logic device (PLD);
Each universal input and output port of described programmable logic device (PLD), be used for according to the communication interconnect relation of described universal input and output port, connect one or more peripherals, realize the signal transmission between described peripherals and described microprocessor, and/or, realize the signal transmission between described peripherals.
2. the serial ports expansion device of embedded microprocessor as claimed in claim 1, is characterized in that, described programmable logic device (PLD) is CPLD device.
3. the serial ports expansion device of embedded microprocessor as claimed in claim 1, is characterized in that, the port communication pattern of described programmable logic device (PLD) is indicated and controlled to the control port of the N on described microprocessor, for by parallel communication fashion.
4. the serial ports expansion device of embedded microprocessor as claimed in claim 3, it is characterized in that, the output level of N control port described in described microprocessor control, for forming the N bit of the port communication pattern of indicating described programmable logic device (PLD), the quantity of described port communication pattern is 2 n.
5. the serial ports expansion device of embedded microprocessor as claimed in claim 3, is characterized in that,
The level of any P control port of N control port described in described microprocessor control, for forming the P bit of the port communication pattern of indicating described programmable logic device (PLD), the quantity of described port communication pattern is 2 p, 0 < P < N;
The level of remaining (N-P) individual control port of described microprocessor control, carries out the peripherals of current port communication pattern for gating.
6. the serial ports expansion device of the embedded microprocessor as described in claim 4 or 5, it is characterized in that, described programmable logic device (PLD), also for port communication pattern described in each being set up one by one to serial ports interconnection mapping relations, and according to the current level value of a described N control port and described universal input and output port interconnection mapping relations, logical device internal circuit is programmed, the corresponding universal input and output port of level value that gating is current with described control port.
7. the serial ports expansion device of embedded microprocessor as claimed in claim 1, is characterized in that,
The port communication pattern of described programmable logic device (PLD) is indicated and controlled to N on a described microprocessor control port, for by serial communication mode.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106959932A (en) * 2017-04-14 2017-07-18 广东浪潮大数据研究有限公司 A kind of Riser card methods for designing of automatic switchover PCIe signals
CN111953498A (en) * 2020-07-31 2020-11-17 新华三技术有限公司 Signal transmission method and device
CN112199307A (en) * 2020-10-26 2021-01-08 英业达科技有限公司 Processing device with serial communication interface processing function and method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2867468Y (en) * 2005-12-23 2007-02-07 四川川大智胜软件股份有限公司 Real-time high-intelligence self-help bank security guarding synthetical monitor unit
KR20090109323A (en) * 2008-04-15 2009-10-20 문철홍 Emotion lighting system using led control device
CN201576432U (en) * 2009-12-03 2010-09-08 康佳集团股份有限公司 Multi-media display control unit
CN101860222A (en) * 2010-04-03 2010-10-13 东方电子股份有限公司 Unit serial connection type high-voltage frequency converter unit controller
CN103209431A (en) * 2012-01-11 2013-07-17 中国科学院沈阳自动化研究所 Wireless multi-channel data transceiver
CN103595607A (en) * 2012-08-14 2014-02-19 成都思迈科技发展有限责任公司 A multi-serial port network bridge with high reliability
CN203552057U (en) * 2013-11-28 2014-04-16 国网河南省电力公司三门峡供电公司 Transformer temperature controller check meter detection system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2867468Y (en) * 2005-12-23 2007-02-07 四川川大智胜软件股份有限公司 Real-time high-intelligence self-help bank security guarding synthetical monitor unit
KR20090109323A (en) * 2008-04-15 2009-10-20 문철홍 Emotion lighting system using led control device
CN201576432U (en) * 2009-12-03 2010-09-08 康佳集团股份有限公司 Multi-media display control unit
CN101860222A (en) * 2010-04-03 2010-10-13 东方电子股份有限公司 Unit serial connection type high-voltage frequency converter unit controller
CN103209431A (en) * 2012-01-11 2013-07-17 中国科学院沈阳自动化研究所 Wireless multi-channel data transceiver
CN103595607A (en) * 2012-08-14 2014-02-19 成都思迈科技发展有限责任公司 A multi-serial port network bridge with high reliability
CN203552057U (en) * 2013-11-28 2014-04-16 国网河南省电力公司三门峡供电公司 Transformer temperature controller check meter detection system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106959932A (en) * 2017-04-14 2017-07-18 广东浪潮大数据研究有限公司 A kind of Riser card methods for designing of automatic switchover PCIe signals
CN111953498A (en) * 2020-07-31 2020-11-17 新华三技术有限公司 Signal transmission method and device
CN111953498B (en) * 2020-07-31 2022-07-12 新华三技术有限公司 Signal transmission method and device
CN112199307A (en) * 2020-10-26 2021-01-08 英业达科技有限公司 Processing device with serial communication interface processing function and method thereof

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