CN107027039A - Discrete cosine transform implementation method based on efficient video coding standard - Google Patents
Discrete cosine transform implementation method based on efficient video coding standard Download PDFInfo
- Publication number
- CN107027039A CN107027039A CN201710242830.9A CN201710242830A CN107027039A CN 107027039 A CN107027039 A CN 107027039A CN 201710242830 A CN201710242830 A CN 201710242830A CN 107027039 A CN107027039 A CN 107027039A
- Authority
- CN
- China
- Prior art keywords
- discrete cosine
- matrix
- pixel values
- matrixes
- points
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
- H04N19/625—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding using discrete cosine transform [DCT]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
- H04N19/59—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Discrete Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Complex Calculations (AREA)
Abstract
A kind of discrete cosine transform implementation method based on efficient video coding standard, implements step as follows：(1) Image Residual pixel is obtained；(2) residual pixel matrix is read；(3) any a line pixel value is read；(4) 32 butterfly conversion；(5) 16 butterfly conversion；(6) 8 butterfly conversion；(7) 4 discrete cosine transforms；(8) adjustment pixel value order；(9) last column is judged whether；(10) two-dimension discrete cosine transform；(11) last matrix is judged whether；(12) output code flow.The present invention can effectively overcome the problem of discrete cosine transform implementation method hardware spending is larger in the prior art, reduce the hardware spending in cataloged procedure so that image can be compressed well.
Description
Technical field
The invention belongs to image coding technology field, the one kind further related in Image Compression field is based on height
Imitate the discrete cosine transform implementation method of video encoding standard.The present invention can be used for network image processing, satellite image transmission etc.
The compressed encoding of image/video in field.
Background technology
As the video encoding standard of a new generation, efficient video coding standard is regarded mainly for high definition and ultra high-definition resolution ratio
The compression of frequency is improved, compared to H.264/AVC standard before, in the case of identical compression effectiveness, code stream size
Only the former half.Efficient video coding standard is divided into intraframe coding and interframe encode two parts, and for intraframe coding, it is adopted
It is that compression of the discrete cosine transform to realize video pixel is handled, image energy is converted in the dispersed distribution of spatial domain
It is distributed in the Relatively centralized of transform domain, to reach the purpose for removing spatial redundancy.Because discrete cosine transform calculates complicated, hard
Need to use substantial amounts of multiplier to carry out computing in part implementation process, and need between storage one-dimensional transform and two-dimensional transform
Result, therefore general discrete cosine transform method needs to consume substantial amounts of hardware resource, while adding encoder fortune
Capable hardware power consumption.
There is plurality of discrete cosine transform hardware design structure to be suggested at present, be for example widely used at present based on
The method of multiplexing structure, the method make use of the decomposable feature of dct coefficient matrix so that the change of large-size
Changing structure can be realized using the mapped structure of reduced size, therefore saves the hard of reduced size mapped structure is implemented separately
Part expense, but still need many multiplication and calculate, critical path is longer, seriously limits the working frequency of encoder, and
The throughput requirement to high definition ultra high-definition Video compression can not be reached.
In its patent document applied, " video compiles solution in a kind of HEVC standard for Ingenic Semiconductor Co., Ltd.
Code conversion method and device " (number of patent application：CN 201510226992.4, publication number：CN 106210715A) in construct
A kind of dct transform method that utilization butterfly mapped structure is realized, this method is smaller using being multiplexed based on butterfly shift theory
The method of dimension D CT mapped structures, realizes larger sized dct transform, process saves be multiplexed reduced size conversion knot
The hardware spending of structure, and various sizes of discrete cosine transform can be realized, but the deficiency that this method still has is：Butterfly
Calculating in conversion process is still realized using multiplier, causes hardware to realize that expense is larger.
Patent document " a kind of two-stage DCT coefficient based on dirty position suitable for HEVC standard that Fudan University applies at it
Storage method " (number of patent application：CN 201510787966.9, publication number：CN 105430419A) in disclose a kind of improvement
The storage method of two-stage DCT coefficient.DCT coefficient is divided into sign bit, three portions of high position data and low data by this method first
Point, then using random access memory SRAM as the first order in storage hierarchy, reuse in register storage hierarchy
The second level, this method reduces hardware costs by the storage strategy of stratification.But, the weak point that this method still has
It is：The high position data of secondary data is stored using register, causes the hardware spending of this part than larger.
The content of the invention
The purpose of the present invention is to be directed to above-mentioned the deficiencies in the prior art, it is proposed that a kind of based on efficient video coding standard
Discrete cosine transform implementation method, replaces multiplier using multiplexing structure, addition displacement and uses random access memory
SRAM stores the method for intermediate data to reduce hardware spending, solves the problem of encoder hardware power consumption is larger, and improve
The working frequency of encoder.
What the present invention was realized comprises the following steps that：
(1) residual pixel of image to be encoded is obtained：
According to efficient video coding standard, to the frame image to be encoded of input, roughing and prediction are carried out, residual error picture is obtained
Element；
(2) residual pixel matrix is read：
32 × 32 size residual pixel matrixes are arbitrarily read from the residual pixel of image to be encoded；
(3) it is any from residual pixel matrix to read the whole pixel values of a line；
(4) processing data of 32 butterfly conversion is obtained：
The whole pixel values head and the tail for reading row are added successively, preceding 16 processing datas of 32 butterfly conversion are obtained,
The whole pixel values head and the tail for reading row are subtracted each other successively again, rear 16 processing datas of 32 butterfly conversion are obtained；
(5) 16 pixel values after 32 discrete cosine transforms are obtained：
32 dct coefficient matrixs are decomposed into by (5a) using 32 discrete cosine transformation matrix decomposition formulas
32 butterfly transformation matrixs, 32 split-matrixes and 32 points change three matrixes of sequence matrix；
(5b) 16 processing datas by after are multiplied with the coefficient matrix of the size of the lower right corner 16 × 16 in 32 split-matrixes, obtain
To rear 16 pixel values of 32 discrete cosine transforms；
(6) processing data of 16 butterfly conversion is obtained：
Preceding 16 processing datas head and the tail are added successively, preceding 8 processing datas of 16 butterflies conversion are obtained, then incite somebody to action preceding 16
Individual processing data head and the tail subtract each other successively, obtain rear 8 processing datas of 16 butterfly conversion；
(7) 8 pixel values after 16 discrete cosine transforms are obtained：
16 dct coefficient matrixs are decomposed into by (7a) using 16 discrete cosine transformation matrix decomposition formulas
16 butterfly transformation matrixs, 16 split-matrixes and 16 points change three matrixes of sequence matrix；
(7b) 8 processing datas by after are multiplied with the coefficient matrix of 16 sizes of the split-matrix lower right corner 8 × 8, obtain 16
8 pixel values after point discrete cosine transform；
(8) processing data of 8 butterfly conversion is obtained：
Preceding 8 processing datas head and the tail are added successively, 8 butterflies is obtained and converts preceding 4 processing datas, then by first 8
Reason data head and the tail subtract each other successively, obtain 4 processing datas after 8 butterfly conversion；
(9) 4 pixel values after 8 discrete cosine transforms are obtained：
8 dct coefficient matrixs are decomposed into 8 by (9a) using 8 discrete cosine transformation matrix decomposition formulas
Point butterfly transformation matrix, 8 split-matrixes and 8 points change three matrixes of sequence matrix；
(9b) 4 processing datas by after are multiplied with the coefficient matrix of 8 sizes of the split-matrix lower right corner 4 × 4, obtain at 8 points
Rear 4 pixel values of discrete cosine transform；
(10) preceding 4 processing datas are multiplied with 4 discrete cosine transformation matrixes, obtain 4 of 4 discrete cosine transforms
Pixel value；
(11) adjustment pixel value order：
Rear 4 pixels that 4 pixel values and 8 discrete cosine transforms that (11a) obtains 4 discrete cosine transforms are obtained
Value merges, then changes sequence matrix multiple with 8 points, 8 after being adjusted discrete cosine transform all pixels value；
Rear 8 pictures that 8 pixel values and 16 discrete cosine transforms that (11b) obtains 8 discrete cosine transforms are obtained
Element value merges, then changes sequence matrix multiple with 16 points, 16 after being adjusted discrete cosine transform all pixels value；
Obtain latter 16 of 16 pixel values and 32 discrete cosine transforms that (11c) obtains 16 discrete cosine transforms
Pixel value merges, then changes sequence matrix multiple with 32 points, 32 after being adjusted discrete cosine transform all pixels value, and is stored in
In static RAM SRAM；
(12) judge whether to run through residual pixel values all in residual pixel matrix, if so, step (13) is then performed, it is no
Then, step (3) is performed；
(13) all residual pixel values are taken out from static RAM SRAM, 2-D discrete cosine change is carried out
Change, the residual pixel matrix after conversion is stored in register；
(14) judge whether to run through residual pixel matrixes all in image to be encoded, if so, step (15) is then performed, it is no
Then, step (2) is performed；
(15) exports coding code stream：
All residual pixel matrixes being stored into register merge, and carry out after quantization and entropy code, exports coding code stream.
The present invention has advantages below compared with prior art：
Firstth, due to the method that the present invention is converted using matrix decomposition and butterfly, by large-size discrete cosine transform
Structure multiplexing reduced size discrete cosine transform structure realize, while instead of making for multiplier using addition and displacement
With overcoming the problem of large scale pixel matrix discrete cosine transform hardware spending is larger in the prior art so that the present invention
The hardware power consumption of image compression process can be reduced.
Secondth, the present invention stores the side of the median of one-dimensional discrete cosine transform using static RAM SRAM
Method, because static RAM SRAM compared to register has the characteristics of hardware spending is small, is more suitable for a large amount of centres
The storage of pixel value, overcomes the problem of storage overhead for storing median pixel value using register in the prior art is larger, makes
Of the invention it can must further reduce the hardware spending for realizing intraframe coding discrete cosine transform.
Brief description of the drawings
Fig. 1 is the flow chart of the present invention；
Fig. 2 is using random access memory to store intermediate data schematic diagram in the embodiment of the present invention；
Embodiment
The present invention will be further described below in conjunction with the accompanying drawings.
Reference picture 1, what the present invention was realized comprises the following steps that.
Step 1, the residual pixel of image to be encoded is obtained.
According to efficient video coding standard, to the frame image to be encoded of input, roughing and prediction are carried out, residual error picture is obtained
Element.
Step 2, residual pixel matrix is read.
32 × 32 size residual pixel matrixes are arbitrarily read from the residual pixel of image to be encoded.
Step 3, it is any from residual pixel matrix to read the whole pixel values of a line.
Step 4, the processing data of 32 butterfly conversion is obtained.
The whole pixel values head and the tail for reading row are added successively, preceding 16 processing datas of 32 butterfly conversion are obtained,
The whole pixel values head and the tail for reading row are subtracted each other successively again, rear 16 processing datas of 32 butterfly conversion are obtained.
Step 5,16 pixel values after 32 discrete cosine transforms are obtained.
Using 32 discrete cosine transformation matrix decomposition formulas, 32 dct coefficient matrixs are decomposed at 32 points
Butterfly transformation matrix, 32 split-matrixes and 32 points change three matrixes of sequence matrix.
32 described discrete cosine transformation matrix decomposition formulas are as follows：
T32=B32·M32·P32
Wherein, T32Represent 32 dct coefficient matrixs, B32Represent 32 butterfly transformation matrixs, M32Represent 32
Point split-matrix, P32Represent that change sequence matrix at 32 points.
16 processing datas are multiplied with the coefficient matrix of the size of the lower right corner 16 × 16 in 32 split-matrixes by after, obtain 32
Rear 16 pixel values of point discrete cosine transform.
Step 6, the processing data of 16 butterfly conversion is obtained.
Preceding 16 processing datas head and the tail are added successively, preceding 8 processing datas of 16 butterflies conversion are obtained, then incite somebody to action preceding 16
Individual processing data head and the tail subtract each other successively, obtain rear 8 processing datas of 16 butterfly conversion.
Step 7,8 pixel values after 16 discrete cosine transforms are obtained.
Using 16 discrete cosine transformation matrix decomposition formulas, 16 dct coefficient matrixs are decomposed at 16 points
Butterfly transformation matrix, 16 split-matrixes and 16 points change three matrixes of sequence matrix.
16 described discrete cosine transformation matrix decomposition formulas are as follows：
T16=B16·M16·P16
Wherein, T1616 dct coefficient matrixs are represented, with 32 size systems of the split-matrix upper left corner 16 × 16
Matrix number is identical, B16Represent 16 butterfly transformation matrixs, M16Represent 16 split-matrixes, P16Represent that change sequence matrix at 16 points.
8 processing datas are multiplied with the coefficient matrix of 16 sizes of the split-matrix lower right corner 8 × 8 by after, obtain 16 points from
Dissipate 8 pixel values after cosine transform.
Step 8, the processing data of 8 butterfly conversion is obtained.
Preceding 8 processing datas head and the tail are added successively, 8 butterflies is obtained and converts preceding 4 processing datas, then by first 8
Reason data head and the tail subtract each other successively, obtain 4 processing datas after 8 butterfly conversion.
Step 9,4 pixel values after 8 discrete cosine transforms are obtained.
Using 8 discrete cosine transformation matrix decomposition formulas, 8 dct coefficient matrixs are decomposed into 8 butterflies
Fractal transform matrix, 8 split-matrixes and 8 points change three matrixes of sequence matrix.
8 described discrete cosine transformation matrix decomposition formulas are as follows：
T8=B8·M8·P8
Wherein, T88 dct coefficient matrixs are represented, with 16 size coefficient squares of the split-matrix upper left corner 8 × 8
Identical, the B of battle array8Represent 8 butterfly transformation matrixs, M8Represent 8 split-matrixes, P8Represent that change sequence matrix at 8 points；
4 processing datas are multiplied with the coefficient matrix of 8 sizes of the split-matrix lower right corner 4 × 4 by after, obtain 8 points it is discrete
Rear 4 pixel values of cosine transform.
Step 10, preceding 4 processing datas are multiplied with 4 discrete cosine transformation matrixes, obtain 4 discrete cosine transforms
4 pixel values.
Step 11, adjustment pixel value order.
Rear 4 pixel values that 4 pixel values and 8 discrete cosine transforms that 4 discrete cosine transforms are obtained are obtained are closed
And, then sequence matrix multiple is changed with 8 points, 8 after being adjusted discrete cosine transform all pixels value；
Rear 8 pixel values that 8 pixel values and 16 discrete cosine transforms that 8 discrete cosine transforms are obtained are obtained are closed
And, then sequence matrix multiple is changed with 16 points, 16 after being adjusted discrete cosine transform all pixels value；
Rear 16 pixels that 16 pixel values and 32 discrete cosine transforms that 16 discrete cosine transforms are obtained are obtained
Value merges, then changes sequence matrix multiple with 32 points, 32 after being adjusted discrete cosine transform all pixels value, and is stored in static state
In random access memory SRAM, specific storage mode is as shown in Figure 2.In figure SRAM1 to SRAM16 represent 16 static state with
Machine accesses memory SRAM, and numerical value represents (0,0) to (3,15) seat of the pixel value in 32 × 32 size picture element matrixs respectively
Mark.
Step 12, judge whether to run through residual pixel values all in residual pixel matrix, if so, step 13 is then performed,
Otherwise, step 3 is performed.
Step 13, all residual pixel values are taken out from static RAM SRAM, are carried out more than two-dimensional discrete
String is converted, and the residual pixel matrix after conversion is stored in register.
Step 14, judge whether to run through residual pixel matrixes all in image to be encoded, if so, step 15 is then performed,
Otherwise, step 2 is performed.
Step 15, exports coding code stream.
All residual pixel matrixes being stored into register merge, and carry out after quantization and entropy code, exports coding code stream.
The effect of the present invention is further described with reference to emulation experiment.
1st, emulation experiment condition：
The selected efficient video coding standard official software model version of emulation experiment of the present invention is 16.0, and hardware is realized
Platform is ISE Design Suite 14.3, and emulation tool is Modelsim 10.1b, and synthesis tool uses Design
Compiler。
2nd, emulation experiment content and analysis：
On platform ISE Design Suite 14.3, complete to be based on efficient video coding standard according to the inventive method
Discrete cosine transform realization, emulated using Modelsim 10.1b, and integrated with Design Compiler and obtain hard
Part expense, emulation experiment data are as shown in table 1.
The emulation experiment data of the present invention of table 1
From the emulation experiment data of table 1, butterfly transform method of the present invention and deposited using arbitrary access
Reservoir SRAM replaces the method that general register stores intermediate data, is applied to the discrete cosine transform of different resolution image
In method, the hardware spending in discrete cosine transform implementation process can be reduced to a certain extent.Wherein, discrete cosine transform
Part can save about 27%~29% hardware spending, and discrete cosine transform intermediate data storage part can reduce about 7%~
9% hardware spending.
Claims (4)
1. a kind of discrete cosine transform implementation method based on efficient video coding standard, comprises the following steps：
(1) residual pixel of image to be encoded is obtained：
According to efficient video coding standard, to the frame image to be encoded of input, roughing and prediction are carried out, residual pixel is obtained；
(2) residual pixel matrix is read：
32 × 32 size residual pixel matrixes are arbitrarily read from the residual pixel of image to be encoded；
(3) it is any from residual pixel matrix to read the whole pixel values of a line；
(4) processing data of 32 butterfly conversion is obtained：
The whole pixel values head and the tail for reading row are added successively, preceding 16 processing datas of 32 butterfly conversion are obtained, then will
The whole pixel values head and the tail for reading row subtract each other successively, obtain rear 16 processing datas of 32 butterfly conversion；
(5) 16 pixel values after 32 discrete cosine transforms are obtained：
32 dct coefficient matrixs are decomposed at 32 points by (5a) using 32 discrete cosine transformation matrix decomposition formulas
Butterfly transformation matrix, 32 split-matrixes and 32 points change three matrixes of sequence matrix；
(5b) 16 processing datas by after are multiplied with the coefficient matrix of the size of the lower right corner 16 × 16 in 32 split-matrixes, obtain 32
Rear 16 pixel values of point discrete cosine transform；
(6) processing data of 16 butterfly conversion is obtained：
Preceding 16 processing datas head and the tail are added successively, preceding 8 processing datas of 16 butterfly conversion are obtained, then by first 16
Reason data head and the tail subtract each other successively, obtain rear 8 processing datas of 16 butterfly conversion；
(7) 8 pixel values after 16 discrete cosine transforms are obtained：
16 dct coefficient matrixs are decomposed at 16 points by (7a) using 16 discrete cosine transformation matrix decomposition formulas
Butterfly transformation matrix, 16 split-matrixes and 16 points change three matrixes of sequence matrix；
(7b) 8 processing datas by after are multiplied with the coefficient matrix of 16 sizes of the split-matrix lower right corner 8 × 8, obtain 16 points from
Dissipate 8 pixel values after cosine transform；
(8) processing data of 8 butterfly conversion is obtained：
Preceding 8 processing datas head and the tail are added successively, 8 butterflies is obtained and converts preceding 4 processing datas, then will first 8 processing numbers
Subtract each other successively according to head and the tail, obtain 4 processing datas after 8 butterfly conversion；
(9) 4 pixel values after 8 discrete cosine transforms are obtained：
8 dct coefficient matrixs are decomposed into 8 butterflies by (9a) using 8 discrete cosine transformation matrix decomposition formulas
Fractal transform matrix, 8 split-matrixes and 8 points change three matrixes of sequence matrix；
(9b) 4 processing datas by after are multiplied with the coefficient matrix of 8 sizes of the split-matrix lower right corner 4 × 4, obtain 8 points it is discrete
Rear 4 pixel values of cosine transform；
(10) preceding 4 processing datas are multiplied with 4 discrete cosine transformation matrixes, obtain 4 pixels of 4 discrete cosine transforms
Value；
(11) adjustment pixel value order：
Rear 4 pixel values that 4 pixel values and 8 discrete cosine transforms that (11a) obtains 4 discrete cosine transforms are obtained are closed
And, then sequence matrix multiple is changed with 8 points, 8 after being adjusted discrete cosine transform all pixels value；
Rear 8 pixel values that 8 pixel values and 16 discrete cosine transforms that (11b) obtains 8 discrete cosine transforms are obtained
Merge, then sequence matrix multiple is changed with 16 points, 16 after being adjusted discrete cosine transform all pixels value；
Rear 16 pixels that 16 pixel values and 32 discrete cosine transforms that (11c) obtains 16 discrete cosine transforms are obtained
Value merges, then changes sequence matrix multiple with 32 points, 32 after being adjusted discrete cosine transform all pixels value, and is stored in static state
In random access memory SRAM；
(12) judge whether to run through residual pixel values all in residual pixel matrix, if so, step (13) is then performed, otherwise,
Perform step (3)；
(13) all residual pixel values are taken out from static RAM SRAM, two-dimension discrete cosine transform is carried out,
By in the residual pixel matrix deposit register after conversion；
(14) judge whether to run through residual pixel matrixes all in image to be encoded, if so, step (15) is then performed, otherwise,
Perform step (2)；
(15) exports coding code stream：
All residual pixel matrixes being stored into register merge, and carry out after quantization and entropy code, exports coding code stream.
2. the discrete cosine transform implementation method according to claim 1 based on efficient video coding standard, its feature exists
In 32 discrete cosine transformation matrix decomposition formulas described in step (5a) are as follows：
T32=B32·M32·P32
Wherein, T32Represent 32 dct coefficient matrixs, B32Represent 32 butterfly transformation matrixs, M32Represent 32 points minutes
Dematrix, P32Represent that change sequence matrix at 32 points.
3. the discrete cosine transform implementation method according to claim 1 based on efficient video coding standard, its feature exists
In 16 discrete cosine transformation matrix decomposition formulas described in step (7a) are as follows：
T16=B16·M16·P16
Wherein, T1616 dct coefficient matrixs are represented, with 32 size coefficient squares of the split-matrix upper left corner 16 × 16
Identical, the B of battle array16Represent 16 butterfly transformation matrixs, M16Represent 16 split-matrixes, P16Represent that change sequence matrix at 16 points.
4. the discrete cosine transform implementation method according to claim 1 based on efficient video coding standard, its feature exists
In 8 discrete cosine transformation matrix decomposition formulas described in step (9a) are as follows：
T8=B8·M8·P8
Wherein, T88 dct coefficient matrixs are represented, with 16 size coefficient matrix phases of the split-matrix upper left corner 8 × 8
Together, B8Represent 8 butterfly transformation matrixs, M8Represent 8 split-matrixes, P8Represent that change sequence matrix at 8 points.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710242830.9A CN107027039B (en) | 2017-04-14 | 2017-04-14 | Discrete cosine transform implementation method based on efficient video coding standard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710242830.9A CN107027039B (en) | 2017-04-14 | 2017-04-14 | Discrete cosine transform implementation method based on efficient video coding standard |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107027039A true CN107027039A (en) | 2017-08-08 |
| CN107027039B CN107027039B (en) | 2019-08-27 |
Family
ID=59526863
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710242830.9A Active CN107027039B (en) | 2017-04-14 | 2017-04-14 | Discrete cosine transform implementation method based on efficient video coding standard |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107027039B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114125461A (en) * | 2021-11-29 | 2022-03-01 | 成都国科微电子有限公司 | Universal video coding conversion circuit and universal video coding equipment |
| WO2023130653A1 (en) * | 2022-01-06 | 2023-07-13 | 苏州浪潮智能科技有限公司 | Data processing method and apparatus for image compression, device, and storage medium |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070250557A1 (en) * | 2006-04-24 | 2007-10-25 | National Taiwan University Of Science And Technology | Method and circuit for performing cordic based loeffler discrete cosine transformation (dct) for signal processing |
| US20100266008A1 (en) * | 2009-04-15 | 2010-10-21 | Qualcomm Incorporated | Computing even-sized discrete cosine transforms |
| CN102387367A (en) * | 2011-11-08 | 2012-03-21 | 复旦大学 | Universal method applied to kinds of video standards for multi-size two-dimensional integer cosine transform |
| CN103369326A (en) * | 2013-07-05 | 2013-10-23 | 西安电子科技大学 | Transition coder applicable to HEVC ( high efficiency video coding) standards |
| CN103380425A (en) * | 2011-01-10 | 2013-10-30 | 高通股份有限公司 | 32-point transform for media data coding |
| CN104811738A (en) * | 2015-04-23 | 2015-07-29 | 中国科学院电子学研究所 | Low-expense multi-standard 8*8 one-dimensional discrete cosine transform circuit based on resource sharing |
| CN105407358A (en) * | 2015-11-27 | 2016-03-16 | 上海富瀚微电子股份有限公司 | Integer DCT (Discrete Cosine Transformation) method based on HEVC (High Efficiency Video Coding) |
-
2017
- 2017-04-14 CN CN201710242830.9A patent/CN107027039B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070250557A1 (en) * | 2006-04-24 | 2007-10-25 | National Taiwan University Of Science And Technology | Method and circuit for performing cordic based loeffler discrete cosine transformation (dct) for signal processing |
| US20100266008A1 (en) * | 2009-04-15 | 2010-10-21 | Qualcomm Incorporated | Computing even-sized discrete cosine transforms |
| CN103380425A (en) * | 2011-01-10 | 2013-10-30 | 高通股份有限公司 | 32-point transform for media data coding |
| CN102387367A (en) * | 2011-11-08 | 2012-03-21 | 复旦大学 | Universal method applied to kinds of video standards for multi-size two-dimensional integer cosine transform |
| CN103369326A (en) * | 2013-07-05 | 2013-10-23 | 西安电子科技大学 | Transition coder applicable to HEVC ( high efficiency video coding) standards |
| CN104811738A (en) * | 2015-04-23 | 2015-07-29 | 中国科学院电子学研究所 | Low-expense multi-standard 8*8 one-dimensional discrete cosine transform circuit based on resource sharing |
| CN105407358A (en) * | 2015-11-27 | 2016-03-16 | 上海富瀚微电子股份有限公司 | Integer DCT (Discrete Cosine Transformation) method based on HEVC (High Efficiency Video Coding) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114125461A (en) * | 2021-11-29 | 2022-03-01 | 成都国科微电子有限公司 | Universal video coding conversion circuit and universal video coding equipment |
| CN114125461B (en) * | 2021-11-29 | 2023-07-14 | 成都国科微电子有限公司 | Universal video coding conversion circuit and universal video coding device |
| WO2023130653A1 (en) * | 2022-01-06 | 2023-07-13 | 苏州浪潮智能科技有限公司 | Data processing method and apparatus for image compression, device, and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107027039B (en) | 2019-08-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Budagavi et al. | Core transform design in the high efficiency video coding (HEVC) standard | |
| Aase et al. | A critique of SVD-based image coding systems | |
| CN107835431A (en) | Method and apparatus to Video coding and the method and apparatus to video decoding | |
| CN103227919B (en) | A kind of SVC coding method based on polycaryon processor Tilera | |
| CN102763416A (en) | Video encoding device, and video decoding device | |
| CN107027039B (en) | Discrete cosine transform implementation method based on efficient video coding standard | |
| CN103369326A (en) | Transition coder applicable to HEVC ( high efficiency video coding) standards | |
| WO2023130653A1 (en) | Data processing method and apparatus for image compression, device, and storage medium | |
| CN102595112B (en) | Method for coding and rebuilding image block in video coding | |
| CN102572436B (en) | Intra-frame compression method based on CUDA (Compute Unified Device Architecture) | |
| Yang et al. | A low complexity block-based adaptive lossless image compression | |
| CN104869426A (en) | JPEG coding method lowering image diamond effect under low compression code rate | |
| CN102256126A (en) | Method for coding mixed image | |
| CN103299638B (en) | Self-adaptive scanning device and scan method thereof | |
| Krishnamoorthi et al. | A new integer image coding technique based on orthogonal polynomials | |
| CN206962992U (en) | 3 for digital video decoding multiply 3 Integer DCT Transform quantizers | |
| CN104661036A (en) | Video encoding method and system | |
| CN104602026B (en) | A kind of reconstruction loop structure being multiplexed entirely encoder under HEVC standard | |
| Rani et al. | Comparative analysis of image compression using dct and dwt transforms | |
| Li et al. | A video coding algorithm using vector-based techniques | |
| Al-Tamimi et al. | Image Compression Using Hirarchical Linear Polynomial Coding | |
| CN103491375A (en) | JPEG compression system based on bin DCT algorithm | |
| CN105850137B (en) | Use the method for the matrix coder for representing static image or video to matrix, especially according to the wavelet series of image change and the wavelet transformation of each small wave scale difference quantizing factor | |
| Qu et al. | The Design and Implementation of the Core Algorithm of Embedded Real-Time Image Compression Technology | |
| Sang et al. | Multi-dimensional vector discrete cosine transform coefficients matrix scan mode for image compression |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |