CN206962992U - 3 for digital video decoding multiply 3 Integer DCT Transform quantizers - Google Patents
3 for digital video decoding multiply 3 Integer DCT Transform quantizers Download PDFInfo
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Abstract
3 multiply 3 Integer DCT Transform quantizers for digital video decoding the utility model proposes a kind of, giving corresponding 3 multiplies 3 integer ID CT inverse transformation inverse DCTs simultaneously, it is more to solve the operation times of 4 × 4 integer DCT kernel kernal mappings in existing digital video decoding, the problem of calculating time is long, including the block device of present frame 3 × 3, 3 × 3 integer DCT kernel kernal mapping devices, scalar quantization device and 3 × 3 image transform block transmitters afterwards, the block device of present frame 3 × 3 is connected with 3 × 3 integer DCT kernel kernal mapping devices, 3 × 3 integer DCT kernel kernal mappings devices are connected with rear scalar quantization device, scalar quantization device is connected with 3 × 3 image transform block transmitters afterwards.Compared with using 4 × 4 Integer DCT Transforms, for the color high-definition frame of video of one 1920 × 1080, the utility model multiplying number reduces 33.3%；Signed magnitude arithmetic(al) number reduces 33.3%, while decoding video frame PSNR is improved.
Description
Technical field
It the utility model is related to the technical field of compression of digital video encoding and decoding, and in particular to one kind is used for digital video and compiled
Decoding 3 multiplies 3 Integer DCT Transform quantizers, while give that it matches 3 multiply 3 integer ID CT inverse transformation inverse DCTs.
Background technology
H.264 and H.265 video encoding and decoding standard all employs 4 × 4 Integer DCT Transforms, and encoding and decoding end is required for normalizing
Change, quantization is combined with transform normalization, is realized by multiplication, displacement.The AVS standards that China has independent intellectual property right use
8 × 8 Integer DCT Transforms, coding side carry out transform normalization, and quantization is combined with transform normalization, real by multiplication and displacement
It is existing.The generation of Integer DCT Transform solves the problems, such as that computational accuracy error is big and code efficiency is low, is characterized in using integer transform
Matrix replaces DCT floating number transformation matrix, and such conversion process is entirely integer arithmetic, in the absence of trueness error, be ensure that
The invertibity of coding, while multiplication of integers can be replaced with addition and subtraction and shift operation, operand is greatly reduced.
4 × 4 Integer DCT Transforms can be expressed as：
In formula (1), X represents original picture block, and Y represents obtained DCT coefficient.It is in 4 × 4 integer transforms
Core 2D conversion.E4fIt is scale factor matrix,RepresentEach element will be multiplied by matrix E4fMiddle identical bits
The corresponding zoom factor put, and
4 × 4 integer ID CT inverse transformations are expressed as：
In formula (2), the image block that IDCT inverse transformations obtain is passed through in the dct transform coefficient of Y representative image blocks, X ' expressions.
4 × 4 Integer DCT Transforms are orthogonally transformed.For 4 × 4 Integer DCT Transforms, the computing of its core 2D conversion
Measure and be：Multiplication (multiplying 2 computings) 32 times, addition and subtraction 96 times.For the color high-definition frame of video of one 1920 × 1080, using 4：2：
0 sub-sampling form then needs 194400 4 × 4 Integer DCT Transforms, and it is secondary that its core 2D converts the multiplication (multiplying 2 computings) needed
Number is 6220800, and addition and subtraction number is 18662400.
In order to further reduce operand, 4 × 4 integer DCT kernel kernal mappings can be completed in two steps：First to the every of image block
One row do one-dimensional transform, then do one-dimensional transform to every a line of transformation results.The operand of line translation is identical with rank transformation, can profit
4 × 4 integer DCT kernel kernal mappings are realized with following butterfly computation：
First, one-dimensional rank transformation is carried out using butterfly computation to original picture block X in formula (1)：
Carry out computing, wherein xn, n=0,1,2,3 is the element of either rank in X, and one-dimensional rank transformation result is pn, n=0,1,
2,3, one-dimensional rank transformation needs to do four times, carries out one-dimensional rank transformation to X 4 row respectively, i.e.,：
The input of first time butterfly computation is x0=x00, x1=x10, x2=x20, x3=x30, export as p0=p00, p1=p10,
p2=p20, p3=p30；
Second of butterfly computation input is x0=x01, x1=x11, x2=x21, x3=x31, export as p0=p01, p1=p11,
p2=p21, p3=p31；
The input of third time butterfly computation is x0=x02, x1=x12, x2=x22, x3=x32, export as p0=p02, p1=p12,
p2=p22, p3=p32；
4th butterfly computation input is x0=x03, x1=x13, x2=x23, x3=x33, export as p0=p03, p1=p13,
p2=p23, p3=p33；
The result of four one-dimensional rank transformations multiplies 4 matrixes for 4
Then multiply 4 matrix P to 4 and carry out transposition, generation 4 multiplies 4 matrix Q, i.e. Q=PT；
Butterfly computation finally is used to Q：
Carry out computing, wherein qn, n=0,1,2,3 is the element of either rank in Q, and one-dimensional rank transformation result is en, n=0,1,
2,3, one-dimensional rank transformation needs to do four times, carries out one-dimensional rank transformation to Q 4 row respectively, the result of 4 one-dimensional rank transformations multiplies 4 for 4
Matrix E.
Equally, 4 × 4 integer ID CT, which convert core 2D conversion, also can correspondingly use butterfly computation.
4 × 4 Integer DCT Transform core 2D conversion operand be：Multiplication (multiplying 2 computings) 16 times, addition and subtraction 64 times.For
The color high-definition frame of video of one 1920 × 1080, using 4：2：0 sub-sampling form, then existing 4 × 4 integer DCT is needed to become
Multiplication (the multiplying 2 computings) number for the core 2D conversion changed is 3110400, and addition and subtraction number is 12441600.
Utility model content
For the kernel kernal mapping of 4 × 4 Integer DCT Transforms operation times it is more, calculate the time length technical problem, this practicality
New proposition is a kind of 3 to multiply 3 Integer DCT Transform quantizers for digital video decoding, and multiplying 3 Integer DCT Transforms by 3 realizes
The compressed encoding of digital video is smaller than multiplying 4 Integer DCT Transform amounts of calculation using 4.
In order to solve the above-mentioned technical problem, the technical solution of the utility model is：
3 × 3 Integer DCT Transforms can be expressed as：
In formula (3), DCT coefficient that Y representation transformations obtain, X represents to enter 3 × 3 block of pixels of line translation, xij,i,j
=0,1,2 represents the element that i rows j is arranged in X, C3XC3 TIt is the core 2D conversion in integer transform.E3It is scale factor matrix,
Represent (C3XC3 T) each element will be multiplied by matrix E3The corresponding zoom factor of middle same position, and
Correspondingly, 3 × 3 integer ID CT inverse transformations can be expressed as：
In formula (4), the image block that IDCT inverse transformations obtain is passed through in the dct transform coefficient of Y representative image blocks, X ' expressions.
It is a kind of 3 to multiply 3 Integer DCT Transform quantizers, including the block device of present frame 3 × 3,3 for digital video decoding
× 3 integer DCT kernel kernal mappings devices, rear scalar quantization device and 3 × 3 image transform block transmitters, the block device of present frame 3 × 3 and 3 ×
3 integer DCT kernel kernal mapping devices are connected, and 3 × 3 integer DCT kernel kernal mappings devices are connected with rear scalar quantization device, rear scalar quantization
Device is connected with 3 × 3 image transform block transmitters；The block device of present frame 3 × 3 divides the current frame image in video encoder
3 × 3 integer DCT kernel kernal mapping devices are sent to successively into the image block that block size is 3 × 3, and the image block that size is 3 × 3；3
× 3 integer DCT kernel kernal mappings devices carry out integer DCT kernel kernal mappings to image block, and rear scalar quantization device is to integer DCT kernel kernal mappings
Image block afterwards is zoomed in and out and quantified, and the size that 3 × 3 image transform block transmitters send rear scalar quantization device is 3 × 3
Image block be converted into serial data, the Video Decoder of recipient is sent to by transmission channel.
3 × 3 integer DCT kernel kernal mappings device includes the first one-dimensional rank transformation device, the first storage deferring device and the 2nd 1
Tie up rank transformation device；The first one-dimensional rank transformation device is connected with the first storage deferring device, the first storage deferring device and the 2nd 1
Dimension rank transformation device is connected；First one-dimensional rank transformation device carries out one-dimensional rank transformation generation change to 3 × 3 image block X each column respectively
Matrix S is changed, the first storage deferring device carries out transposition generator matrix T to transformation matrix S, and the second one-dimensional rank transformation device is in matrix T
Each column carry out one-dimensional rank transformation generator matrix W successivelyf。
Multiply that 3 Integer DCT Transform quantizers are corresponding 3 to be multiplied 3 integer ID CT inverse transformations inverse DCTs and include 3 × 3 images with 3
Convert module generator, inverse quantization pre-scaler, 3 × 3 integer ID CT kernel kernal mappings devices, 3 × 3 image block followers, 3 × 3 images
Conversion module generator is connected with inverse quantization pre-scaler, and inverse quantization pre-scaler is connected with 3 × 3 integer ID CT kernel kernal mapping devices
Connect, 3 × 3 integer ID CT kernel kernal mappings devices are connected with 3 × 3 image block followers；3 × 3 images conversion module generator will decode
The image coding information that device receives generates 3 × 3 image transform blocks, and inverse quantization pre-scaler converts module generator to 3 × 3 images
3 × 3 image transform blocks of generation carry out inverse quantization and pre- scaling, and 3 × 3 integer ID CT kernel kernal mappings devices are to inverse quantization pre-scaler
Image block after processing carries out 3 × 3 integer ID CT kernel kernal mappings, and 3 × 3 image block followers are to 3 × 3 integer ID CT kernel kernal mappings
Result afterwards is post-processed, and exports the image block of 3 × 3 pixels.
3 × 3 integer ID CT kernel kernal mappings device includes the 3rd one-dimensional rank transformation device, the second storage deferring device and the 4th 1
Rank transformation device is tieed up, the 3rd one-dimensional rank transformation device and the second storage deferring device are connected, the second storage deferring device and the 4th 1
Dimension rank transformation device is connected；The 3rd one-dimensional rank transformation device is respectively to pending image block WIEach column carry out it is one-dimensional row become
Generation transformation matrix R is changed, the second storage deferring device carries out transposition generator matrix H, the 4th one-dimensional rank transformation device pair to transformation matrix R
The each column of matrix H carries out one-dimensional rank transformation, generates the image block G after integer ID CT kernel kernal mappings.
Quantization of the present utility model and inverse quantization, the amount of calculation of the scaling and calculating of 4 × 4 Integer DCT Transforms and inverse transformation
Measure identical, both depend on pixel count in frame, the operation times of core 2D conversion are than 4 × 4 Integer DCT Transforms and the calculating of inverse transformation
Amount is few, and decoded reconstruction frame of video PSNR mass is also higher than 4 × 4 Integer DCT Transforms and the quality of inverse transformation.For one 3
× 3 Integer DCT Transforms, the operand of its core 2D conversion are：Multiplication (multiplying 2 computings) 6 times, addition and subtraction 30 times.For one
1920 × 1080 color high-definition frame of video, using 4：2：0 sub-sampling form, then 345600 3 × 3 integer DCT are needed to become
Change, multiplication (multiplying 2 computings) number 2073600 that its core 2D conversion needs is that addition and subtraction number is 10368000.In order to enter one
Step reduces operand, and 3 × 3 integer DCT kernel kernal mappings can be completed in two steps：One-dimensional transform first is done to image block X each row,
One-dimensional transform is done to every a line of transformation results again, carry out butterfly computation can also be computed repeatedly using the inside.Utilize butterfly
The Integer DCT Transform core 2D of computing 3 × 3 conversion operand be：Multiplication (multiplying 2 computings) 6 times, addition and subtraction 24 times.For one
1920 × 1080 color high-definition frame of video, using 4：2：0 sub-sampling form, then 345600 3 × 3 integer DCT are needed to become
Change, when using butterfly computation, multiplication (multiplying 2 computings) number that its core 2D conversion needs is 2073600, and addition and subtraction number is
8294400.Than the butterfly computation using 4 × 4 Integer DCT Transforms, the utility model multiplying (multiplying 2 computings) number reduces
1036800 times, reduce 33.3%；Signed magnitude arithmetic(al) number reduces 4147200 times, reduces 33.3%.
Brief description of the drawings
, below will be to embodiment in order to illustrate more clearly of the utility model embodiment or technical scheme of the prior art
Or the required accompanying drawing used is briefly described in description of the prior art, it should be apparent that, drawings in the following description are only
It is some embodiments of the utility model, for those of ordinary skill in the art, is not paying the premise of creative work
Under, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is 3 × 3 Integer DCT Transform quantizer structure block diagram of the present utility model.
Fig. 2 is 3 × 3 integer ID CT inverse transformation quantizer structure block diagrams of the present utility model.
Fig. 3 is 3 × 3 integer DCT kernel kernal mapping device structured flowcharts of the present utility model.
Fig. 4 is 3 × 3 integer ID CT kernel kernal mapping device structured flowcharts of the present utility model.
Fig. 5 is 3 × 3 Integer DCT Transform quantizer of the present utility model and 3 × 3 integer ID CT inverse transformation quantizer applications
In the design sketch of digital video coding-coding device.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out
Clearly and completely describing, it is clear that described embodiment is only the utility model part of the embodiment, rather than whole
Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is paid
The every other embodiment obtained, belong to the scope of the utility model protection.
As shown in figure 1, a kind of 3 multiply 3 Integer DCT Transform quantizers for digital video decoding, including present frame 3 ×
3 block devices 11,3 × 3 integer DCT kernel kernal mappings devices 12, the image transform block transmitter 14 of rear scalar quantization device 13 and 3 × 3, currently
The block device 11 of frame 3 × 3 is connected with 3 × 3 integer DCT kernel kernal mappings devices 12,3 × 3 integer DCT kernel kernal mappings devices 12 and rear scaling
Quantizer 13 is connected, and rear scalar quantization device 13 is connected with 3 × 3 image transform block transmitters 14.The block device of present frame 3 × 3
Current frame image in 11 video encoders is divided into the image block that block size is 3 × 3, and the image block that size is 3 × 3
3 × 3 integer DCT kernel kernal mappings devices 12 are sent to successively；3 × 3 integer DCT kernel kernal mappings devices 12 carry out integer DCT cores to image block
The heart is converted, and rear scalar quantization device 13 is zoomed in and out and quantified to the image block after integer DCT kernel kernal mappings, 3 × 3 image transform blocks
The image block that the size that transmitter 14 sends rear scalar quantization device 13 is 3 × 3 is converted into serial data, passes through transmission channel
It is sent to the Video Decoder of recipient.
3 × 3 integer DCT kernel kernal mappings device 12 carries out 3 × 3 integer DCT cores to the image block X that size is 3 × 3 and become
The method changed is：
In formula (5), WfRepresent integer DCT kernel kernal mappings result, the C of 3 × 3 image blocks3Be 3 × 3 integer rank transformation matrixes,It is that 3 × 3 integer line translation matrixes, X represent 3 × 3 image block pixel values to be transformed, xijRepresent in image block X to be transformed
The pixel value of i rows j row, wfijThe coefficient value of expression 3 × 3 integer DCT kernel kernal mappings domain i rows j row, i, j=0,1,2.
Scalar quantization device 13 is by kernel kernal mapping matrix of consequence W afterwardsfIn each element wfijQuantified and scaled, output 3
× 3 image change quantization blocks
In formula (6), zfijIt is the matrix Z after quantifyingfThe coefficient of middle i rows j row, round () are lower floor operation, QstepIt is
The quantization step of selection, quantization table H.264/AVC can be used, in H.264/AVC, it is optional to share 52 kinds of quantization steps.
PFijValue it is as shown in the table：I, j=0,1,2
The PF of table 1ijValue result
As shown in Fig. 2 with 33 × 3 inverse quantizations and integer ID CT inverse converters that to multiply 3 Integer DCT Transform quantizers corresponding
Structured flowchart, including 3 × 3 images conversion module generator 21, inverse quantization pre-scaler 22,3 × 3 integer ID CT kernel kernal mapping devices
23rd, 3 × 3 image block follower 24.Wherein, 3 × 3 images conversion module generator 21 is connected with inverse quantization pre-scaler 22, instead
Quantify pre-scaler 22 with 3 × 3 integer ID CT kernel kernal mappings devices 23 to be connected, 3 × 3 integer ID CT kernel kernal mappings devices 23 and 3 × 3
Image block follower 24 is connected.3 × 3 images convert the image coding information generation 3 that module generator 21 receives decoder
× 3 image transform blocks, 3 × 3 image transform blocks that inverse quantization pre-scaler 22 generates to 3 × 3 images conversion module generator 21 enter
Row inverse quantization and pre- scaling, 3 × 3 integer ID CT kernel kernal mappings devices 23 are carried out to the image block after the processing of inverse quantization pre-scaler 22
3 × 3 integer ID CT kernel kernal mappings, after 3 × 3 image block followers 24 are carried out to the image block after 3 × 3 integer ID CT kernel kernal mappings
Processing, 3 × 3 pixel image blocks after output processing.
3 × 3 image transform block Z that 3 × 3 images conversion storage decoder of module generator 21 receivesI, it is 3 × 3 images
Change quantization block ZfThe result of interchannel noise is addition of, and
Inverse quantization pre-scaler 22 is to image transform block ZICarry out inverse quantization and pre- scaling, inverse quantization and pre- zoom operations knot
Close and carry out, and be multiplied by factor 64, operation is as follows：
For the output of inverse quantization and pre-scaler 22, and
wij=zij·Qstep·PFij64, i, j=0,1,2,
zijIt is ZIIn the i-th row jth arrange element, wijIt is matrix WIIn the i-th row jth arrange element；QstepIt is the amount of selection
Change step-length, quantization table H.264/AVC can be used, in H.264/AVC, it is optional to share 52 kinds of quantization steps；
PFijValue it is as shown in table 1 below.
3 × 3 integer ID CT kernel kernal mappings device 23 is to image array WI3 × 3 integer ID CT kernel kernal mappings are carried out to obtain
Image block matrix
3 × 3 image block follower 24 passes throughEnter row coefficient amendment, obtain output image block
X ', wherein, round () is lower floor operation.
3 × 3 integer DCT kernel kernal mappings devices 12 complete 3 × 3 integer DCT kernel kernal mappings in two steps：First to the every of image block X
One row do one-dimensional rank transformation, then do one-dimensional line translation to the result of one-dimensional rank transformation, in order to reuse designed one-dimensional row
Translation circuit, one-dimensional line translation first can make transposition to the result of one-dimensional rank transformation, then do one-dimensional rank transformation to transposition result.Such as
Shown in Fig. 3,3 × 3 integer DCT kernel kernal mappings devices 12 include the first one-dimensional rank transformation device 1201, first and store deferring device 1202, the
Two one-dimensional rank transformation devices 1203.Wherein, the first one-dimensional rank transformation device 1201 is connected with the first storage deferring device 1202, and first deposits
Storage deferring device 1202 is connected with the second one-dimensional rank transformation device 1203.First one-dimensional rank transformation device 1201 is respectively to image block X's
Each column carries out one-dimensional rank transformation generation transformation matrix S, and the first storage deferring device 1202 carries out transposition generation transposition to transformation matrix S
Matrix T, the second one-dimensional rank transformation device 1203 carry out one-dimensional rank transformation generator matrix W to each column in transposed matrix T successivelyf。
The first one-dimensional rank transformation device 1201 uses butterfly computation：
Carry out computing, wherein xn, n=0,1,2 is the element of either rank in formula (5) image block X, and one-dimensional rank transformation result is
sn, n=0,1,2, one-dimensional rank transformation needs to do three times, carries out one-dimensional rank transformation to image block X 3 row respectively, three times one-dimensional row
The result of conversion multiplies 3 transformation matrix S for 3.Specifically,
The input of first time butterfly computation is x0=x00, x1=x10, x2=x20, export as s0=s00, s1=s10, s2=s20；
Second of butterfly computation input is x0=x01, x1=x11, x2=x21, export as s0=s01, s1=s11, s2=s21；
The input of third time butterfly computation is x0=x02, x1=x12, x2=x22, export as s0=s02, s1=s12, s2=s22；
The result of one-dimensional rank transformation multiplies 3 matrixes for 3 three times
The first storage deferring device 1202 multiplies 3 matrix S to 3 and carries out transposition, and generation 3 multiplies 3 matrixes
That is T=ST。
The second one-dimensional rank transformation device 1203 uses butterfly computation：
Carry out computing, wherein tn, n=0,1,2 is the element of either rank in matrix T, and one-dimensional rank transformation result is wfn, n=
0,1,2, one-dimensional rank transformation needs to do three times, carries out one-dimensional rank transformation to matrix T 3 row respectively, three times the knot of one-dimensional rank transformation
Fruit multiplies 3 matrix Ws for 3f。
Specifically,
The input of first time butterfly computation is t0=t00, t1=t10, t2=t20, export as wf0=wf00, w1=wf01, wf2=
wf02；
Second of butterfly computation input is t0=t01, t1=t11,t2=t21, export as wf0=wf10, wf1=wf11, wf2=
wf12；
The input of third time butterfly computation is t0=t02, t1=t12, t2=t22, export as wf0=wf20, wf1=wf21, wf2=
wf22；The result of one-dimensional rank transformation multiplies 3 matrix Ws for 3 three timesf。
Using butterfly computation, the operand of 3 × 3 Integer DCT Transform core 2D conversion is：Multiplication (multiplying 2 computings) 6 times, adds
Subtraction 24 times.For the color high-definition frame of video of one 1920 × 1080, using 4：2：0 sub-sampling form, then need
345600 3 × 3 Integer DCT Transforms, multiplication (multiplying 2 computings) number that its core 2D conversion needs are 2073600, addition and subtraction
Number is 8294400.Than 4 × 4 Integer DCT Transforms using butterfly computation, multiplying (multiplying 2 computings) number reduces
1036800 times, reduce 33.3%；Signed magnitude arithmetic(al) number reduces 4147200, reduces 33.3%.
3 × 3 integer ID CT kernel kernal mappings devices complete 3 × 3 integer ID CT kernel kernal mappings in two steps：First to pending image
Block WIEach row do one-dimensional rank transformation, then one-dimensional line translation is done to the result of one-dimensional rank transformation, it is designed in order to reuse
One-dimensional rank transformation circuit, one-dimensional line translation first can make transposition to the result of one-dimensional rank transformation, then transposition result be done one-dimensional
Rank transformation.As shown in figure 4,3 × 3 integer ID CT kernel kernal mappings devices, which include the 3rd one-dimensional rank transformation device 2301, second, stores transposition
Device 2302, the 4th one-dimensional rank transformation device 2303, the 3rd one-dimensional rank transformation device 2301 are connected with the second storage deferring device 2302, the
Two storage deferring devices 2302 are connected with the 4th one-dimensional rank transformation device 2303.
The 3rd one-dimensional rank transformation device 2301 utilizes butterfly computation：
Carry out computing, wherein wn, n=0,1,2 is matrix W in formula (7)IThe element of either rank, one-dimensional rank transformation result are
rn, n=0,1,2, one-dimensional rank transformation needs to do three times, respectively to matrix WI3 row carry out one-dimensional rank transformations, one-dimensional row become three times
The result changed multiplies 3 matrix R for 3, specifically：
The input of first time butterfly computation is w0=w00, w1=w10, w2=w20, export as r0=r00, r1=r10, r2=r20；
Second of butterfly computation input is w0=w01, w1=w11, w2=w21, export as r0=r01, r1=r11, r2=r21；
The input of third time butterfly computation is w0=w02, w1=w12, w2=w22, export as r0=r02, r1=r12, r2=r22；
The result of one-dimensional rank transformation multiplies 3 matrixes for 3 three times
The second storage deferring device 2302 multiplies 3 matrix R to 3 and carries out transposition, and generation 3 multiplies 3 matrixes
That is H=RT。
The 4th one-dimensional rank transformation device 2303 uses butterfly computation：
Carry out computing, wherein hn, n=0,1,2 is the element of either rank in H, and one-dimensional rank transformation result is gn, n=0,1,2,
One-dimensional rank transformation needs to do three times, carries out one-dimensional rank transformation to H 3 row respectively, the result of one-dimensional rank transformation multiplies 3 squares for 3 three times
Battle array G.
Specifically,
The input of first time butterfly computation is h0=h00, h1=h10, h2=h20, export as g0=g00, g1=g01, g2=g02；
Second of butterfly computation input is h0=h01, h1=h11,h2=h21, export as g0=g10, g1=g11, g2=g12；
The input of third time butterfly computation is h0=h02, h1=h12, h2=h22, export as g0=g20, g1=g21, g2=g22；
The result of one-dimensional rank transformation multiplies 3 matrix G for 3 three times.
As shown in figure 5, using FOOTBALL CIF form test videos, piecemeal size is respectively 4 × 4 and 3 × 3, limit
Search window is 16 × 16, when having used 4 × 4 Integer DCT Transforms and 3 × 3 Integer DCT Transform respectively, 90 frame decoding videos
PSNR performance comparisons.By Fig. 5 it can be seen that, compared to 4 × 4 Integer DCT Transform methods, using 3 × 3 integer of the present utility model
The PSNR stable performances of the codec institute decoding frame of dct transform improve.
Preferred embodiment of the present utility model is the foregoing is only, it is all at this not to limit the utility model
Within the spirit and principle of utility model, any modification, equivalent substitution and improvements made etc., the utility model should be included in
Protection domain within.
Claims (4)
1. a kind of 3 multiply 3 Integer DCT Transform quantizers for digital video decoding, it is characterised in that：Including present frame 3 × 3
Block device（11）, 3 × 3 integer DCT kernel kernal mapping devices（12）, rear scalar quantization device（13）With 3 × 3 image transform block transmitters
（14）, the block device of present frame 3 × 3（11）With 3 × 3 integer DCT kernel kernal mapping devices（12）It is connected, 3 × 3 integer DCT cores become
Parallel operation（12）With rear scalar quantization device（13）It is connected, rear scalar quantization device（13）With 3 × 3 image transform block transmitters（14）Phase
Connection；The block device of present frame 3 × 3（11）Current frame image in video encoder is divided into the image that block size is 3 × 3
Block, and the image block that size is 3 × 3 is sent to 3 × 3 integer DCT kernel kernal mapping devices successively（12）；3 × 3 integer DCT cores become
Parallel operation（12）Integer DCT kernel kernal mappings, rear scalar quantization device are carried out to image block（13）To the image after integer DCT kernel kernal mappings
Block is zoomed in and out and quantified, 3 × 3 image transform block transmitters（14）By rear scalar quantization device（13）The size sent is 3 × 3
Image block be converted into serial data, the Video Decoder of recipient is sent to by transmission channel.
2. according to claim 13 multiply 3 Integer DCT Transform quantizers for digital video decoding, its feature exists
In 3 × 3 integer DCT kernel kernal mapping devices（12）Including the first one-dimensional rank transformation device（1201）, first storage deferring device
（1202）With the second one-dimensional rank transformation device（1203）；The first one-dimensional rank transformation device（1201）With the first storage deferring device
（1202）It is connected, the first storage deferring device（1202）With the second one-dimensional rank transformation device（1203）It is connected；First one-dimensional row become
Parallel operation（1201）Respectively to 3 × 3 image blocksXEach column carry out one-dimensional rank transformation generation transformation matrix, the first storage deferring device
（1202）Transposition generator matrix, the second one-dimensional rank transformation device are carried out to transformation matrix（1203）Each column in matrix is carried out successively
One-dimensional rank transformation generator matrix.
3. according to claim 13 multiply 3 Integer DCT Transform quantizers for digital video decoding, its feature exists
In, with 3 multiply 3 Integer DCT Transform quantizers it is corresponding 3 multiply 3 integer ID CT inverse transformations inverse DCTs include 3 × 3 images convert
Module generator（21）, inverse quantization pre-scaler（22）, 3 × 3 integer ID CT kernel kernal mapping devices（23）, 3 × 3 image block followers
（24）, 3 × 3 images conversion module generator（21）With inverse quantization pre-scaler（22）It is connected, inverse quantization pre-scaler（22）With 3
× 3 integer ID CT kernel kernal mapping devices（23）It is connected, 3 × 3 integer ID CT kernel kernal mapping devices（23）With 3 × 3 image block followers
（24）It is connected；3 × 3 images convert module generator（21）The image coding information that decoder is received generates 3 × 3 images and become
Change block, inverse quantization pre-scaler（22）Module generator is converted to 3 × 3 images（21）3 × 3 image transform blocks of generation carry out inverse
Change and scale in advance, 3 × 3 integer ID CT kernel kernal mapping devices（23）To inverse quantization pre-scaler（22）Image block after processing carries out 3
× 3 integer ID CT kernel kernal mappings, 3 × 3 image block followers（24）After being carried out to the result after 3 × 3 integer ID CT kernel kernal mappings
Processing, export the image block of 3 × 3 pixels.
4. according to claim 33 multiply 3 Integer DCT Transform quantizers for digital video decoding, its feature exists
In 3 × 3 integer ID CT kernel kernal mapping devices（23）Including the 3rd one-dimensional rank transformation device（2301）, second storage deferring device
（2302）With the 4th one-dimensional rank transformation device（2303）, the 3rd one-dimensional rank transformation device（2301）With the second storage deferring device
（2302）It is connected, the second storage deferring device（2302）With the 4th one-dimensional rank transformation device（2303）It is connected；Described 3rd is one-dimensional
Rank transformation device（2301）One-dimensional rank transformation generation transformation matrix R, the second storage are carried out to each column of pending image block respectively
Deferring device（2302）Transposition generator matrix, the 4th one-dimensional rank transformation device are carried out to transformation matrix R（2303）The each column of matrix is entered
The one-dimensional rank transformation of row, generates the image block after integer ID CT kernel kernal mappings.
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| CN107249130B (en) * | 2017-07-24 | 2023-04-07 | 河南工程学院 | 3-by-3 integer DCT (discrete cosine transform) quantizer for digital video coding and decoding |
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