CN106992229A - A kind of PERC cell backsides passivation technology - Google Patents
A kind of PERC cell backsides passivation technology Download PDFInfo
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- CN106992229A CN106992229A CN201710416638.7A CN201710416638A CN106992229A CN 106992229 A CN106992229 A CN 106992229A CN 201710416638 A CN201710416638 A CN 201710416638A CN 106992229 A CN106992229 A CN 106992229A
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- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 title claims abstract description 51
- 238000002161 passivation Methods 0.000 title claims abstract description 50
- 238000005516 engineering process Methods 0.000 title claims abstract description 24
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 85
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 85
- 239000010703 silicon Substances 0.000 claims abstract description 85
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 57
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 38
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 37
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 37
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 37
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 37
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims abstract description 29
- 238000009792 diffusion process Methods 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims abstract description 23
- 238000000137 annealing Methods 0.000 claims abstract description 19
- 238000012545 processing Methods 0.000 claims abstract description 17
- 230000003647 oxidation Effects 0.000 claims abstract description 15
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 15
- 238000007747 plating Methods 0.000 claims abstract description 15
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910052593 corundum Inorganic materials 0.000 claims abstract description 11
- 229910001845 yogo sapphire Inorganic materials 0.000 claims abstract description 11
- 235000008216 herbs Nutrition 0.000 claims abstract description 9
- 210000002268 wool Anatomy 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 8
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 5
- 229910004205 SiNX Inorganic materials 0.000 claims description 17
- 238000002360 preparation method Methods 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 6
- 238000005245 sintering Methods 0.000 claims description 6
- 239000002131 composite material Substances 0.000 claims description 3
- 230000007306 turnover Effects 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 17
- 235000011194 food seasoning agent Nutrition 0.000 abstract description 7
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 7
- 230000015556 catabolic process Effects 0.000 abstract description 6
- 238000006731 degradation reaction Methods 0.000 abstract description 6
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 6
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 20
- 239000002253 acid Substances 0.000 description 12
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 12
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 8
- 239000013078 crystal Substances 0.000 description 8
- 239000001301 oxygen Substances 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 8
- 239000000758 substrate Substances 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- 238000006388 chemical passivation reaction Methods 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 239000007788 liquid Substances 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 4
- 229910019213 POCl3 Inorganic materials 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 239000003513 alkali Substances 0.000 description 4
- 230000003667 anti-reflective effect Effects 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 230000007797 corrosion Effects 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 229910017604 nitric acid Inorganic materials 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 238000002310 reflectometry Methods 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910000676 Si alloy Inorganic materials 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
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- 239000004332 silver Substances 0.000 description 2
- 239000002585 base Substances 0.000 description 1
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- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- RLOWWWKZYUNIDI-UHFFFAOYSA-N phosphinic chloride Chemical compound ClP=O RLOWWWKZYUNIDI-UHFFFAOYSA-N 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention belongs to area of solar cell, and in particular to a kind of PERC cell backsides passivation technology, including making herbs into wool, diffusion, etching and polished backside, afterwards hot-air seasoning silicon chip, 180 ° of upsets of silicon chip be made into silicon chip back side upwards, ozone processing makes the back side form SiO2Film front oxidation processes, back side plating passivating film, front plating passivating film；The positive oxidation processes are annealing thermal oxidation process formation SiO2Film.The PERC cell backside passivation technologies back side of the present invention forms silicon oxide film in uniform thickness, and SiO2 and Si matchings are more preferable；The interface state density on Si surfaces can be effectively reduced, so as to increase Al2O3Field passivation effect.The probability of EL degradations is reduced, A grades of yields are improved, PERC battery production costs can be reduced, battery performance, the great significance in terms of the energy is improved.
Description
Technical field
The invention belongs to area of solar cell, and in particular to a kind of PERC cell backsides passivation technology.
Background technology
PERC technologies, i.e. passivation emitter rear-face contact, by rear surface of solar cell formation passivation layer, can significantly drop
Low back surface electricity recombination rate, forms good internal opticses back reflection mechanism, lifts open-circuit voltage, the short circuit electricity of battery
Stream, so as to lift the conversion efficiency of battery.
PERC solar cells have technique simple, and cost is relatively low, and the advantage high with existing production line for manufacturing battery compatibility,
It is a kind of high performance solar batteries out newly developed, has obtained the extensive concern of industry, is expected to turn into following high-efficiency solar
The main flow direction of battery.
The production of conventional silicon solar cell, PERC silicon solar cell production stages are as follows：The 1st, one P-type silicon base is provided
Plate, is cleaned first；2nd, phosphorous oxychloride (POCl is used in P-type silicon substrate3) liquid source diffusion method reversely leads to be formed
The n type diffused layer (N-type emitter stage) of electric type；3rd, after diffusion layer is formed, it is etched with hydrofluoric acid, removes what diffusion was produced
The PN junction of silicon chip section edges；4th, SiNx is deposited on the n type diffused layer of front, dielectric layer is formed, overleaf deposits AlOX/
SiNx, forms passivation layer；5th, the passivation layer on PERC silicon solar cell backs face carries out laser windowing；6th, on battery front side
Dielectric layer on carry out silk-screen printing, and dry front side silver paste, form front electrode, the passivation layer perforated in p-type substrate back
Upper carry out silk-screen printing, and back side silver paste is dried, form backplate；7th, burn altogether, electrode is fully dried, while forming good
Electrical contact.
The core of PERC solar cells is one layer of aluminum oxide film covering of shady face plating in silicon chip, to be passivated to silicon,
The surface passivation of aluminum oxide is controlled by chemical passivation and field-effect passivation, and the chemical passivation effect of aluminum oxide is hydrogen passivation, different
Under the conditions of the aluminum oxide for preparing there are different hydrogen contents, and hydrogen be can be with silicon chip internal flaw and grain boundaries suspension
Bond is closed, and reduces complex centre, so as to realize the important factor of passivation effect, hydrogen is present in the-OH groups or-CHx of film
In.Aluminum oxide has high fixed negative charge density, Q with silicon contact surfacefAbout 1012-1013cm-2, by shielding P-type silicon surface
Minority carrier and show good field-effect passivation.Negative electrical charge in aluminum oxide film layer and the minority in P-type silicon matrix
Carrier (electronics) is mutually exclusive, so as to stop that it is combined with the complex centre of silicon chip surface, reduces recombination-rate surface.
Backside passivation layer aluminum oxide is not so good with silicon matching, and aluminum oxide can amplify some back surface defects, such as in etching
Stage easily forms belt print due to silicon chip back side and atwirl belt contacts, increases so as to cause EL (electroluminescent) to degrade
Many, A grades of rates decline.
Currently, global major Battery Plant commercial cities are accelerating to introduce PERC technologies, and at the same time, PERC batteries also face in itself
Production cost is reduced, the challenge of battery performance, technological innovation and large-scale production is improved.
The content of the invention
The technical problems to be solved by the invention are backside passivation layer aluminum oxide in the prior art and silicon matching less
Good, surface passivation effect is not good, and aluminum oxide can amplify some back surface defects, increases so as to cause EL to degrade, what A grades of rates declined
Problem.
In order to solve the above-mentioned technical problem, the present invention is addressed by following technical proposals：
A kind of PERC cell backsides passivation technology, it is characterised in that including making herbs into wool, diffusion is etched and polished backside, afterwards
180 ° of upsets of silicon chip are made silicon chip back side upwards, ozone processing makes the back side form SiO by hot-air seasoning silicon chip2At film, positive oxidation
Reason, back side plating passivating film, front plating passivating film；The positive oxidation processes are that annealing forms SiO2Film.
Specifically, it is described that 180 ° of upsets of silicon chip are used into turning machine, because installing turning machine additional, silicon chip is avoided in blanking
Contact of the back side with belt, reduces the probability of EL degradations, improves A grades of rates.
Specifically, the ozone processing makes the back side form SiO2Film, using ozone machine, makes silicon chip back side pass upward through ozone
SiO is formed during machine2Film.
Preferably, the back side forms SiO2The thickness of film is 1-5nm.It is further preferred that the back side forms SiO2Film
Thickness is 1-4nm.The method only handled using ozone, can make one layer of uniform SiO of silicon chip back side formation2Film,
Preferably, the SiO that the front is formed2The thickness of film is 2-15nm, because eliminating front ozone processing, can be made
Cell piece PID risks increase, in order to reduce this risk, in annealing, are passed through a certain amount of oxygen, front surface is grown one
The layer preferred 2-15nm of oxide thickness, so as to improve the anti-PID performances of battery.
Preferably, the thickness for the SiO2 films that the front is formed is 2-8nm.If positive SiO2 films too film layer prepares ratio
More difficult, the film layer of preparation is uneven, and anti-PID effect can be deteriorated.It is too thick that positive anti-reflection effect can be caused to be deteriorated, pass through annealing
Processing controls the thickness of positive SiO2 films to be 2-8nm, can effectively prepare the positive SiO2 for the uniform film thickness for meeting thickness
Film, and anti-PID effects are optimal.
Specifically, the passivating film of the back side plating is Al2O3/SiNXComposite bed, the passivating film of the front plating is SiNX
Layer.
Present invention additionally comprises a kind of PERC battery preparation methods, including above-mentioned PERC passivating back processes, and swash
Light is slotted, silk-screen printing, sintering.
Present invention additionally comprises a kind of PERC batteries, the PERC batteries prepared by above-mentioned PERC battery preparation methods and
.
Preferably, the PERC batteries include the silicon wafer layer with PN junction, and are set in turn in the silicon wafer layer back side
SiO2Film layer, Al2O3、SiNXLayer and backplate, silicon wafer layer front sets gradually SiO2Film layer, SiNXLayer and front electrode, institute
State the SiO of back side setting2The thickness of film layer is 1-5nm.
Beneficial effect：
(1) PERC cell backside passivation technologies of the invention, by the way that after etching and carrying on the back polishing, flaps is carried out to the back side
Ozone processing, makes the back side form silicon oxide film, and the thickness of silica is uniform；Positive oxidation processes formation silicon oxide film is carried out again；
Again the back side is passivated to form Al2O3/SiNXDeng passivating film.The present invention avoids traditional production stage for preparing PERC batteries, first
Ozone processing front, then the back side form Al2O3/SiNXThe limitation of passivating film so that in silicon substrate bottom back side formation SiO2/Al2O3/
SiNXComposite film, SiO2 and Si matchings are more preferable；The interface state density on Si surfaces can be effectively reduced, so as to increase passivation effect
Really.SiO2In Si be tetrahedral structure, and Al2O3The source of surface negative charge is the AlO in tetrahedral configuration4-, SiO2's
In the presence of the alumina layer of high negative charge density is advantageously formed, so as to improve Al2O3Field passivation effect.Front by annealing at
Reason forms SiO2Film, improves the anti-PID performances of battery.
(2) PERC cell backside passivation technologies of the invention, by installing turning machine additional, 180 ° of upsets are carried out to silicon chip,
Contact of the silicon chip back side with belt is avoided during blanking, the probability of EL degradations is reduced, improves A grades of rates.
(3) PERC cell backside passivation technologies of the invention, the back side forms silicon oxide film and front forms silicon oxide film
Mode is different, and the back side handles uniform film thickness using ozone, and front can not use the method generation front oxidation that ozone is handled
Film, is, because can so make the back side and belt contacts, to cause the back side to abrade, cause EL to degrade.
(4) PERC cell backside passivation technologies of the invention, the thickness that the back side forms silicon oxide film is 1-5nm, works as oxidation
When silicon fiml is thicker, passivation effect is poor, and backside oxide silicon film thickness be 1-5nm when, passivation effect is optimal.
(5) PERC cell backside passivation technologies of the invention, it is 2-15nm that front, which forms silicon oxide film thickness, is more highly preferred to
For 2-8nm when, the anti-PID performances of battery can be improved.
(6) PERC batteries of the invention, chemical property is high, reduces the probability of EL degradations, improves A grades of yields.
Brief description of the drawings
Fig. 1 is PERC battery structures schematic diagram of the present invention；
Fig. 2 is the PERC battery yield data lists of prior art and embodiment 4；
Fig. 3 is the PERC battery electric property data lists of prior art and embodiment 4.
Wherein, 1- front electrodes；2-SiNXLayer；3-SiO2Film layer；4-N types layer；5-P types layer；6-SiO2Film layer；7-Al2O3
Layer；8-SiNXLayer, 9- backplates.
Embodiment
In order that technical scheme is of greater clarity, the present invention is entered to advance below in conjunction with drawings and Examples
One step is described in detail.
Embodiment 1
A kind of PERC cell backsides passivation technology, including making herbs into wool, diffusion are etched and polished backside, afterwards hot-air seasoning silicon
180 ° of upsets of silicon chip are made silicon chip back side upwards, ozone processing makes the back side form SiO by piece2Film, positive oxidation processes, back side plating
Passivating film, front plating passivating film；The positive oxidation processes are that annealing forms SiO2Film.
In particular, 1. making herbs into wool：Corrosion is carried out to crystal silicon chip surface with chemical solution and forms the surface with light trapping effect
Matte 2. spreads：Crystal silicon chip is put into diffusion furnace, using method of diffusion, PN junction is formed on the silicon chip of P type substrate, it is main at present
If POCl3 liquid source diffusion method.
3. etching and polished backside：Acid tank (HF/HNO3/H2SO4) etch removal edge PN junction and to polished backside-alkali groove
(KOH) neutralize acid and remove porous silicon-acid tank (HF/HCL) and remove front phosphorosilicate glass, hot-air seasoning silicon chip, flaps, the back side is smelly
Oxygen processing.
4. annealing：Silicon chip is put into annealing furnace, a certain amount of oxygen is passed through during annealing, front forms SiO2Film,
The PID performances of battery are improved in cell piece.
5. back side coating film：AL is plated at the cell piece back side2O3/SINX.。AL2O3Play a part of chemical passivation and field passivation,
SINXAL is protected2O3。
6. front plated film：Antireflective film is plated with PECVD on cell piece surface, mainly using silicon nitride.Reduce the reflectivity of light
Also function to certain passivation simultaneously.
Specifically, flaps, i.e., make silicon chip back side upwards 180 ° of upsets of silicon chip, use turning machine, because installing turning machine additional,
Contact of the silicon chip back side with belt is avoided in blanking, the probability of EL degradations is reduced, improves A grades of rates.
Specifically, back side ozone is handled, and using ozone machine, silicon chip back side is formed SiO when passing upward through ozone machine2Film.
Preferably, the back side forms SiO2The thickness of film is 1-5nm.The method only handled using ozone, can make
One layer of uniform SiO of silicon chip back side formation2Film, and the thickness range passivation effect is optimal, in the present embodiment, passivating back SiO2
Film is 2nm.
Preferably, the SiO that the front is formed2The thickness of film is 2-15nm, because eliminating front ozone processing, can be made
Cell piece PID risks increase, in order to reduce this risk, in annealing, are passed through a certain amount of oxygen, front surface is grown one
The layer preferred 2-15nm of oxide thickness, so as to improve the anti-PID performances of battery.In the present embodiment, SiO is formed2The thickness of film is
10nm。
Embodiment 2
A kind of PERC cell backsides passivation technology, including making herbs into wool, diffusion are etched and polished backside, afterwards hot-air seasoning silicon
180 ° of upsets of silicon chip are made silicon chip back side upwards, ozone processing makes the back side form SiO by piece2Film, positive oxidation processes, back side plating
Passivating film, front plating passivating film；The positive oxidation processes are that annealing forms SiO2Film.
In particular, 1. making herbs into wool：Corrosion is carried out to crystal silicon chip surface with chemical solution and forms the surface with light trapping effect
Matte
2. diffusion：Crystal silicon chip is put into diffusion furnace, using method of diffusion, PN junction, mesh are formed on the silicon chip of P type substrate
Preceding mainly POCl3 liquid source diffusion method.
3. etching and polished backside：Acid tank (HF/HNO3/H2SO4) etch removal edge PN junction and to polished backside-alkali groove
(KOH) neutralize acid and remove porous silicon-acid tank (HF/HCL) and remove front phosphorosilicate glass, hot-air seasoning silicon chip, flaps, the back side is smelly
Oxygen processing.
4. annealing：Silicon chip is put into annealing furnace, a certain amount of oxygen is passed through during annealing, front forms SiO2Film,
The PID performances of battery are improved in cell piece.
5. back side coating film：AL is plated at the cell piece back side2O3/SINX.。AL2O3Play a part of chemical passivation and field passivation,
SINXAL is protected2O3。
6. front plated film：Antireflective film is plated with PECVD on cell piece surface, mainly using silicon nitride.Reduce the reflectivity of light
Also function to certain passivation simultaneously.
Specifically, flaps, i.e., make silicon chip back side upwards 180 ° of upsets of silicon chip, use turning machine, because installing turning machine additional,
Contact of the silicon chip back side with belt is avoided in blanking, the probability of EL degradations is reduced, improves A grades of rates.
Specifically, back side ozone is handled, and using ozone machine, silicon chip back side is formed SiO when passing upward through ozone machine2Film.
Preferably, the back side forms SiO2The thickness of film is 1-5nm.The method only handled using ozone, can make
One layer of uniform SiO of silicon chip back side formation2Film, and the thickness range passivation effect is optimal, in the present embodiment, passivating back SiO2
Film is 4nm.
Preferably, the SiO that the front is formed2The thickness of film is 2-15nm, because eliminating front ozone processing, can be made
Cell piece PID risks increase, in order to reduce this risk, in annealing, are passed through a certain amount of oxygen, front surface is grown one
The layer preferred 2-15nm of oxide thickness, so as to improve the anti-PID performances of battery.In the present embodiment, SiO is formed2The thickness of film is
8nm。
Embodiment 3
A kind of PERC battery preparation methods, including, 1. making herbs into wool：Corrosion is carried out to crystal silicon chip surface with chemical solution and forms tool
There is the surface matte of light trapping effect
2. diffusion：Crystal silicon chip is put into diffusion furnace, using method of diffusion, PN junction, mesh are formed on the silicon chip of P type substrate
Preceding mainly POCl3 liquid source diffusion method.
3. etching and polished backside：Acid tank (HF/HNO3/H2SO4) etch removal edge PN junction and to polished backside-alkali groove
(KOH) neutralize acid and remove porous silicon-acid tank (HF/HCL) removal front phosphorosilicate glass, hot-air seasoning silicon chip, turning machine flaps,
Back side ozone processing.
4. annealing：Silicon chip is put into annealing furnace, a certain amount of oxygen is passed through during annealing, front forms SiO2Film,
The PID performances of battery are improved in cell piece.
5. back side coating film：AL is plated at the cell piece back side2O3/SINX.。AL2O3Play a part of chemical passivation and field passivation,
SINXAL is protected2O3。
6. front plated film：Antireflective film is plated with PECVD on cell piece surface, mainly using silicon nitride.Reduce the reflectivity of light
Also function to certain passivation simultaneously.
7. lbg：Silicon chip back side is slotted or is open with laser, says that the aluminum oxide and silicon nitride at the back side are punched, so as to
Al-back-surface-field (BSF) paste and silicon contact.
8. silk-screen printing：Al-BSF and back electrode, front printing front electrode are printed in silicon chip back side.
9. sintering：Silicon alloy is formed by sintering, effective conducting particles and semiconductor is formed good Ohmic contact,
Reduce series resistance.
Embodiment 4
PERC batteries are prepared by embodiment 3, as shown in figure 1, PERC batteries include the silicon wafer layer with PN junction, specifically
Including N-type layer 4 and P-type layer 5, and it is set in turn in the SiO at the silicon wafer layer back side2Film layer 6, Al2O3Layer 7, SiNXLayer 8 and the back side
Electrode 9, silicon wafer layer front sets gradually SiO2Film layer 3, SiNXLayer 2 and front electrode 1, the SiO that the back side is set2Film layer 6
Thickness is 1-5nm.Preferably, the SiO that front is set2The thickness of film layer 3 is 2-15nm.
In the present embodiment, the SiO that the back side is set2The thickness of film layer 6 is 2nm.Preferably, the SiO that front is set2Film layer 3
Thickness be 10nm.As shown in Fig. 2 A grades of the yield of this programme up to 99.2%, far above the 98.12% of prior art.Electrification
Aspect of performance test is learned as shown in figure 3,0.14%, Uoc high compared with existing conventional techniques the Eta high 2.5mv, FF of this programme are high by 0.1.
Prior embodiment
The specific method that prior art is prepared PERC batteries is as follows：
1. making herbs into wool：Corrosion is carried out to crystal silicon chip surface with chemical solution and forms the surface matte with light trapping effect
2. diffusion：Crystal silicon chip is put into diffusion furnace, using method of diffusion, PN junction, mesh are formed on the silicon chip of P type substrate
Preceding mainly POCl3 liquid source diffusion method.
3. etching+back of the body polishing：Acid tank (HF/HNO3/H2SO4) etch removal edge PN junction and back of the body polishing-alkali is carried out to the back side
Groove (KoH), which neutralizes acid and removes porous silicon-acid tank (HF/HCL), removes the processing of front phosphorosilicate glass-hot-air seasoning-front ozone
Improve the anti-PID performances of cell piece.
4. back side coating film：AL is plated at the cell piece back side2O3/SINX.。AL2O3Play a part of chemical passivation and field passivation.
SINXAL is protected2O3。
5. front plated film：Antireflective film is plated with PECVD on cell piece surface, mainly using silicon nitride.Reduce the reflectivity of light
Also function to certain passivation simultaneously.
6. lbg：Silicon chip back side is slotted or is open with laser, says that the aluminum oxide and silicon nitride at the back side are punched, so as to
Al-back-surface-field (BSF) paste and silicon contact.
7. silk-screen printing：Al-BSF and back electrode, front printing front electrode are printed in silicon chip back side.
8. sintering：Silicon alloy is formed by sintering, effective conducting particles and semiconductor is formed good Ohmic contact,
Reduce series resistance.Obtain PERC batteries.
Listed above is only the specific embodiment of the present invention, it is clear that the embodiment the invention is not restricted to more than.This area
The those of ordinary skill's all deformations that directly can export or associate from present disclosure, all should belong to the present invention's
Protection domain.
Claims (10)
1. a kind of PERC cell backsides passivation technology, it is characterised in that including making herbs into wool, diffusion, etching and polished backside, Zhi Houre
Wind dries silicon chip, 180 ° of upsets of silicon chip is made into silicon chip back side upwards, ozone processing makes the back side form SiO2At film, positive oxidation
Reason, back side plating passivating film, front plating passivating film；The positive oxidation processes are annealing thermal oxidation process formation SiO2Film.
2. a kind of PERC cell backsides passivation technology according to claim 1, it is characterised in that it is described by silicon chip 180 ° turn over
Turn to use turning machine.
3. a kind of PERC cell backsides passivation technology according to claim 1, it is characterised in that the ozone processing makes the back of the body
Face forms SiO2Film, using ozone machine, makes silicon chip back side form SiO when passing upward through ozone machine2Film.
4. a kind of PERC cell backsides passivation technology according to claim 1, it is characterised in that the back side forms SiO2
The thickness of film is 1-5nm.
5. a kind of PERC cell backsides passivation technology according to claim 1 or 4, it is characterised in that the front is formed
SiO2The thickness of film is 2-15nm.
6. a kind of PERC cell backsides passivation technology according to claim 5, it is characterised in that what the front was formed
SiO2The thickness of film is 2-8nm.
7. a kind of PERC cell backsides passivation technology according to claim 1, it is characterised in that the passivation of the back side plating
Film is Al2O3/SiNXComposite bed, the passivating film of the front plating is SiNXLayer.
8. a kind of PERC battery preparation methods, it is characterised in that including the PERC back sides according to any one of claims 1 to 7
Passivation technology method, and lbg, silk-screen printing, sintering.
9. a kind of PERC batteries, it is characterised in that the PERC batteries prepared by the PERC battery preparation methods of claim 8 and
.
10. a kind of PERC batteries according to claim 9, it is characterised in that the PERC batteries are included with PN junction
Silicon wafer layer, and it is set in turn in the SiO at the silicon wafer layer back side2Film layer, Al2O3、SiNXLayer and backplate, silicon wafer layer front according to
Secondary setting SiO2Film layer, SiNXLayer and front electrode, the SiO that the back side is set2The thickness of film layer is 1-5nm.
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