CN106981423B - Process based on Si substrate epitaxial SiC base GaN HEMT - Google Patents
Process based on Si substrate epitaxial SiC base GaN HEMT Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 77
- 239000000758 substrate Substances 0.000 title claims abstract description 57
- 239000010410 layer Substances 0.000 claims abstract description 59
- 229910052751 metal Inorganic materials 0.000 claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 32
- 238000001259 photo etching Methods 0.000 claims abstract description 19
- 150000001875 compounds Chemical class 0.000 claims abstract description 18
- 239000011241 protective layer Substances 0.000 claims abstract description 17
- 239000011521 glass Substances 0.000 claims abstract description 16
- 239000000853 adhesive Substances 0.000 claims abstract description 13
- 230000001070 adhesive effect Effects 0.000 claims abstract description 13
- 229910052737 gold Inorganic materials 0.000 claims abstract description 10
- 230000007797 corrosion Effects 0.000 claims abstract description 7
- 238000005260 corrosion Methods 0.000 claims abstract description 7
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 7
- 238000001039 wet etching Methods 0.000 claims abstract description 7
- 238000010438 heat treatment Methods 0.000 claims abstract description 6
- 238000005530 etching Methods 0.000 claims description 12
- 238000002360 preparation method Methods 0.000 claims description 9
- 238000001020 plasma etching Methods 0.000 claims description 7
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 238000005566 electron beam evaporation Methods 0.000 claims description 5
- 239000003085 diluting agent Substances 0.000 claims description 4
- 229910002704 AlGaN Inorganic materials 0.000 claims description 3
- 238000002955 isolation Methods 0.000 claims description 3
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 3
- 238000005036 potential barrier Methods 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 2
- 230000009977 dual effect Effects 0.000 claims description 2
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 2
- 150000004767 nitrides Chemical class 0.000 claims description 2
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 claims 1
- 238000001459 lithography Methods 0.000 claims 1
- 229910002601 GaN Inorganic materials 0.000 description 60
- 229910010271 silicon carbide Inorganic materials 0.000 description 55
- 239000002585 base Substances 0.000 description 18
- 239000010931 gold Substances 0.000 description 15
- 239000000463 material Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 239000007789 gas Substances 0.000 description 7
- 239000011148 porous material Substances 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000000227 grinding Methods 0.000 description 4
- 230000002427 irreversible effect Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 3
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 239000003513 alkali Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910015844 BCl3 Inorganic materials 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910018540 Si C Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 125000001309 chloro group Chemical group Cl* 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 230000010358 mechanical oscillation Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6835—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
Abstract
The present invention provides the processes based on Si substrate epitaxial SiC base GaN HEMT, which comprises the steps of: grows SiC layer on a si substrate；GaN HEMT device is grown in the SiC layer；Photoetching compound protective layer is smeared in the GaN HEMT device, and preset time is toasted with preset temperature, and slide glass is pasted using adhesive on the photoetching compound protective layer；Corrosion removal is carried out to the Si substrate at the GaN HEMT device back side using wet process or dry method mode；Backside through vias technique is carried out in the SiC layer for removing Si substrate, so that GaN HEMT device front ground area is connected to reverse side；On the GaN HEMT device back side, that is, SiC layer face, deposited metal Ti or Au；Using heating and organic or inorganic solution wet etching photoetching compound protective layer and slide glass, adhesive, and then improve the performance of device.
Description
Technical field
The present invention relates to compound semiconductor manufacturing technology fields, more particularly to are based on Si substrate epitaxial SiC base GaN
The process of HEMT.
Background technique
Representative device of the GaN HEMT device as third generation compound semiconductor, with its high electron mobility, high breakdown
Voltage, high current density, high reliability are widely used in microwave power amplification sector, are modern the army and the people's communication system, aviation boat
It preferred device.GaN HEMT device needs to export high current density in high frequency, high-power applications level, and SiC material
Lattice constant and GaN material lattice constant it is close, therefore the GaN HEMT of general epitaxial growth high quality on sic substrates
Heterojunction structure has biggish current density, while the thermal conductivity of SiC material is higher, can guarantee wanting for high-power heat-dissipation
It asks, therefore SiC base GaN HEMT device is widely used in microwave power amplification.
In order to improve SiC base GaN HEMT device performance in high frequency, high power applications, substrate heat-sinking capability, drop are improved
Low ghost effect, frequently with method:
Then the epitaxial growth GaN HEMT structure in the SiC substrate that thickness is about 500um carries out technique system to its front
It is standby.After the completion of positive technique, use adhesive and with materials such as dimension glass as slide glass front protecting, then carrying out
The SiC at the back side is ground, and is ground to 200um hereinafter, carrying out dorsal pore technique again.Because SiC material is harder, grinding rate is slower, grinds
Mill thickness is thicker, and long-time process of lapping can cause following problems: mechanical oscillation caused by 1. process of lapping, can be to based on pole
The GaN HEMT device reliability for changing effect causes irreversible influence.2. the biggish roughness meeting in surface of the SiC after grinding
Subsequent dorsal pore technology stability is influenced, to influence the high frequency performance of device.3. in the thinning process of SiC substrate, grinding speed
The inhomogeneities of rate will affect whole wafer angularity, influence the polarity effect inside gallium nitride material, influence the output of device
Current density；It seriously will lead to wafer and slide glass be detached from, technique is caused to fail.4. the by-product in process of lapping, also can be to just
Face device pollutes, and causes a series of device reliability issues.Therefore, though above method is widely used in SiC base GaN
In HEMT device preparation, but still there is a problem of very big, directly affects device performance and yields.
In device fabrication process, the SiC substrate that will reach 500um to thickness after completing positive technique subtracts
Thin and dorsal pore technique, is that the SiC substrate of 500um or so is thinned to 200um by mechanical lapping hereinafter, carrying out ground connection dorsal pore again
Technique, the purpose of this technique first is that in order to GaN HEMT device heat dissipation, second is that ground connection dorsal pore technique is carried out, to reduce in device
The ghost effect in portion is that device is applied to the essential processing step in high frequency field.Because Si-C bond energy in SiC substrate compared with
Greatly, SiC material is very rigid, inevitably causes irreversible damage to front device in mechanical grinding process, can make
Subsequent dorsal pore technology difficulty increases；And SiC base GaN HEMT epitaxial wafer is transparent, the progress technique preparation on full-automatic board,
Will receive a series of caused board compatibility of optical sensor detection failures influences.Extension, technique skill for the above-mentioned reasons
Art needs to reform, the performance of Lai Tigao SiC base GaN HEMT device and the difficulty for reducing industrialized production.
Therefore, the existing method used when preparing SiC base GaN HEMT device, the technology that there is influence device performance are asked
Topic.
Summary of the invention
The present invention solves the technical problem of the existing methods used when preparing SiC base GaN HEMT device, deposit
The technical issues of influencing device performance, and then provide the process based on Si substrate epitaxial SiC base GaN HEMT, Neng Gouyou
Effect improves the performance of device, improves yields.
In order to solve the above technical problems, a technical solution adopted by the present invention: providing and be based on Si substrate epitaxial SiC base
The process of GaN HEMT, includes the following steps:
SiC layer is grown on a si substrate；
GaN HEMT device is grown in the SiC layer；
Photoetching compound protective layer is smeared in the GaN HEMT device, and preset time is toasted with preset temperature, described
Slide glass is pasted using adhesive on photoetching compound protective layer；
Corrosion removal is carried out to the Si substrate at the GaN HEMT device back side using wet process or dry method mode；
Remove Si substrate SiC layer on carry out backside through vias technique so that GaN HEMT device front ground area with
Reverse side connection；
On the GaN HEMT device back side, that is, SiC layer face, deposited metal Ti or Au；
Using heating and organic or inorganic solution wet etching photoetching compound protective layer and slide glass, adhesive.
It is in contrast to the prior art, the beneficial effects of the present invention are:
Due to being inserted into thin layer SiC layer in Si base GaN HEMT, most significant feature is that GaN HEMT structure can be improved
Growth quality, improve heat dissipation of the device in high-power applications, the directly performance of raising GaN HEMT device；
In addition SiC layer can directly reduce the energy for growing thick SiC layer and material consumption.In technique realization, first is that will
Transparent conventional SiC base GaN HEMT epitaxial wafer is converted into nontransparent wafer, in technique board compatibility, is especially relating to
And on the step of optical detection, identification, provide biggish convenience；Secondly overleaf in technique, use Si substrate as it is entire outside
The carrier for prolonging structure is easy to remove completely.The mechanical lapping that SiC can be saved after its removal avoids causing front device
Irreversible damage；Backside through vias technique directly can be carried out to thin layer SiC, largely reduce GaN HEMT microwave power device
The preparation process difficulty of part, device performance and yield are significantly promoted.
Detailed description of the invention
Fig. 1 is that the step process of the process based on Si substrate epitaxial SiC base GaN HEMT in the embodiment of the present invention is shown
It is intended to；
Fig. 2-Fig. 9 is the schematic diagram of the process based on Si substrate epitaxial SiC base GaN HEMT in the embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that the described embodiments are merely a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Process provided in an embodiment of the present invention based on Si substrate epitaxial SiC base GaN HEMT, solves existing skill
The method used in art when preparing SiC base GaN HEMT device there is technical issues that influence.
Process provided in an embodiment of the present invention based on Si substrate epitaxial SiC base GaN HEMT, as shown in Figure 1, packet
Including following steps: S101 grows SiC layer on a si substrate；S102 grows GaN HEMT device in the SiC layer；S103,
Photoetching compound protective layer is smeared using sol evenning machine in GaN HEMT device, and preset time is toasted with preset temperature, in the photoetching
Slide glass is pasted using adhesive on compound protective layer；S104, using wet process or dry method mode to the GaN HEMT device back side
Si substrate carries out corrosion removal；S105 carries out backside through vias technique, so that GaN HEMT device in the SiC layer for removing Si substrate
Part front ground area is connected to reverse side；S106, on the GaN HEMT device back side, that is, SiC layer face, deposited metal Ti or
Au；S107, using heating and organic or inorganic solution wet etching photoetching compound protective layer and slide glass, adhesive.
In a particular embodiment, as shown in Fig. 2, growing SiC layer on a si substrate, the thickness of Si substrate is specially
200-600 μm, the resistance value of Si substrate is specially 5000 Ω .mm, which is specially N-type or p-type, on Si substrate
Growing crystal orientation is specially 001 or 111.
Specifically, on the Si substrate grow SiC layer be specially use MOCVD, in PECVD, ICPCVD any mode into
Row growth.The SiC layer grown on Si substrate specifically can be monocrystalline or polycrystalline, and SiC layer thickness is specially 1-200 μm.Specifically,
By PECVD in the six inch Si on piece epitaxial growth thin layer SiC layers with a thickness of 678 μm, growth is raw along 111 directions of Si substrate
Long temperature is 300 degrees Celsius, and reaction gas is silane SiH4With methane CH4, argon Ar is rare gas.
Then, S102 is executed, grows GaN HEMT device on the sic layer.As shown in Figure 3, Figure 4, specifically, first production is outer
Prolong piece, then makes source, grid, drain electrode again.Therefore, first successively growing AIN nucleating layer, GaN buffer layer, AlN insertion on the sic layer
Layer, AlGaN potential barrier, GaN cap form GaN HEMT epitaxial wafer, specifically；Nucleating layer with a thickness of 1nm, GaN buffer layer
Specially Fe2O3 doping, with a thickness of 1.8 μm, AlN insert layer with a thickness of 1nm, AlGaN potential barrier is unintentional doping, with a thickness of
20nm, wherein Al group is divided into 25%, GaN cap with a thickness of 2nm.
Then, device active region isolation is successively carried out on the GaN HEMT epitaxial wafer, source and drain Ohmic contact, grid connect
It touches, electrode thickeies, the technique of metal interconnection, the preparation of completion GaN HEMT device.Specifically, it is adopted on GaN HEMT epitaxial wafer
It is injected to form device active area isolation with fluorine ion, using any one in electron beam evaporation metal Ti, Al, Ni, Au, specifically
If it is use Ti, then metal Ti with a thickness of 20nm, if using Al, metal Al with a thickness of 150nm, if adopted
With Ni, then W metal with a thickness of 50nm, if it is using Au, then metal Au with a thickness of 100nm, then taken the photograph 850
The 30s that anneals in family name's degree nitrogen atmosphere forms source and drain Ohmic contact and gate contact, is formed using electron beam evaporation W metal or Au
Gate contact, if using Ni, W metal with a thickness of 50nm, if using Au, metal Au with a thickness of 200nm, using electricity
Beamlet evaporated metal Ni or Au as electrode thicken, if using Ni, W metal with a thickness of 50nm, if using Au, metal
Au's forms front metal interconnection using electron beam evaporation W metal or Au with a thickness of 500nm, if using Ni, W metal
With a thickness of 50nm, if using Au, metal Au with a thickness of 500nm, complete the preparation of GaN HEMT device.
After the GaN HEMT device that above-mentioned preparation is completed, as shown in figure 5, S103 is executed, in GaN HEMT device
Photoetching compound protective layer, specifically AZ4620 photoresist are smeared, sol evenning machine can be used, and preset time is toasted with preset temperature,
Slide glass is pasted using adhesive on the photoetching compound protective layer.For the epitaxial wafer front surface region prepared to the GaN HEMT device
It is protected, the concrete mode of protection is exactly photoresist, the organic or inorganic film using acid and alkali resistance corrosion, with coverage mode
Rotary, injecting type etc. physically or chemically deposition method or directly paste so that the photoresist protective layer thickness formed is 1
μm -100 μm, then, slide glass is pasted together using adhesive on the photoetching compound protective layer.Outside the slide glass and GaN HEMT
It is close to prolong chip size.Specifically, which is 4000 rpms, time 30s, and glue thickness is 6 μm, 120 ° of bakings
120s。
Then, the removal of back side silicon substrate is carried out, as shown in fig. 6, S104 is executed, using wet process or dry method mode to GaN
The Si substrate at the HEMT device back side carries out corrosion removal；Specifically using acid, alkali wet etching, plasma etching, to have
Effect falls Si substrate etching.Saturation KOH solution can be used in specific embodiment, in 80 C water bath's environment, corrosion
Wafer 120 minutes, to remove completely back side silicon substrate.
Then, backside through vias technique is carried out, as shown in fig. 7, executing S105, is carried on the back in the SiC layer for removing Si substrate
Face via process, so that GaN HEMT device front ground area is connected to reverse side.Specifically, use fluorine-based as plasma
Etching gas, using W metal as etch mask, etching SiC layer, removal Ni uses chloro as plasma etching gas again, with
SiC is etch mask, etches the nitride thin layer to front metal layer.More specifically, using photoetching negtive photoresist, pass through dual light
The mode of alignment and plating is carved in GaN HEMT device front ground area, forms W metal etch mask with a thickness of 5 μm；Using
Method for etching plasma etching SiC layer area above uses etching gas for SF to front device area6, diluent gas
It is more than the method for etching plasma etching SiC layer of Ar a part of；Then use etching gas for Cl2It is with diluent gas
BCl3Method for etching plasma etch another part to GaN HEMT device front ground area, so that GaN HEMT device
Positive ground area is connected to reverse side.
After entire back via process, back metal technique is carried out, as shown in figure 8, specifically, S106 is executed,
On the GaN HEMT device back side, that is, SiC layer face, deposited metal Ti or Au, 100 μm or 1000 μm；Specifically, low resistance is deposited
" ground " line of front device is connected to the back side by rate metal, in order to reduce the ghost effect of device work in high frequency,
Metal deposit mode can use electron beam evaporation, magnetron sputtering, and the modes such as plating are just no longer detailed in embodiments of the present invention
It repeats, the low resistivity metal of use is not limited to gold, platinum etc., in this way, completing back process.
Finally, as shown in figure 9, S107 is executed, using heating and the protection of organic or inorganic solution wet etching photoresist
Layer and slide glass, adhesive.Specifically, slide glass is removed using heating method, by wet etching mode, front is removed using acetone
Photoetching protective glue and adhesive, to complete entire technical process.
Through the above technical solution, Si substrate is used as the carrier of entire epitaxial structure, is easy to remove completely.It is removing
The mechanical lapping that SiC can be saved afterwards avoids causing irreversible damage to front device；Directly thin layer SiC can be carried out
Backside through vias technique largely reduces the preparation process difficulty of GaN HEMT microwave power device, device performance and yield
Significantly promoted.
The above description is only an embodiment of the present invention, is not intended to limit the scope of the invention, all to utilize this hair
Equivalent structure or equivalent flow shift made by bright specification and accompanying drawing content is applied directly or indirectly in other relevant skills
Art field, is included within the scope of the present invention.
Claims (9)
1. the process based on Si substrate epitaxial SiC base GaN HEMT, which comprises the steps of:
SiC layer is grown on a si substrate；
GaN HEMT device is grown in the SiC layer；
Photoetching compound protective layer is smeared in the GaN HEMT device, and preset time is toasted with preset temperature, in the photoetching
Slide glass is pasted using adhesive on compound protective layer；
Corrosion removal is carried out to the Si substrate at the GaN HEMT device back side using wet process or dry method mode；
Backside through vias technique is carried out in the SiC layer for removing Si substrate, so that GaN HEMT device front ground area and reverse side
Connection；
On the GaN HEMT device back side, that is, SiC layer face, deposited metal Ti or Au；
Using heating and organic or inorganic solution wet etching photoetching compound protective layer and slide glass, adhesive.
2. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that institute
The thickness for stating Si substrate is specially 200-600 μm, and the resistance value of Si substrate is 5000 Ω .mm, and doping type is N-type or p-type, Si lining
The growth crystal orientation at bottom is 001 direction or 111 directions.
3. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that
SiC layer is grown on Si substrate, specifically:
MOCVD is used on a si substrate, and any mode grows SiC layer in PECVD, ICPCVD.
4. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that institute
Stating SiC layer is specially monocrystalline or polycrystalline, with a thickness of 1-200 μm.
5. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that
GaN HEMT device is grown in the SiC layer, specifically:
MOCVD is used in the SiC layer, any mode grows GaN HEMT device in MBE, HVPE.
6. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that
GaN HEMT device is grown in the SiC layer, is specifically included:
Successively growing AIN nucleating layer, GaN buffer layer, AlN insert layer, AlGaN potential barrier, GaN cap in the SiC layer, shape
At GaN HEMT epitaxial wafer；
Device active region isolation is successively carried out on the GaN HEMT epitaxial wafer, source and drain Ohmic contact, gate contact, electrode add
Thick, metal interconnection technique, completes the preparation of GaN HEMT device.
7. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that institute
State photoetching compound protective layer with a thickness of 1 μm -100 μm.
8. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that
It removes and carries out backside through vias technique in the SiC layer of Si substrate, so that GaN HEMT device front ground area is connected to reverse side, tool
Body includes:
Using photoetching negtive photoresist, in GaN HEMT device front ground area in such a way that dual surface lithography is aligned and is electroplated, formed
With a thickness of 5 μm of W metal etching mask；
Use etching gas for SF6, diluent gas is the method for etching plasma etching SiC layer of Ar；
Then use etching gas for Cl2It is BCl with diluent gas3Method for etching plasma etching GaN HEMT device
Nitride layer is to GaN HEMT device front ground area, so that GaN HEMT device front ground area is connected to reverse side.
9. the process according to claim 1 based on Si substrate epitaxial SiC base GaN HEMT, which is characterized in that
On the GaN HEMT device back side, that is, SiC layer face, deposited metal Ti or Au, specifically:
On the GaN HEMT device back side, that is, SiC layer face, using any one mode in electron beam evaporation, magnetron sputtering, plating
Deposited metal Ti or Au.
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| CN112885710A (en) * | 2021-01-15 | 2021-06-01 | 广州爱思威科技股份有限公司 | Preparation method and application of epitaxial wafer of semiconductor |
| CN112968059B (en) * | 2021-02-04 | 2022-04-19 | 宁波海特创电控有限公司 | Novel enhancement mode gaN HEMT device structure |
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