CN106953818A - Balanced device sets device - Google Patents
Balanced device sets device Download PDFInfo
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- CN106953818A CN106953818A CN201710073300.6A CN201710073300A CN106953818A CN 106953818 A CN106953818 A CN 106953818A CN 201710073300 A CN201710073300 A CN 201710073300A CN 106953818 A CN106953818 A CN 106953818A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03878—Line equalisers; line build-out devices
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Abstract
The embodiment of the invention discloses a kind of balanced device, device is set.Described device includes：Filter circuit, analog-digital converter, digital storage, digital comparator and the first digital accumulator, filter circuit, analog-digital converter, digital storage, digital comparator and the first digital accumulator are sequentially connected with, the output end of balanced device is connected with the input of the filter circuit, the output end of first digital accumulator is connected with the setting value input of balanced device, and the output end of analog-digital converter is connected with the input of digital comparator.The technical scheme of the embodiment of the present invention is solved more to waste time and energy to accurate set of setting value progress of balanced device in the prior art, and the higher technical problem of cost, realize single, quick, easy, accurate and the setting value to balanced device is accurately set at low cost, while also saving labour to a certain extent.
Description
Technical field
Set technology, more particularly to a kind of balanced device that device is set the present embodiments relate to parametric equalizer.
Background technology
In internet communication, the data transfer of computer motherboard chip chamber, fiber optic communication and High speed rear panel data transfer etc.
Occasion, the serial data transmission speed of single passage has reached or has been even more than 10Gbps-20Gbps.With transmission rate
Raising, increasingly severe the problems caused by by signal integrity, such as transmission medium loss, reflection, impedance mismatching, crosstalk
Deng so that the data that receiving terminal is received are before high level/low level judgement is carried out, and its track has been superimposed formed eye pattern
Partly or completely complete closure.
In order to improve communication quality, the bit error rate and intersymbol interference are reduced, channel equalization technique is generally used in receiving terminal, i.e.,
Using balanced device, to offset the influence of unfavorable factor on channel, such as channel loss, frequency response unevenness.Due to time, ring
The difference of the factors such as border, temperature, the transmission characteristic of each channel is also not quite similar, therefore the setting value of balanced device is needed according to letter
Road does the adjustment of adaptability, simultaneously because the offset voltage of balanced device itself also can produce influence to the transmission quality of signal, because
This, the offset compensation value of balanced device is also required to correctly be set.
In the prior art, to balanced device setting value and offset compensation voltage is accurately set, typically firstly the need of
The eye pattern of balanced device is measured using instrumentation, the setting value and offset voltage for then manually adjusting balanced device according to eye pattern are mended
Repay, not only waste time and energy, and the larger mobile inconvenience of the general volume of instrumentation of measurement eye pattern, and it is expensive.
The content of the invention
In view of this, device is set the embodiments of the invention provide a kind of balanced device, to optimize in the prior art to equilibrium
The setting value and offset compensation voltage of device, which carry out accurate set, more to waste time and energy, and the higher technical problem of cost.
The embodiments of the invention provide a kind of balanced device, device is set, including：Filter circuit 101, analog-digital converter 102,
Digital storage 103, the digital accumulator 105 of digital comparator 104 and first；
The filter circuit 101, the analog-digital converter 102, the digital storage 103, the digital comparator 104
It is sequentially connected with first digital accumulator 105, the output end of balanced device 201 and the input phase of the filter circuit 101
Even, the output end of first digital accumulator 105 is connected with the setting value input of the balanced device 201, and the modulus turns
The output end of parallel operation 102 is connected with the input of the digital comparator 104；
The equalizing signal that 101 pairs of the filter circuit balanced device 201 is exported carries out being filtrated to get trap signal, described
102 pairs of the analog-digital converter trap signal carries out analog-to-digital conversion and obtains the first data signal, is surveyed when the balanced device 201 is inputted
During trial signal, the digital storage 103 receives first data signal, when the 201 input service signal of balanced device,
The digital storage 103 no longer receives first data signal, and the digital comparator 104 is according to the analog-digital converter
The second data signal that first data signal and the digital storage 103 of 102 outputs are exported is compared, output ratio
Relatively result, first digital accumulator 105 carries out data accumulation according to the comparative result, until first data signal
Numerical value be more than or equal to the numerical value of second data signal, and will it is cumulative after data output give the balanced device 201.
In said apparatus, it is preferred that also include：Second digital accumulator 106；
The input of second digital accumulator 106 is connected with the output end of the digital comparator 104, and described second
The output end of digital accumulator 106 is connected with the offset voltage input of the balanced device 201；
Wherein, the balanced device 201 includes one or two signal input part；
When the input and the balanced device 201 that turn off the balanced device 201 include a signal input part, signal input
When terminating into the first normal voltage, or including two signal input parts, two signal input part short circuits or simultaneously access are described
During the first normal voltage, the digital storage 103 does not receive first data signal, and receives external reference value input letter
Number, first digital accumulator 105 no longer receives the comparative result, and second digital accumulator 106 is according to the ratio
Relatively result carries out data accumulation, until the numerical value of first data signal is more than or equal to the number of second data signal
Value, and will it is cumulative after data output give the balanced device 201.
In said apparatus, it is preferred that the filter 101 includes：Buffer 1011, the and of analog multiplier 1012
Low pass filter 1013；
The buffer 1011, the analog multiplier 1012 and the low pass filter 1013 are sequentially connected with, wherein, institute
The output end of buffer 1011 is stated with two signal input parts of the analog multiplier 1012 while being connected.
In said apparatus, it is preferred that also include：Input switch 107, the 3rd digital accumulator 108 and offset voltage
Compensating module 109；
The input of the input switch 107 is connected with the output end of the balanced device 201, the input switch 107
Output end is connected with the input of the buffer 1011, and the input of the 3rd digital accumulator 108 compares with the numeral
Output end compared with device 104 is connected, output end and the offset compensation module 109 of the 3rd digital accumulator 108
Input is connected, the output end of the offset compensation module 109 and the compensation input phase of the analog multiplier 102
Even；
Wherein, the buffer 1011 includes one or two input；
When turning off the input switch 107 and the buffer 1011 includes an input, input access second
During normal voltage, or including two inputs, two input short circuits or when accessing second normal voltage simultaneously are described
Digital storage 103 does not receive first data signal, and receives external reference value input signal, and first numeral is cumulative
Device 105 and second digital accumulator 106 do not receive the comparative result, and the 3rd digital accumulator 108 is according to described
Comparative result carries out data accumulation, until the numerical value of first data signal is more than or equal to the number of second data signal
Value, and will it is cumulative after data output give the offset compensation module 109, the offset compensation module 109 will be mended
Electric signal output is repaid to the analog multiplier 102.
In said apparatus, it is preferred that the analog-digital converter 102 is 5 analog-digital converters.
In said apparatus, it is preferred that the mode of operation of the buffer 1011 include high-gain low bandwidth model and
Low gain high bandwidth mode.
In said apparatus, it is preferred that the input switch 107 is cmos analog switch.
In said apparatus, it is preferred that the mode of operation of the low pass filter 1013 include 0dB gain modes and
6dB gain modes.
Device is set the embodiments of the invention provide a kind of balanced device, by using filter circuit 101, analog-digital converter
102nd, digital storage 103, the digital accumulator 105 of digital comparator 104 and first, and make filter circuit 101, analog-digital converter
102nd, digital storage 103, the digital accumulator 105 of digital comparator 104 and first are sequentially connected with, the output end of balanced device 201
It is connected with the input of filter circuit 101, the output end of the first digital accumulator 105 and the setting value input of balanced device 201
It is connected, the output end of analog-digital converter 102 is connected with the input of digital comparator 104, solves in the prior art to equilibrium
The setting value of device, which carries out accurate set, more to waste time and energy, and the higher technical problem of cost, realize single, it is quick, easy,
It is accurate and the setting value to balanced device is accurately set at low cost, while also saving labour to a certain extent.
Brief description of the drawings
Fig. 1 a are the structure charts that a kind of balanced device that the embodiment of the present invention one is provided sets device；
Fig. 1 b are before and after a kind of balanced device that the embodiment of the present invention one is provided is adjusted to input signal according to setting value
Output signal eye pattern comparison diagram；
Fig. 2 is the structure chart that a kind of balanced device that the embodiment of the present invention two is provided sets device；
Fig. 3 is the structure chart that a kind of balanced device that the embodiment of the present invention three is provided sets device.
Embodiment
In order that the object, technical solutions and advantages of the present invention are clearer, below in conjunction with the accompanying drawings to specific reality of the invention
Example is applied to be described in further detail.It is understood that specific embodiment described herein is used only for explaining the present invention,
Rather than limitation of the invention.
It also should be noted that, for the ease of description, illustrate only in accompanying drawing part related to the present invention rather than
Full content.It should be mentioned that some exemplary embodiments are described before exemplary embodiment is discussed in greater detail
Into the processing or method described as flow chart.Although operations (or step) are described as the processing of order by flow chart,
It is that many of which operation can be by concurrently, concomitantly or while implement.In addition, the order of operations can be by again
Arrange.The processing can be terminated when its operations are completed, it is also possible to the additional step being not included in accompanying drawing.
The processing can correspond to method, function, code, subroutine, subprogram etc..
Embodiment one
Fig. 1 a are balanced device in the structure chart that a kind of balanced device that the embodiment of the present invention one is provided sets device, the present embodiment
The structure of device is set to specifically include：
Filter circuit 101, analog-digital converter 102, digital storage 103, the digital accumulator of digital comparator 104 and first
105, filter circuit 101, analog-digital converter 102, digital storage 103, the digital accumulator 105 of digital comparator 104 and first
It is sequentially connected with, the output end of balanced device 201 is connected with the input of filter circuit 101, the output end of the first digital accumulator 105
It is connected with the setting value input of balanced device 201, the output end of analog-digital converter 102 and the input phase of digital comparator 104
Even.
Further, filter circuit 101 is optimized for：Buffer 1011, analog multiplier 1012 and low pass filter
1013, buffer 1011, analog multiplier 1012 and low pass filter 1013 are sequentially connected with, wherein, the output of buffer 1011
End is connected simultaneously with two signal input parts of analog multiplier 1012.
It will be appreciated by persons skilled in the art that different losses are had because signal is transmitted in different channels, and
And the loss of high-frequency signal is particularly acute, therefore, part is had in the eye pattern of equalizer output signal tends to the phenomenon of closure, such as
In Fig. 1 b shown in left hand view, so, balanced device typically can all be compensated to input signal, especially high-frequency signal part, be mended
The numerical value repaid needs the actual attenuation degree of basis signal and determined.
In the present embodiment, using the first data signal corresponding to test signal value as gain compensation benchmark
Fiducial value, wherein, test signal can be specifically continuous 0/1 alternating signal, and frequency allows for the input equalizer of balanced device 201
/ 10th or more low-frequency signals of signal peak frequency are transmitted, it will be appreciated by persons skilled in the art that frequency is got over
The decay that low signal is produced by transmission is smaller, therefore, it is possible to use low frequency signal is as test signal, also,
In the present embodiment, acquiescence balanced device 201 and balanced device set device without offset voltage.
The adjustment process of the setting value of balanced device 201, exemplary can be, the input test signal first of balanced device 201,
Buffer 1011 is set to the mode of operation of low gain high bandwidth, the load of the test signal for improving the output of balanced device 201
Driving force, the output end of buffer 1011 is connected simultaneously with two inputs of analog multiplier 1012, with to buffer
The level value of 1011 output signal carries out square operation, and low pass filter 1013 is set to the mode of operation of 0dB gains to defeated
Enter signal and be only integrated computing, obtain the relative efficiency value of power, analog-digital converter 102 is received after filtering signal, meeting
Analog-to-digital conversion is carried out to filtering signal and obtains the first data signal, digital storage 103 receives the first data signal, and is deposited
Storage, although digital comparator 104 can export comparative result, the first digital accumulator according to input data in the process
105 do not receive the comparative result of the output of digital comparator 104.
It will be appreciated by persons skilled in the art that the span of the first data signal is by analog-digital converter 102
What number of significant digit was determined, for example, when the number of significant digit of analog-digital converter 102 is 5, then the value model of the first data signal
It is 1 to 32 to enclose, when the number of significant digit of analog-digital converter 102 is 6, then the span of the first data signal is 1 to 64.
Then, the working signal for the maximum transfer rate that the input equalizer of balanced device 201 is allowed, wherein, working signal tool
Body can be continuous 0/1 alternating signal, and now, buffer 1011 is still set to the mode of operation of low gain high bandwidth, low pass filtered
The mode of operation that ripple device 1013 is set to 6dB gains makes output signal compared with input signal while being filtered to input signal
6dB gain is produced, digital storage 103 no longer receives the first data signal, and digital comparator 104 is according to analog-digital converter
The second data signal that the first data signal and digital storage 103 of 102 outputs are exported is compared, and exports comparative result,
In embodiment in the present embodiment and afterwards, when the numerical value of the first data signal is more than or equal to the numerical value of the second data signal
When, the comparative result that digital comparator 104 is exported is 0, when the numerical value of the first data signal is less than the numerical value of the second data signal
When, the comparative result that digital comparator 104 is exported is 1, and the first digital accumulator 105 carries out data accumulation according to comparative result,
And will it is cumulative after data output to balanced device 201, balanced device 201 according to setting value input input data to input signal
It is adjusted, also, when the numerical value of the first data signal is less than the numerical value of the second data signal, digital comparator 104 can be after
It is continuous that first data signal (now the first data signal is that working signal after being adjusted by balanced device 201 is produced) and second are counted
Word signal is compared and exports comparative result, until the numerical value of the first data signal is more than or equal to the number of the second data signal
Untill value, the adjustment process of the setting value of balanced device 201 is so far completed, now, the working signal of 201 pairs of inputs of balanced device
Compensation rate, can make it that the working signal of 201 pairs of inputs of balanced device carries out accurate voltage compensation, so that balanced device output is equal
The eye pattern of weighing apparatus signal is closer to perfect condition, as shown in right part of flg in Fig. 1 b.
In addition, needing the gain compensation for carrying out 6dB to equalizer output signal to carry out to low pass filter 1013 herein
Explain, when reaching the state of right part of flg in Fig. 1 b due to the eye pattern of the output signal when balanced device 201, the bandwidth of balanced device 201
Frequency point during signal amplitude decay 3dB is defined as, therefore the signal of frequency has been decayed compared to low-frequency signals at bandwidth
3dB, then after the square operation of analog multiplier compared to low frequency signals decay 6dB, so filter circuit is herein
Place's compensation 6dB gains.
Device is set the embodiments of the invention provide a kind of balanced device, by using filter circuit 101, analog-digital converter
102nd, digital storage 103, the digital accumulator 105 of digital comparator 104 and first, and make filter circuit 101, analog-digital converter
102nd, digital storage 103, the digital accumulator 105 of digital comparator 104 and first are sequentially connected with, the output end of balanced device 201
It is connected with the input of filter circuit 101, the output end of the first digital accumulator 105 and the setting value input of balanced device 201
It is connected, the output end of analog-digital converter 102 is connected with the input of digital comparator 104, solves in the prior art to equilibrium
The setting value of device, which carries out accurate set, more to waste time and energy, and the higher technical problem of cost, realize single, it is quick, easy,
It is accurate and the setting value to balanced device is accurately set at low cost, while also saving labour to a certain extent.
Embodiment two
Fig. 2 is the structure chart that a kind of balanced device that the embodiment of the present invention two is provided sets device, and the present embodiment is with above-mentioned reality
Apply and optimize based on example, in the present embodiment, as shown in Fig. 2 also including：Second digital accumulator 106, the second numeral is tired
Plus the input of device 106 is connected with the output end of digital comparator 104, the output end and balanced device of the second digital accumulator 106
201 offset voltage input is connected.
It will be appreciated by persons skilled in the art that balanced device itself typically all can more or less have offset voltage, because
This, in the present embodiment, is added the second digital accumulator 106, is compensated with the offset voltage to balanced device 201, but this
Balanced device is still given tacit consent in embodiment sets system that offset voltage is not present, also, when balanced device 201 has offset voltage,
Need first to compensate the offset voltage of balanced device 201, then the setting value of balanced device 201 can be just adjusted,
That is, it is necessary to first complete the offset compensation process of the balanced device 201 in the present embodiment, it could perform in embodiment one
Balanced device 201 setting value adjustment process.
Equally, those skilled in the art will also be appreciated that the reception signal of balanced device is largely differential signal, because
This, most of balanced device has two signal input parts, for receiving differential signal.In the present embodiment, the nothing of balanced device 201
By being only one of which signal input part, still there are two signal input parts, do not affect the offset voltage progress to balanced device 201
The method of compensation and the degree of accuracy.
The offset compensation process of balanced device 201, exemplary can be, it is necessary first to turn off the defeated of balanced device 201
Enter, buffer 1011 is set to the mode of operation of high-gain low bandwidth, low pass filter 1013 is set to the work of 0dB gains
Pattern, then, when balanced device 201 includes a signal input part, makes the signal input part access the first normal voltage, when equal
When weighing apparatus 201 includes two signal input parts, make two signal input part short circuits or while access the first normal voltage, its
In, the magnitude of voltage of the first normal voltage is any voltage value in the input voltage range of balanced device 201, the first normal voltage allusion quotation
Type can be balanced device 201 signal input part DC common mode, can be typically 0.9V etc..
In addition, herein to buffer 1011 to be set to the mode of operation of high-gain low bandwidth, low pass filter 1013
The mode of operation for being set to 0dB gains is explained, because the numerical value of offset voltage is typically small, so needing buffer
1011 mode of operation is set to the mode of operation of low gain high bandwidth, while using analog multiplier 1012, with to imbalance electricity
Pressure is amplified, so that the input signal of low pass filter 1013 is useful signal, simultaneously as offset voltage signal is not high
Frequency signal, without serious decay, so carry out gain compensation to it without using low pass filter 1013, therefore by low pass filtered
The mode of operation of ripple device 1013 is set to the mode of operation of 0dB gains.
Now, digital storage 103 does not receive the first data signal, but receives external reference value input signal, and this is outer
Reference value is input in digital storage 103 by portion's reference value input signal, wherein, reference value specifically refers to work as balanced device 201
During in the absence of offset voltage, the numerical value for the first data signal that analog-digital converter 102 is exported, due to the numerical value of the first data signal
It is to be determined by the output voltage of low pass filter 1013, therefore, different low pass filters are to that should have different reference values.
In one specific example, when offset voltage is not present in balanced device 201, the output voltage of low pass filter 1013 turns for modulus
/ 2nd of the reference voltage of parallel operation 102, the number of significant digit of analog-digital converter 102 is 5, then, reference value should be 16, by
Belong to prior art in the operation principle of analog-digital converter, therefore be no longer described in detail herein.
Further, digital comparator 104 is exported according to analog-digital converter 102 the first data signal and digital storage
Second data signal of 103 outputs is compared, and exports comparative result, now, the first digital accumulator 105, which is no longer received, to be compared
As a result, the second digital accumulator 106 carries out data accumulation according to comparative result, and will it is cumulative after data output to balanced device
201, balanced device 201 carries out voltage compensation to input signal according to the input data of offset voltage input, also, when the first number
When the numerical value of word signal is less than the numerical value of the second data signal, digital comparator 104 may proceed to the first data signal (now the
One data signal is that the output signal for input signal produce after offset compensation by balanced device 201 is generated) and the
Two digital signal is compared and exports comparative result, until the numerical value of the first data signal is more than or equal to the second data signal
Numerical value untill, so far complete the offset compensation process of balanced device 201, now, balanced device 201 can according to imbalance electricity
The numerical value of input input is pressed to carry out offset compensation exactly to the working signal of input, to offset by balanced device itself
The decay of the voltage amplitude for the output signal that offset voltage is produced.
Device is set the embodiments of the invention provide a kind of balanced device, by using buffer 1011, analog multiplier
1012nd, low pass filter 1013, analog-digital converter 102, digital storage 103, digital comparator 104, the first digital accumulator
105 and second digital accumulator 106, and make buffer 1011, analog multiplier 1012, low pass filter 1013, analog-to-digital conversion
Device 102, digital storage 103, the digital accumulator 105 of digital comparator 104 and first are sequentially connected with, the output of balanced device 201
End is connected with the input of buffer 1011, the output end of the first digital accumulator 105 and the setting value input of balanced device 201
It is connected, the output end of analog-digital converter 102 is connected with the input of digital comparator 104, the input of the second digital accumulator 106
End is connected with the output end of digital comparator 104, the output end of the second digital accumulator 106 and the offset voltage of balanced device 201
Input is connected, and solves setting value in the prior art to balanced device and offset compensation voltage carries out accurate setting more time-consuming
Arduously, and the higher technical problem of cost, realize single, quick, easy, the accurate and setting value to balanced device at low cost
Accurately set, while also saving labour to a certain extent.
Embodiment three
Fig. 3 is the structure chart that a kind of balanced device that the embodiment of the present invention three is provided sets device, and the present embodiment is with above-mentioned reality
Apply and optimize based on example, in the present embodiment, as shown in figure 3, being optimized for also including：The numeral of input switch the 107, the 3rd is tired
Plus device 108 and offset compensation module 109, the input of input switch 107 is connected with the output end of balanced device 201, inputs
The output end of switch 107 is connected with the input of buffer 1011, the input and digital comparator of the 3rd digital accumulator 108
104 output end is connected, and the output end of the 3rd digital accumulator 108 is connected with the input of offset compensation module 109, loses
The output end of voltage compensation module 109 is adjusted to be connected with the compensation input of analog multiplier 102.
It will be appreciated by persons skilled in the art that the device such as buffer and analog multiplier has offset voltage sometimes
In the presence of therefore, in the present embodiment, adding input switch 107, the 3rd digital accumulator 108 and offset compensation module
109, compensated with the offset voltage that device is set to balanced device, also, when balanced device 201 and balanced device set device to deposit
In offset voltage, it is necessary to which the offset voltage for setting device to balanced device first is compensated, then to the imbalance of balanced device 201
Voltage is compensated, and finally the setting value to balanced device 201 is adjusted, that is to say, that, it is necessary to first complete in the present embodiment
Balanced device sets the offset compensation process of device, then completes the offset compensation mistake of the balanced device 201 in embodiment two
Journey, could perform the adjustment process of the setting value of balanced device 201 in embodiment one.
Further, when the reception signal of balanced device 201 is differential signal, buffer 1011 has two signal inputs
End, for receiving the differential signal that balanced device 201 is exported, in the present embodiment, buffer 1011 either believe by only one of which
Number input, still there is two signal input parts, does not affect the side for setting the offset voltage of device to compensate in balanced device
Method and the degree of accuracy.
Balanced device sets the offset compensation process of device, and exemplary can turn off input switch 107 first,
And low pass filter is set to the mode of operation of 0dB gains, buffer 1011 is set to the Working mould of high-gain low bandwidth
Formula, then, when buffer 1011 includes an input, makes the input access the second normal voltage, when buffer 1011
During including two inputs, make two input short circuits or while access the second normal voltage, wherein, the second normal voltage
Magnitude of voltage is any voltage value in the input voltage range of buffer 1011, and the second normal voltage can be specifically balanced device
The DC common mode of 201 output end, can be typically 0.9V etc., wherein, input switch 107 can be typically CMOS
Switch.
Now, digital storage 103 does not receive the first data signal, and receives external reference value input signal, outside this
Reference value is inputted digital storage 103 by reference value input signal, wherein, reference value is specifically referred to when balanced device sets device not
When there is offset voltage, the numerical value for the first data signal that analog-digital converter 102 is exported.
Further, digital comparator 104 is exported according to analog-digital converter 102 the first data signal and digital storage
Second data signal of 103 outputs is compared, and exports comparative result, now, and the first digital accumulator 105 and the second numeral are tired
Plus device 106 does not receive comparative result, the 3rd digital accumulator 108 carries out data accumulation according to comparative result, and will it is cumulative after
Data output is to offset compensation module 109, and offset compensation module 109 will compensate electric signal output to analog multiplier
102, output signal and the letter of compensation input input produced by the signal that analog multiplier 102 will be inputted as signal input part
Number it is overlapped, by the signal output after superposition to low pass filter 1013, also, when the numerical value of the first data signal is less than the
During the numerical value of two digital signal, digital comparator 104 may proceed to the first data signal that (now the first data signal is by being superimposed
What rear signal was produced) and the second data signal be compared and export comparative result, up to the numerical value of the first data signal is big
In or equal to the second data signal numerical value untill, so far complete balanced device set device offset compensation process, this
When, balanced device sets the device can accurately to be compensated internal offset voltage, so that the first digital accumulator 105 and the
Two digital accumulators 106 export the setting value and offset compensation value of correct balanced device 201 respectively.
Device is set the embodiments of the invention provide a kind of balanced device, by by input switch 107, buffer 1011, mould
Quasi-multiplication device 1012, low pass filter 1013, analog-digital converter 102, digital storage 103, digital comparator the 104, the 3rd are counted
Word accumulator 108 and offset compensation module 109 are sequentially connected with, by the input and output end of the first digital accumulator 105
It is connected respectively with the output end of digital comparator 104 and the setting value input of balanced device 201, by the second digital accumulator 106
Input and output end be connected respectively with the output end of digital comparator 104 and the offset voltage input of balanced device 201, solve
The setting value in the prior art to balanced device of having determined and offset compensation voltage, which carry out accurate set, more wastes time and energy, and cost compared with
High technical problem, realizes single, quick, easy, accurate and the setting value to balanced device is accurately set at low cost,
Labour is also saved to a certain extent simultaneously.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art it is various it is obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention is carried out by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more Equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (8)
1. a kind of balanced device sets device, it is characterised in that including：Filter circuit (101), analog-digital converter (102), numeral are deposited
Reservoir (103), digital comparator (104) and the first digital accumulator (105)；
The filter circuit (101), the analog-digital converter (102), the digital storage (103), the digital comparator
(104) it is sequentially connected with first digital accumulator (105), output end and the filter circuit (101) of balanced device (201)
Input be connected, the output end of first digital accumulator (105) and the setting value input phase of the balanced device (201)
Even, the output end of the analog-digital converter (102) is connected with the input of the digital comparator (104)；
The equalizing signal that the filter circuit (101) exports to the balanced device (201) carries out being filtrated to get trap signal, described
Analog-digital converter (102) carries out analog-to-digital conversion to the trap signal and obtains the first data signal, when the balanced device (201) is defeated
When entering test signal, the digital storage (103) receives first data signal, when the balanced device (201) inputs work
When making signal, the digital storage (103) no longer receives first data signal, digital comparator (104) basis
First data signal of analog-digital converter (102) output and the second numeral of the digital storage (103) output
Signal is compared, and exports comparative result, and first digital accumulator (105) carries out data according to the comparative result and tired out
Plus, until the numerical value of first data signal is more than or equal to the numerical value of second data signal, and will it is cumulative after number
The balanced device (201) is given according to output.
2. device according to claim 1, it is characterised in that also include：Second digital accumulator (106)；
The input of second digital accumulator (106) is connected with the output end of the digital comparator (104), and described second
The output end of digital accumulator (106) is connected with the offset voltage input of the balanced device (201)；
Wherein, the balanced device (201) includes one or two signal input part；
When the input and the balanced device (201) that turn off the balanced device (201) include a signal input part, signal input
When terminating into the first normal voltage, or including two signal input parts, two signal input part short circuits or simultaneously access are described
During the first normal voltage, the digital storage (103) does not receive first data signal, and receives the input of external reference value
Signal, first digital accumulator (105) no longer receives the comparative result, the second digital accumulator (106) basis
The comparative result carries out data accumulation, until the numerical value of first data signal is more than or equal to second data signal
Numerical value, and will it is cumulative after data output give the balanced device (201).
3. device according to claim 1 or 2, it is characterised in that the filter (101) includes：Buffer
(1011), analog multiplier (1012) and low pass filter (1013)；
The buffer (1011), the analog multiplier (1012) and the low pass filter (1013) are sequentially connected with, wherein,
The output end of the buffer (1011) is connected simultaneously with two signal input parts of the analog multiplier (1012).
4. device according to claim 3, it is characterised in that also include：Input switch (107), the 3rd digital accumulator
And offset compensation module (109) (108)；
The input of the input switch (107) is connected with the output end of the balanced device (201), the input switch (107)
Output end be connected with the input of the buffer (1011), the input of the 3rd digital accumulator (108) with it is described
The output end of digital comparator (104) is connected, output end and the offset compensation of the 3rd digital accumulator (108)
The input of module (109) is connected, output end and the analog multiplier (102) of the offset compensation module (109)
Compensation input be connected；
Wherein, the buffer (1011) includes one or two input；
Include an input, input access second when turning off the input switch (107) and the buffer (1011)
During normal voltage, or including two inputs, two input short circuits or when accessing second normal voltage simultaneously are described
Digital storage (103) does not receive first data signal, and receives external reference value input signal, and first numeral is tired
Plus device (105) and second digital accumulator (106) do not receive the comparative result, the 3rd digital accumulator (108)
Data accumulation is carried out according to the comparative result, until the numerical value of first data signal is more than or equal to the described second numeral
The numerical value of signal, and will it is cumulative after data output give the offset compensation module (109), the offset compensation mould
Block (109) will compensate electric signal output to the analog multiplier (102).
5. the device according to any one of claim 1,2 or 4, it is characterised in that the analog-digital converter (102) is 5
Position analog-digital converter.
6. device according to claim 4, it is characterised in that the mode of operation of the buffer (1011) includes high-gain
Low bandwidth model and low gain high bandwidth mode.
7. device according to claim 4, it is characterised in that the input switch (107) is cmos analog switch.
8. device according to claim 4, it is characterised in that the mode of operation of the low pass filter (1013) includes
0dB gain modes and 6dB gain modes.
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| CN201710073300.6A CN106953818B (en) | 2017-02-10 | 2017-02-10 | Equalizer setting device |
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| WO2019085091A1 (en) * | 2017-11-02 | 2019-05-09 | 英特格灵芯片(天津)有限公司 | Circuit and method for adaptive adjustment of duty cycle of signal at receiving end |
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| CN106953818B (en) | 2020-10-20 |
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