CN113433402B - Analog signal equalization quality detection method - Google Patents

Analog signal equalization quality detection method Download PDF

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CN113433402B
CN113433402B CN202110617449.2A CN202110617449A CN113433402B CN 113433402 B CN113433402 B CN 113433402B CN 202110617449 A CN202110617449 A CN 202110617449A CN 113433402 B CN113433402 B CN 113433402B
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CN113433402A (en
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徐希
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Xinsiyuan Microelectronics Co ltd
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    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/04Measuring peak values or amplitude or envelope of ac or of pulses

Abstract

The invention discloses a method for detecting the equalization quality of an analog signal, which comprises the following steps: acquiring an analog signal to be detected output by an analog front end; carrying out high-frequency attenuation on the analog signal to be detected to obtain a low-pass signal, and carrying out low-frequency attenuation on the analog signal to be detected to obtain a high-pass signal; inputting the low-pass signal into a peak value detection circuit to obtain a first peak value voltage, and inputting the high-pass signal into the peak value detection circuit to obtain a second peak value voltage; acquiring an equalization quality parameter based on the first peak voltage and the second peak voltage; the equalization quality parameters are input to the analog front end. The method artificially attenuates the signal output by the analog front end, then detects the even highest peak voltage of the high-low frequency path of the attenuated signal, trims the detected highest peak voltage, and compares the trimmed highest peak voltage to generate the analog control signal. Namely, the method not only can solve the problem of signal quality quantization of analog self-adaption, but also has the advantages of high accuracy, wider application range and the like.

Description

Analog signal equalization quality detection method
Technical Field
The invention relates to the technical field of communication interfaces, in particular to a method for detecting the equalization quality of an analog signal.
Background
With the rapid development of the information age, the use of high-speed communication interfaces has become widespread. Most of the channel environments of the high-speed communication interfaces on the market are not ideal, so that the problem of data attenuation always occurs in the data transmission process, and the influence on high-speed high-frequency signals is large. Therefore, the receiving end of data transmission usually needs to adjust the signal through the analog front end to recover a better signal with logic potential that can be identified, and then send it to the digital part for processing. Fig. 1 shows a schematic diagram of a process in which signals sequentially pass through a conventional high-speed communication interface and an analog front end.
The function of an Analog Front End (AFE) generally includes two points: firstly, the swing of the signal is adjusted (namely VGA function); the other is to compensate for attenuation of the high frequency signal (i.e., equalization function). When the analog front end compensates the attenuation of the high-frequency signal, the analog front end is used as an analog circuit and needs to perform corresponding parameter adjustment on channels with different attenuation degrees, and the adjustment mode is mainly realized by adjusting related adjustment parameters in the circuit. The problem now mainly faced by analog front-ends is therefore how to "quantify" the received signal quality and give relevant adjustment parameters. The currently common quantization mode is violence traversal or receiving end training, and the quantization mode undoubtedly needs logic participation, so that the complexity of the process is increased invisibly; secondly, the gear using logic control is also limited by the digit, so that the quantization precision is limited; besides, part of the interfaces have a repeated training function, adjustment parameters obtained in a plurality of logic modes are usually fixed after being determined, and real-time adjustment can not be carried out according to the change of the channel state and the environment.
The analog adaptive approach can solve the above-mentioned shortcomings of the logic approach, and then the existing analog adaptive approach also faces the difficulty of how to quantize the signal quality, and the existing pure analog adaptive scheme has a larger limitation in the application range, and two currently known analog adaptive approaches are as follows: the first method is to compare the jump edge speed of the output signal of the analog front end with a faster reference jump edge to judge whether the high frequency is balanced sufficiently, and the deviation of the actual chip process angle and the swing amplitude of the input signal in the method are uncertain, so that the judgment result is inaccurate and even wrong; the second method is to find the middle point of the spectrum and determine whether the spectrum energy is balanced when a specific transmission signal coding method is known, and the method naturally customizes the measurement according to each transmission signal coding method, so that the applicability is weak.
Disclosure of Invention
The invention aims to solve the technical problems that the quality of a signal to be measured is quantized in an analog mode and analog adjustment parameters are difficult to provide in the conventional analog self-adaptive mode, and the application range is limited greatly.
In order to solve the above technical problem, the present invention provides a method for detecting equalization quality of an analog signal, including:
acquiring an analog signal to be detected output by an analog front end;
performing high-frequency attenuation on the analog signal to be detected to obtain a low-pass signal, and performing low-frequency attenuation on the analog signal to be detected to obtain a high-pass signal;
inputting the low-pass signal into a peak detection circuit to obtain a first peak voltage, and inputting the high-pass signal into the peak detection circuit to obtain a second peak voltage;
obtaining an equalization quality parameter based on the first peak voltage and the second peak voltage;
inputting the equalization quality parameter into the analog front end.
Preferably, the step of attenuating the analog signal to be measured with high frequency to obtain a low-pass signal includes:
carrying out high-frequency attenuation on the analog signal to be detected through a low-pass filter to obtain a low-pass signal;
and the corner frequency of the low-pass filter is higher than the lowest fundamental wave component of the analog signal to be measured.
Preferably, the obtaining a high-pass signal by performing low-frequency attenuation on the analog signal to be detected includes:
carrying out low-frequency attenuation on the analog signal to be detected through a high-pass filter to obtain a high-pass signal;
the corner frequency of the high-pass filter is lower than the highest fundamental component of the analog signal to be detected and higher than the second highest fundamental component of the analog signal to be detected.
Preferably, the gain in the passband of the high pass filter and the low pass filter is 1.
Preferably, the step of obtaining an equalization quality parameter based on the first peak voltage and the second peak voltage comprises:
multiplying the first peak voltage by a first trimming multiple to obtain a first peak trimming voltage;
comparing the first peak trimming voltage with the second peak voltage to obtain a first difference parameter;
and taking the first difference parameter and the first trimming multiple as equalization quality parameters.
Preferably, the step of obtaining an equalization quality parameter based on the first peak voltage and the second peak voltage comprises:
multiplying the second peak voltage by a second trimming multiple to obtain a second peak trimming voltage;
comparing the second peak trimming voltage with the first peak voltage to obtain a second difference parameter;
and taking the second difference parameter and the second trimming multiple as equalization quality parameters.
Preferably, the method further comprises:
and transmitting the first peak voltage to an analog front end to serve as an adjusting parameter of the analog front end for adjusting the signal swing.
Preferably, the peak detection circuit comprises an operational amplifier, a limit switch, a storage capacitor and a bandwidth adjusting element; the input end of the limit switch is connected with the output end of the operational amplifier, the output end of the limit switch is connected with one end of the storage capacitor, the other end of the storage capacitor is grounded, and the bandwidth adjusting element is connected to two ends of the storage capacitor in parallel.
Preferably, the limit switch is an N-type MOS transistor, a gate of the N-type MOS transistor is connected to the output end of the operational amplifier, a source of the N-type MOS transistor is connected to the storage capacitor, and a drain of the N-type MOS transistor is connected to the power supply.
Preferably, the bandwidth adjusting element is a current source module.
Compared with the prior art, one or more embodiments in the scheme can have the following advantages or beneficial effects:
by applying the method for detecting the equalization quality of the analog signal, which is provided by the embodiment of the invention, the signal output by the analog front end is artificially attenuated, then the even highest peak voltage of each of the high-frequency and low-frequency paths of the attenuated signal is detected, the detected highest peak voltage is corrected, and the corrected highest peak voltage is compared to generate the analog control signal, wherein the control signal is a parameter of the quantized signal equalization quality and can be directly used for controlling the equalization parameter of the analog front end. The method for detecting the analog signal equalization quality can solve the problem of analog self-adaptive signal quality quantization and has the advantages of high accuracy, wider application range and the like.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 shows a schematic diagram of a process in which signals pass through a conventional high-speed communication interface and an analog front end in sequence;
FIG. 2 is a flow chart illustrating a method for detecting equalization quality of an analog signal according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating an exemplary implementation process of an analog signal equalization quality detection method according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a peak detection circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a signal waveform and its corresponding high-low pass signal waveform that triggers the charging of the peak detection circuit;
FIG. 6 is a diagram illustrating a comparison of a high-order high-pass filter with a low-order high-pass filter according to an embodiment of the present invention;
fig. 7 is an exemplary diagram illustrating another implementation process of the analog signal equalization quality detection method according to an embodiment of the present invention.
Detailed Description
The following detailed description will be given with reference to the accompanying drawings and examples to explain how to apply the technical means to solve the technical problems and to achieve the technical effects. It should be noted that, as long as there is no conflict, the embodiments and the features in the embodiments of the present invention may be combined with each other, and the technical solutions formed are within the scope of the present invention.
When the analog front end compensates the attenuation of the high-frequency signal, corresponding parameter adjustment needs to be performed on channels with different attenuation degrees, and the adjustment mode is mainly realized by adjusting relevant adjustment parameters in a circuit. The conventional quantization mode is violence traversal or receiving end training, and the quantization mode undoubtedly needs logic participation, so that the complexity of the flow is invisibly increased; secondly, the gear using logic control is also limited by the digit, so that the quantization precision is limited; besides, part of the interfaces have retraining functions, adjustment parameters obtained by a plurality of logic modes are usually fixed after being determined, and cannot be adjusted in real time according to changes of channel states and environments. The analog adaptive approach can solve the above logic deficiencies, and two currently known analog adaptive approaches are as follows: the first method is to compare the jump edge speed of the analog front-end output signal with a faster reference jump edge to judge whether the high frequency balance is sufficient, and the deviation of the actual chip process angle and the swing amplitude of the input signal in the method are uncertain, so that the judgment result is inaccurate and even wrong; the second method is to find the middle point of the spectrum and determine whether the spectrum energy is balanced when a specific transmission signal coding method is known, and the method naturally customizes the measurement according to each transmission signal coding method, so that the applicability is weak. Therefore, it can be seen that the existing analog adaptive approach also faces the difficulty of how to quantize the signal quality, and the existing pure analog adaptive scheme has a large limitation in the application range.
Example one
In order to solve the technical problems in the prior art, the embodiment of the invention provides a method for detecting the equalization quality of an analog signal.
FIG. 2 is a flow chart illustrating a method for detecting the equalization quality of an analog signal according to an embodiment of the present invention; fig. 3 is an exemplary diagram illustrating an implementation process of an analog signal equalization quality detection method according to an embodiment of the present invention. Shown with reference to fig. 2 and 3; the method for detecting the equalization quality of the analog signal comprises the following steps.
Step S101, obtaining an analog signal to be tested output by the analog front end.
Specifically, the embodiments of the present invention are generally applicable to detecting the output signal of the analog front end, and therefore, the analog signal that has passed through the analog front end needs to be first acquired as the analog signal to be detected.
And S102, carrying out high-frequency attenuation on the analog signal to be detected to obtain a low-pass signal, and carrying out low-frequency attenuation on the analog signal to be detected to obtain a high-pass signal.
Specifically, after the analog signal to be measured is obtained, the analog signal to be measured needs to be artificially attenuated at a high frequency and a low frequency to obtain an attenuated high-pass signal and an attenuated low-pass signal. Further, the embodiment of the invention performs low-frequency attenuation on the analog signal to be detected through a high-pass filter to obtain a high-pass signal; performing high-frequency attenuation on the analog signal to be detected through a low-pass filter to obtain a low-pass signal; the corner frequency of the high-pass filter is slightly lower than the highest fundamental component of the analog signal to be measured, and the corner frequency of the low-pass filter is slightly higher than the lowest fundamental component of the analog signal to be measured. In order to attenuate the forbidden band frequency as much as possible and improve the measurement precision, the corner frequency of the high-pass filter can be further set to be lower than the highest fundamental component of the analog signal to be measured and higher than the second highest fundamental component of the analog signal to be measured; and meanwhile, the corner frequency of the low-pass filter is set to be higher than the lowest fundamental wave component of the analog signal to be detected and lower than one fourth of the highest fundamental wave component of the analog signal to be detected. Meanwhile, the gains in the pass band ranges of the high-pass filter and the low-pass filter in the attenuation process are both set to be 1.
Step S103, inputting the low-pass signal to the peak detection circuit to obtain a first peak voltage, and inputting the high-pass signal to the peak detection circuit to obtain a second peak voltage.
Specifically, the peak detection circuit in the embodiment of the present invention is mainly used for detecting the maximum peak voltage of the analog signal. Specifically, the embodiment of the invention obtains the highest peak voltage of the high-pass signal by inputting the high-pass signal into the peak detection circuit, and takes the highest peak voltage of the high-pass signal as the second peak voltage; the peak detection circuit inputs the low-pass signal to obtain the highest peak voltage of the low-pass signal, and the highest peak voltage of the low-pass signal is used as the first peak voltage.
FIG. 4 is a schematic diagram of a peak detection circuit according to an embodiment of the present invention; referring to fig. 4, the peak detection circuit in the embodiment of the present invention includes an operational amplifier, a limit switch, a storage capacitor, and a bandwidth adjusting element. The input end of a limit switch is connected with the output end of the operational amplifier, the output end of the limit switch is connected with one end of a storage capacitor, the other end of the storage capacitor is grounded, and a bandwidth adjusting element is connected in parallel with the two ends of the storage capacitor. Preferably, the limit switch is an N-type MOS transistor, a gate of the N-type MOS transistor is connected to the output terminal of the operational amplifier, a source of the N-type MOS transistor is connected to the storage capacitor, and a drain of the N-type MOS transistor is connected to the power supply. And preferably the bandwidth adjusting element is a current source module element. The operational amplifier is used for comparing the peak voltage of the current signal with the previous highest peak voltage recorded on the capacitor; the limit switch is mainly used for charging the capacitor at the moment when the current signal peak voltage is higher than the highest peak voltage, and the limit switch triggers charging at times before the capacitor voltage climbs to the highest peak voltage; the storage capacitor is used for storing the voltage value of the analog signal passing through the limit switch within a certain time; the bandwidth adjustment element is then used to adjust the bandwidth of the entire adaptation loop.
Further, fig. 5 shows an analog signal waveform and its corresponding high-low pass signal waveform schematic diagram that would trigger the peak detection circuit to charge; referring to fig. 5, the operation principle of a peak detection circuit according to an embodiment of the present invention is explained, in which the continuous low bit and continuous high bit tables on the left are the longest continuous constant logic of the transmission data encoding mode. And the thick bar in fig. 5 represents the analog signal to be measured, and let H be the swing of the lowest frequency component of the analog signal to be measured, and H be the swing of the highest frequency component of the analog signal to be measured. The dotted line represents the waveform of the analog signal to be measured after low-pass filtering; and the thin solid line represents the waveform of the analog signal to be detected after high-frequency filtering, and peak value detection is carried out on the dotted line and the thin solid line after filtering.
The low-frequency signal swing of the signal to be measured can be directly measured. The maximum peak value finally measured by measuring the low-pass signal for a long time is determined by the low-frequency component of the analog signal to be measured, so that the measurement value is nearly H. Since all low-frequency components including the dc component are attenuated in the high-pass signal, its behavior in the time domain is similar to that of the thin solid line curve in fig. 5, i.e. its peak voltage is affected not only by the height of the high-frequency fundamental wave itself but also by the code preceding it, like intersymbol interference ISI. Referring to the ISI principle, the high-pass signal in the specially chosen code form of fig. 5 is going to be raised to the highest voltage, i.e. the longest continuous invariant pattern is followed by a highest frequency inverse code. Let the low frequency component of the high-pass signal be attenuated by ATN (H), and the rest be RES (H). By using the ISI characteristics, the peak level of the high-pass signal is measured for a long time by using the peak detection circuit, and the final detected value should be the peak h + atn (h) of the special pattern position shown in fig. 5. For a desirable high pass filter, ATN (H) should be approximately equal to H; at this time, the second peak voltage output by the peak detection circuit should be H + H, the first peak voltage output by the peak detection circuit should be H, and the relative magnitude relation between H and H can be known after the first peak voltage and the second peak voltage are trimmed and compared. The final signal swing and the relationship between H and H (degree of equalization) can be obtained.
And step S104, acquiring an equalization quality parameter based on the first peak voltage and the second peak voltage.
Specifically, as can be seen from the above steps, ideally, the second peak voltage obtained by the peak detection circuit of the high-pass signal is approximately H + H, and the first peak voltage obtained by the peak detection circuit of the low-pass signal is H, and it is obviously impossible to directly differentiate the two voltages to obtain the relationship between H and H. Therefore, the embodiment of the invention performs multiple adjustment on the first peak voltage and/or the second peak voltage, so that the voltage meanings between the peak voltages subjected to multiple adjustment or between the peak voltage subjected to multiple adjustment and another peak voltage not subjected to multiple adjustment form corresponding multiple relations.
Furthermore, in the embodiment of the present invention, the first peak voltage may be multiplied by the first trimming multiple to obtain a first peak trimming voltage, and then the first peak trimming voltage is compared with the second peak voltage through the differential amplifier to obtain a difference value therebetween to obtain a first difference parameter; and then, taking the obtained first difference parameter and the first trimming multiple as the equalization quality parameter of the analog front end. In the embodiment of the invention, the second peak voltage can be multiplied by the second trimming multiple to obtain a second peak trimming voltage; then comparing the second peak value trimming voltage with the first peak value voltage through a differential amplifier to obtain a difference value of the second peak value trimming voltage and the first peak value voltage so as to obtain a second difference value parameter; and finally, taking the second difference parameter and the second trimming multiple as the balance quality parameter of the analog front end.
It should be noted that the amplification factor of the differential amplifier is usually set to be bit 1, and the amplification factor of the differential amplifier may also be sent to the analog front end along with the equalization quality parameter, so as to be used as a parameter for the analog front end to adjust the signal.
It should be noted that the first trimming factor and the second trimming factor are usually inverse to each other. That is, the above-mentioned multiple adjustment process can be implemented by multiplying the first peak voltage by K, or vice versa, or by dividing the second peak voltage by K, but from the viewpoint of circuit implementation, the voltage division is easier to implement, such as a simple resistor divider. Therefore, it is generally recommended to divide the second peak voltage by K.
Further, the steeper the roll-off and rising slopes at the corners are, the more precise the high pass filter and the low pass filter are ideally, but in practical design, slight adjustments to the trimming factor are required in view of implementation costs. For example, since the second peak voltage H + H can be represented by the swing of the lowest frequency component of the analog signal to be measured plus the swing of the highest frequency component of the analog signal to be measured, it represents two voltage meanings, and the first peak voltage H only represents the swing of the highest frequency component of the analog signal to be measured, i.e. only represents one voltage meaning, therefore the trimming multiple K is usually set to 2, and the adjusted trimming multiple is set to 1.7, which can basically meet the design goal. Taking a first-order high-pass filter as an example, fig. 6 is a schematic diagram illustrating a comparison between a high-order high-pass filter and a low-order high-pass filter in a first embodiment of the invention; referring to fig. 6, considering the encoding of the high speed signal, the lowest fundamental component of the analog signal to be tested is usually at least one fourth lower than the highest fundamental component of the analog signal to be tested, depending on the specific interface protocol, and therefore is substantially within the shaded area of the diagram shown on the right side of fig. 6. Res (H) in the shaded area in the diagram shown on the right side of fig. 6 is not higher than 0.25H at most, so if the trimming multiple K is set to 1.7, the swing of the highest frequency component of the analog signal to be measured is finally 0.7H + res (H). In this case, H can be controlled to be between 0.7 and 1.05H. The performance can basically meet the requirement, and the method is a scheme with high cost performance.
Step S105, inputting the obtained equalization quality parameter into the analog front end, so that the analog front end can adjust the input analog signal based on the equalization quality parameter.
Further, fig. 7 is a schematic diagram illustrating another implementation process of the analog signal equalization quality detection method according to the embodiment of the present invention; referring to fig. 7, the embodiment of the present invention may further include step S106, where the details of step S106 are as follows.
Step S106, transmitting the first peak voltage to the analog front end as an adjustment parameter for adjusting the swing of the signal at the analog front end.
Specifically, the first peak voltage is used as an adjustment parameter for adjusting the swing of the signal at the analog front end, and is fed back to the analog front end together with the equalization quality parameter, so that a complete analog front end function can be formed.
It should be noted that the application scenario of the method of the present invention is not limited to only simulating adaptive AFE, but the analog front end in the step can be replaced by other modules, including but not limited to the following scenarios: for example, the method of the present invention may be used in conjunction with a related logic processing circuit as a pure signal quality detection module to detect the inter-symbol interference (ISI) level of a channel; the analog front end of the logic mode can also be modified into a real-time control mode by matching with an ADC (analog-to-digital converter or analog-to-digital converter).
The method for detecting the equalization quality of the analog signal provided by the embodiment of the invention artificially attenuates the signal output by the analog front end, then detects the respective emergent highest peak voltage of the high-frequency and low-frequency paths of the attenuated signal, trims the detected highest peak voltage, and compares the trimmed highest peak voltage to generate the analog control signal, wherein the control signal is a parameter of the quantized signal equalization quality and can be directly used for controlling the equalization parameter of the analog front end. The method for detecting the analog signal equalization quality can solve the problem of signal quality quantization of analog self-adaption and has the advantages of high accuracy, wider application range and the like.
In the description of the present invention, it should be noted that the terms "first", "second" and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. A method for detecting the equalization quality of an analog signal comprises the following steps:
acquiring an analog signal to be detected output by an analog front end;
performing high-frequency attenuation on the analog signal to be detected to obtain a low-pass signal, and performing low-frequency attenuation on the analog signal to be detected to obtain a high-pass signal;
inputting the low-pass signal into a peak value detection circuit to obtain a first peak value voltage, and inputting the high-pass signal into the peak value detection circuit to obtain a second peak value voltage;
obtaining an equalization quality parameter based on the first peak voltage and the second peak voltage;
and inputting the equalization quality parameter into the analog front end.
2. The method of claim 1, wherein attenuating the analog signal under test at a high frequency to obtain a low-pass signal comprises:
carrying out high-frequency attenuation on the analog signal to be detected through a low-pass filter to obtain a low-pass signal;
and the corner frequency of the low-pass filter is higher than the lowest fundamental wave component of the analog signal to be measured.
3. The method of claim 2, wherein attenuating the analog signal to be measured at a low frequency to obtain a high-pass signal comprises:
carrying out low-frequency attenuation on the analog signal to be detected through a high-pass filter to obtain a high-pass signal;
the corner frequency of the high-pass filter is lower than the highest fundamental component of the analog signal to be detected and higher than the second highest fundamental component of the analog signal to be detected.
4. The method of claim 3, wherein the gain in the passband of the high pass filter and the low pass filter is 1.
5. The method of claim 1, wherein obtaining an equalization quality parameter based on the first peak voltage and the second peak voltage comprises:
multiplying the first peak voltage by a first trimming multiple to obtain a first peak trimming voltage;
comparing the first peak trimming voltage with the second peak voltage to obtain a first difference parameter;
and taking the first difference parameter and the first trimming multiple as equalization quality parameters.
6. The method of claim 1, wherein obtaining an equalization quality parameter based on the first peak voltage and the second peak voltage comprises:
multiplying the second peak voltage by a second trimming multiple to obtain a second peak trimming voltage;
comparing the second peak trimming voltage with the first peak voltage to obtain a second difference parameter;
and taking the second difference parameter and the second trimming multiple as equalization quality parameters.
7. The method of claim 1, further comprising:
and transmitting the first peak voltage to an analog front end to serve as an adjusting parameter of the analog front end for adjusting the signal swing.
8. The method of claim 1, wherein the peak detection circuit comprises an operational amplifier, a limit switch, a storage capacitor, and a bandwidth adjustment element; the input end of the limit switch is connected with the output end of the operational amplifier, the output end of the limit switch is connected with one end of the storage capacitor, the other end of the storage capacitor is grounded, and the bandwidth adjusting element is connected in parallel with the two ends of the storage capacitor.
9. The method according to claim 8, wherein the limit switch is an N-type MOS transistor, a gate of the N-type MOS transistor is connected to the output terminal of the operational amplifier, a source of the N-type MOS transistor is connected to the storage capacitor, and a drain of the N-type MOS transistor is connected to a power supply.
10. The method of claim 8, wherein the bandwidth adjustment component is a current source module.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5163003A (en) * 1989-03-31 1992-11-10 Fujitsu Limited Apparatus and method for reading from and writing to a magnetic recording medium
US5867058A (en) * 1997-08-01 1999-02-02 Zenith Electronics Corporation Method and system for enhancing a digitally sampled voltage input waveform
CN1557077A (en) * 2001-05-17 2004-12-22 印芬龙科技股份有限公司 Method for reconstructing data pulsed with a symbol rate from an analog distorted signal
CN1749762A (en) * 2004-09-13 2006-03-22 罗德施瓦兹两合股份有限公司 Apparatus and method for pulse measurement
CN108333420A (en) * 2018-04-02 2018-07-27 三峡大学 A kind of Low Frequency Sine Signals peak detector and peak-value detection method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5247629B2 (en) * 2009-08-26 2013-07-24 株式会社日立国際電気 Amplifier power supply voltage controller

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5163003A (en) * 1989-03-31 1992-11-10 Fujitsu Limited Apparatus and method for reading from and writing to a magnetic recording medium
US5867058A (en) * 1997-08-01 1999-02-02 Zenith Electronics Corporation Method and system for enhancing a digitally sampled voltage input waveform
CN1557077A (en) * 2001-05-17 2004-12-22 印芬龙科技股份有限公司 Method for reconstructing data pulsed with a symbol rate from an analog distorted signal
CN1749762A (en) * 2004-09-13 2006-03-22 罗德施瓦兹两合股份有限公司 Apparatus and method for pulse measurement
CN108333420A (en) * 2018-04-02 2018-07-27 三峡大学 A kind of Low Frequency Sine Signals peak detector and peak-value detection method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
一种6.25Gb/s模拟自适应均衡器的设计;赵宗良等;《微电子学》;20141220(第06期);全文 *
基于传感器的频率补偿电路研究;刘晓培等;《山西科技》;20131120(第06期);全文 *

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