Adaptive equalization parameter adjustment, the integrated approach and circuit of transmission performance test
Technical field
The present invention relates to high speed data transfer or communication technical field, more particularly to a kind of adaptive equalization parameter adjustment,
The integrated approach and circuit of transmission performance test.
Background technology
In internet communication, the data transfer of computer motherboard chip chamber, fiber optic communication and High speed rear panel data transfer etc.
Occasion, serial communication technology is obtained for and is widely applied.At present, the serial data transmission speed of single passage reached or
It has been even more than 10G-20Gbps.With the raising of transmission rate, the problem as caused by signal integrity is increasingly severe, such as
Transmission medium loss, reflection, impedance mismatching, crosstalk etc. so that the data that receiving terminal is received are sentenced carrying out high level/low level
Before certainly, its track is superimposed formed eye pattern partly or completely complete closure.
In order to improve communication quality, reduce the bit error rate and intersymbol interference, receiving terminal generally using channel equalization technique come
Offset the influence of unfavorable factor on channel, such as channel loss, frequency response unevenness.Due to the transmission characteristic of channel be with
The change of the factors such as time, environment, temperature and slight change, receiving terminal generally requires to be come from using the balancing technique of self adaptation
The change of motion tracking channel.Adaptive equalization technique is substantially one can make adjustment or mend to unknown time varying channel
Repay, through the wave filter that special algorithm is adjusted to equalizing coefficient automatically.
At present in the high speed serial transmission application of tens of Gigabits per second and the above, most of adaptive equalization technique
Employ symbol least-mean-square error algorithm (Sign-sign Least Mean Square) to form backfeed loop, adjustment is equal
The coefficient of weighing apparatus.Symbol least-mean-square error algorithm has low computation complexity (not needing any multiplication), faster because of it
The features such as convergence rate and relatively low power consumption, it has been widely used in the adaptive equalization technique for high-speed transfer.
Meanwhile, typically in the serial line interface application of high speed, designer for convenience carry out functional verification and transporting
Can test, being integrated with the chip of receiving terminal (Receiver) can realize the circuit of transmission performance test, scan transfer
Signal and superposition form eye pattern, in order to be directly monitored by channel data transmission performance, i.e., realize that eye pattern browses (eye- on piece
opening browser)。
But, when needs realize that adaptive equalization parameter adjustment and eye pattern browse the work(of test simultaneously on receiving terminal chip
During energy, generally require to increase multiple independent modules, the load down on high-speed data path can be caused, while needing to take very
Big chip area, also has very big power attenuation.
In the communication of modern Large Volume Data, often integrated multiple channels in monolithic chip, to power attenuation and chip face
Long-pending requirement is also very strict.Therefore, the least mean-square error balanced realization of each passage independence and independent eye pattern browser
Realize, cannot receive in overall power dissipation and chip occupying area.
The content of the invention
Adaptive equalization parameter adjustment, the integrated approach and circuit of transmission performance test that the present invention is provided, can be in reality
While existing two kinds of functions of adaptive equalization parameter adjustment and transmission performance test, overall power is reduced, reduce chip and take face
Product.
On the one hand, it is described the invention provides a kind of adaptive equalization parameter adjustment, the integrated approach of transmission performance test
Integrated approach includes:
Under the first clock frequency, sampling comparator gathers the analog voltage signal of serial data;
With analog reference voltage signal be compared the analog voltage signal by the sampling comparator, obtains transporting
Can parameter signal;
Digital supervision module detects the transmission performance parameter signal;
When the transmission performance parameter signal exceeds first threshold, digital supervision module controls mould to digital time-sharing multiplex
Block sends adaptive equalization parameter adjustment interrupt requests;
The digital time-sharing multiplex control module according to the adaptive equalization parameter adjustment interrupt requests, described first
Under clock frequency, the first phase signal and first voltage signal of current transmission performance test are detected;
When the first phase signal and first voltage signal meet pre-conditioned respectively, the digital time-sharing multiplex control
Molding block is adjusted to adaptive equalization parameter;
The digital time-sharing multiplex control module according to adjustment after the adaptive equalization parameter, to the coefficient of balanced device
It is adjusted.
Preferably, before the analog voltage signal of sampling comparator collection serial data, methods described also includes:
Digital time-sharing multiplex control module produces initial phase control word and initial voltage control word;
Phase interpolator enters row interpolation phase shift according to the initial phase control word in the phase cycling interval of setting,
Generation sampled phase signal;
Digital analog converter is converted into the analog references according to the initial voltage control word, the voltage signal that will be received
Voltage signal.
Preferably, the transmission performance parameter signal includes transmission error rates, transmitted symbol error signal amplitude.
Preferably, it is described it is pre-conditioned be specially:The phase value of the first phase signal is equal to default recovered clock
The phase of output, and the magnitude of voltage of the first voltage signal is equal to default medium voltage.
Preferably, the adaptive equalization parameter adjustment symbolization least-mean-square error algorithm is realized.
Preferably, after the coefficient of the adjustment balanced device, methods described also includes:
When the adaptive equalization parameter after the adjustment is in the range of default parameter threshold, the digital time-sharing multiplex
Control module cancels adaptive equalization parameter adjustment interrupt requests, and proceeds transmission performance test.
Preferably, the transmission performance test is specially:
Setting initial phase signal and initial voltage signal;
Increase the magnitude of voltage of voltage signal according to initial voltage signal and default first stepped voltage, carry out initial phase
Transmission signal scanning under signal;Wherein, the magnitude of voltage of the voltage signal is no more than default voltage threshold;
Increase the phase value of phase signal according to default first stepping phase, once transmitted under each phase value
Signal scanning is tested;Wherein, the phase value of the phase signal is no more than default phase threshold.
Preferably, methods described also includes:
When the first phase signal and/or the first voltage signal do not meet described pre-conditioned, the numeral
Time-sharing multiplex control module keeps the adaptive equalization parameter adjustment interrupt requests;
The digital time-sharing multiplex control module proceeds to pass according to the adaptive equalization parameter adjustment interrupt requests
Defeated performance test.
On the other hand, the invention provides a kind of adaptive equalization parameter adjustment, the circuit of transmission performance test, the electricity
Road includes:
Sampling comparator, under the first clock frequency, gathering the analog voltage signal of serial data;
The sampling comparator is additionally operable to, and the analog voltage signal is compared with analog reference voltage signal, is obtained
To transmission performance parameter signal;
Digital supervision module, for detecting the transmission performance parameter signal;When the transmission performance parameter signal exceeds
During first threshold, digital supervision module sends adaptive equalization parameter adjustment interrupt requests to digital time-sharing multiplex control module;
The digital time-sharing multiplex control module, for according to the adaptive equalization parameter adjustment interrupt requests, in institute
State under the first clock frequency, detect the first phase signal and first voltage signal of current transmission performance test;When described first
When phase signal and first voltage signal meet pre-conditioned respectively, the digital time-sharing multiplex control module is to adaptive equalization
Parameter is adjusted;
The digital time-sharing multiplex control module is additionally operable to, according to adjustment after the adaptive equalization parameter, to equilibrium
The coefficient of device is adjusted.
Preferably, the circuit also includes:Phase difference value device;
The digital time-sharing multiplex control module is additionally operable to, and produces initial phase control word and initial voltage control word;
The phase interpolator is used for, and according to the initial phase control word, is carried out in the phase cycling interval of setting
Interpolation phase shift, generates sampled phase signal;
The digital analog converter is additionally operable to, and according to the initial voltage control word, the voltage signal that will be received is converted into
The analog reference voltage signal.
Preferably, the transmission performance parameter signal includes transmission error rates, transmitted symbol error signal amplitude.
Preferably, when the adaptive equalization parameter after the adjustment is in the range of default parameter threshold, the numeral
Time-sharing multiplex control module is additionally operable to, and cancels adaptive equalization parameter adjustment interrupt requests, and proceed transmission performance test.
Preferably, the digital time-sharing multiplex control module specifically for:
Setting initial phase signal and initial voltage signal;
Increase the magnitude of voltage of voltage signal according to initial voltage signal and default first stepped voltage, carry out initial phase
Transmission signal scanning under signal;Wherein, the magnitude of voltage of the voltage signal is no more than default voltage threshold;
Increase the phase value of phase signal according to default first stepping phase, once transmitted under each phase value
Signal scanning is tested;Wherein, the phase value of the phase signal is no more than default phase threshold.
Preferably, when the first phase signal and/or the first voltage signal do not meet described pre-conditioned, institute
State digital time-sharing multiplex control module to be additionally operable to keep the adaptive equalization parameter adjustment interrupt requests, and proceed transmission
Performance test.
Therefore, by the adaptive equalization parameter adjustment of present invention offer, the method for transmission performance test, in receiving terminal core
Adaptive equalization parameter adjustment is integrated with transmission performance test circuit on piece, according to the biography that digital supervision module is detected
Defeated performance test signal parameter, or adaptive equalization parameter adjustment information is carried out according to the presetting time, produce self adaptation
Balance parameters adjust interrupt requests, and using the method for digital time-sharing multiplex, by digital multiplex control module, Time-sharing control is completed
The adjustment of adaptive equalization parameter and eye pattern are scanned;Therefore, the power consumption of entirety has been saved, the face of chip has also been greatly reduced
Product.
Brief description of the drawings
Fig. 1 is a kind of adaptive equalization parameter adjustment, the integrated side of transmission performance test that the embodiment of the present invention one is provided
Method flow chart;
Fig. 2 is adaptive equalization parameter adjustment, the circuit diagram of transmission performance test that the embodiment of the present invention two is provided.
Specific embodiment
It is single that the embodiment of the present invention will realize that adaptive equalization parameter adjustment, the circuit of transmission performance test function are integrated in
On the chip of serial communication receiving terminal, by the method for digital time-sharing multiplex, part of module in timesharing recycling circuit is carried out
The adjustment of transmission performance test and adaptive equalization parameter.
Below by drawings and Examples, technical scheme is described in further detail.
Embodiment one
Fig. 1 is a kind of adaptive equalization parameter adjustment, the integrated side of transmission performance test that the embodiment of the present invention one is provided
Method flow chart.
According to Fig. 1, the adaptive equalization parameter adjustment, the integrated approach of transmission performance test include following step
Suddenly:
Step 101, digital time-sharing multiplex control module produces initial phase control word.
Specifically, initial phase control word is digital time-sharing multiplex control module according to default precision or phase-resolved
Rate, pre-estimates the phase control words of judgement;The default precision or phase resolution are to be adopted in phase cycling interval
The number of the phase point of collection, the more precision of phase point of collection are higher, and resolution ratio is also higher.
Step 102, phase interpolator generates the phase clock signal of sampling according to initial phase signal.
Specifically, the initial phase control word that phase interpolator is generated according to step 101, it is interval in the phase cycling of setting
Enter row interpolation phase shift, generate the new phase clock signal for sampling.
Step 103, digital time-sharing multiplex control module produces initial voltage control word.
Specifically, initial voltage control word is that digital time-sharing multiplex control module is differentiated according to default precision or voltage
Rate, pre-estimates the voltage signal of judgement;The default precision or voltage resolution are to be acquired in voltage signal range
Magnitude of voltage number, the more precision of number of the magnitude of voltage of collection are higher, and voltage resolution is also higher.
Step 104, under the first clock frequency, sampling comparator gathers the analog voltage signal of serial data.
Specifically, the first clock frequency is the sample clock frequency that phase interpolator is recovered from the data for receiving.
After digital time-sharing multiplex control module produces original levels control word and initial phase control word;Phase interpolator is according to initial
Phase control words, generate initial samples phase;Original levels control word is converted to analog references level signal by digital analog converter;
Serial data of sampling comparator (CMP+, CMP-, CMPz) to transmission channel input under present sample clock frequency simulates electricity
Pressure signal is acquired.
With analog reference voltage signal be compared the analog voltage signal by step 105, the sampling comparator, obtains
To transmission performance parameter signal.
Specifically, after step 104, sampling comparator enters the analog voltage signal of collection with analog reference voltage signal
Row compares, outputs level signals, then exports corresponding high level or low level signal by XOR gate (XOR), to the height
Level signal or low level signal carry out obtaining transmission performance parameter signal after corresponding logical process.
The transmission performance parameter signal can be transmission error rates, transmitted symbol error signal amplitude or other judgement strings
The transmission performance parameter signal of row channel.
Step 106, digital supervision module detects the transmission performance parameter signal;
Step 107, when the transmission performance parameter signal exceeds first threshold, digital supervision module is multiple to digital timesharing
Adaptive equalization parameter adjustment interrupt requests are sent with control module.
Specifically, first threshold is one or more critical values for judging the setting of transmission performance parameter signal.Digital supervision
Module monitors transmission performance parameter signal, when transmission performance parameter signal beyond setting critical value when, digital supervision module to
Digital time-sharing multiplex control module sends adaptive equalization parameter adjustment interrupt requests, then, when default condition is met, number
Word time-sharing multiplex control module carries out adaptive equalization parameter adjustment.
In specific example, digital time-sharing multiplex control module can also be set as the set time, by setting
Adaptive equalization parameter adjustment is carried out after time automatically.
Step 108, the digital time-sharing multiplex control module according to the adaptive equalization parameter adjustment interrupt requests,
Under first clock frequency, detection carries out the first phase signal and first voltage signal of current transmission performance test.
Specifically, first phase signal and first voltage signal are that under current clock frequency, the transmission performance for carrying out is surveyed
Phase and voltage when examination, i.e. transmission signal are scanned.Sent when digital time-sharing multiplex control module receives digital supervision module
Adaptive equalization parameter adjustment interrupt requests when, detect current transmission signal phase and voltage, the phase that will be detected and
Voltage is contrasted with the phase in predetermined condition with voltage.
Step 109, when the first phase signal and first voltage signal meet pre-conditioned respectively, the numeral point
When multiplexing control module adaptive equalization parameter is adjusted.
Specifically, it is pre-conditioned to be specially:First phase signal is equal to the default clock recovered from data
Phase signal, and the first voltage signal be equal to default medium voltage, i.e. supply voltage half.When first phase letter
Number and first voltage signal simultaneously when meeting pre-conditioned, digital time-sharing multiplex control module responds adaptive equalization parameter adjustment
Interrupt requests, suspend transmission performance parameter scanning, start to perform adaptive equalization parameter tuning algorithm.
Preferably, adaptive equalization parameter adjustment symbolization least-mean-square error algorithm.
Step 110, the digital time-sharing multiplex control module according to adjustment after the adaptive equalization parameter, to equilibrium
The coefficient of device is adjusted.
Specifically, in channel equalization technique, adaptive equalization parameter is preset;According to presetting parameter, use
Symbol least-mean-square error algorithm adjusts presetting parameter.
The adaptive equalization parameter of adjustment includes gain, the direct current biasing of input signal, adaptive equalization of input signal
The parameters such as the coefficient of device.
Step 111, after adaptive equalization parameter is adjusted, digital time-sharing multiplex control module cancels adaptive equalization ginseng
Number adjustment interrupt requests, proceed transmission performance test.
Specifically, the transmission performance test process that proceeds can be specially:
Setting initial phase signal and initial voltage signal, the initial phase signal and initial voltage signal are transmission
The initial value of the transmission signal collection set before performance test.
Increase the magnitude of voltage of voltage signal according to initial voltage signal and default first voltage, carry out initial phase signal
Under transmission signal scanning;Wherein, the magnitude of voltage of the voltage signal is no more than default voltage threshold.
In other words, as under initial voltage signal and initial phase signal, the scanning of signal is transmitted, it is then right
The result of scanning is stored;Afterwards, in the case where initial phase is not changed, magnitude of voltage is stepped up, for each step
The magnitude of voltage entered after increasing, is transmitted the scanning of performance data, and scanning result is stored, until the voltage after stepping
Value exceeds predetermined voltage range.We do not change phase by this, and the transmission performance data scanning for only changing voltage is referred to as eye pattern
Vertical voltage scanning.
According to default second phase signal, stepping increases the phase value of phase signal, is carried out under each phase value
Vertical voltage scanning for transmission signal;Wherein, the phase value of the phase signal is no more than default phase threshold.According to
Foregoing description, the phase value of phase signal is increased according to the first stepping phase set in advance, to what is obtained after each stepping
Phase signal, all carries out a vertical voltage scanning, untill the phase value after stepping exceeds default phase threshold.
Finally all data for scanning are overlapped, eye pattern is formed.First stepped voltage and the first stepping phase
Set, voltage is identical with the stepping number of times of phase in enabling to the scanning process.Under normal circumstances, in voltage and phase
In threshold range, the stepping number of times for setting voltage is equal to the stepping number of times of phase.Adaptive equalization is joined on receiving terminal chip
Number adjustment is integrated with transmission performance test circuit, according to the transmission data performance signal ginseng that digital supervision module is detected
Number, or adaptive equalization parameter adjustment interrupting information is produced according to the presetting time.The embodiment of the present invention is using numeral point
The method of Shi Fuyong, by digital time-sharing multiplex control module, completes adjustment and the transmission performance eye pattern of adaptive equalization parameter
Scanning;Therefore, the power consumption of entirety has been saved, the area of chip has also been greatly reduced.
Embodiment two
Fig. 2 is the adjustment of integrated adaptive balance parameters, the circuit of transmission performance test that the embodiment of the present invention two is provided.Such as
Shown in Fig. 2, the integrated adaptive balance parameters adjustment, the circuit of transmission performance test include:Digital time-sharing multiplex controls mould
Block 21, digital analog converter 22, phase interpolator (Phase Interpolator) 23, sampling comparator 24 and digital monitoring module
(not shown).
The sampling comparator 24, under the first clock frequency, gathering the analog voltage signal of serial data.
The sampling comparator 24 is additionally operable to, and the analog voltage signal is compared with analog reference voltage signal,
Obtain transmission performance parameter signal.
Digital supervision module (not shown), for detecting the transmission performance parameter signal;When the transmission performance
When parameter signal exceeds first threshold, digital supervision module sends adaptive equalization parameter to digital time-sharing multiplex control module 21
Adjustment interrupt requests.
The digital time-sharing multiplex control module 21, for according to the adaptive equalization parameter adjustment interrupt requests,
Under first clock frequency, detection carries out the first phase signal and first voltage signal of current transmission performance test;Work as institute
State first phase signal and when first voltage signal meets pre-conditioned respectively, the digital time-sharing multiplex control module is to adaptive
Balance parameters are answered to be adjusted.
The digital time-sharing multiplex control module 21 is additionally operable to, according to adjustment after the adaptive equalization parameter, to equal
The coefficient of weighing apparatus is adjusted.
The digital time-sharing multiplex control module 21 is additionally operable to, and produces initial phase control word and initial voltage control word.
The circuit also includes:Phase interpolator 23.
The phase interpolator 23 is used for, and according to the initial phase control word, is carried out in the phase cycling interval of setting
Interpolation phase shift, generates sampled phase signal.
The digital analog converter 22 is used for, and according to the initial voltage control word, the voltage signal that will be received is converted into
The analog reference voltage signal.
In a specific embodiment, the transmission performance parameter signal can include that transmission error rates, transmitted symbol are missed
Difference signal amplitude.
Alternatively, when the transmission performance parameter signal after the adjustment is in the range of default parameter threshold, the number
Word time-sharing multiplex control module is additionally operable to, and cancels adaptive equalization parameter adjustment interrupt requests, and proceed transmission performance survey
Examination.
The digital time-sharing multiplex control module 21 can also be specifically for:
Setting initial phase signal and initial voltage signal.
According to initial voltage signal and default first voltage signal, stepping increases the magnitude of voltage of voltage signal, carries out just
Transmission signal amplitude scan under beginning phase signal;Wherein, the magnitude of voltage of the voltage signal is no more than default voltage threshold.
According to default first phase signal, stepping increases the phase value of phase signal, one is carried out under each phase value
Secondary transmission signal amplitude scan;Wherein, the phase value of the phase signal is no more than default phase threshold.
In one embodiment, when the first phase signal and/or the first voltage signal do not meet described default
During condition, the digital time-sharing multiplex control module 21 is additionally operable to keep the adaptive equalization parameter adjustment interrupt requests, and
Then it is transmitted performance test.
In addition the circuit also includes predrive module (Predriver), drive module (Driver), data sampling
Module (Data sampler) and 64 times of Clock dividers (DIV64).
Predrive module, for the gain signal (gain) and thermal compensation signal that are exported according to digital time-sharing multiplex control module
(offset) pre-adjustment is carried out to the serial voltage signal being input into.
Data sampling module, data sampling is carried out for the serial data signal after drive module is processed.
64 times of Clock dividers, for carrying out 64 times of frequency dividings to present sample clock, generate the work of transmission performance test
Make clock.
Adaptive equalization parameter adjustment of the present invention and transmission performance test process are specifically retouched below according to Fig. 2
State.
The adaptive equalization parameter adjustment, transmission performance test circuit include digital time-sharing multiplex control module 21, number
Weighted-voltage D/A converter 22, phase interpolator 23, three sampling comparators 24, two XOR gate XOR, digital supervision module (is not shown in figure
Go out).Wherein, digital analog converter 22 includes digital analog converter DAC+ and digital analog converter DAC-;Sampling comparator 24 includes sampling
Comparator CMP+, sampling comparator CMP- and sampling comparator CMPZ.
The output end of digital time-sharing multiplex control module 21 connects the input of digital analog converter 22, sampling comparator CMP
+, the negative input end of sampling comparator CMP- be connected with the output end of digital analog converter 22, and comparator CMP+, comparator of sampling
The output end of CMP- is connected with an XOR gate, comparator CMP+, sampling comparator CMP- comparative result by XOR gate it
Afterwards, the high/low level for exporting is input to another XOR gate, the negative input end of sampling comparator CMPZ is connected with ground (GND),
Its output end connects another XOR gate, the receiving terminal of the digital time-sharing multiplex control module 21 of output end connection of the XOR gate.
In the embodiment of the present invention, transmission performance test sample clock frequency can be specially carries out 64 to sampling clock XCLK
Clock frequency after dividing again;In adaptive equalization parameter tuning process, sample clock frequency can be specially to from data
The clock CDRCLK for recovering carries out the clock frequency after 4096 times of frequency dividings.The present embodiment is used in above sample clock frequency
Under carry out serial data sampling, be intended merely to it is clearer description invention technical scheme, be not intended to limit technical side of the invention
Case.
In high-speed serial data communication, the digital most of the time of time-sharing multiplex control module 21 is transmitted performance survey
Examination, i.e., be scanned to transmission signal, is superimposed, and eventually forms eye pattern, only when digital supervision module detects transmission performance ginseng
Number is deteriorated or when adaptive equalization parameter adjustment is carried out after preheating setting time, and digital time-sharing multiplex control module 21 is just performed
Adaptive equalization parameter adjustment.Its detailed process is:
Transmission performance test is first carried out, its process is using digital time-sharing multiplex control module 21, two digital analog converter DAC
+ and DAC-, a phase interpolator 23, two comparator CMP+ and CMP-, an XOR gate XOR.
Digital time-sharing multiplex control module 21 produces phase control words and voltage control word;Phase interpolator 23 receives numeral
The phase control words of the output of time-sharing multiplex control module 21, and according to phase control words, to the sampling clock CDRCLK for recovering,
Enter row interpolation phase shift in a phase cycling interval of setting, generate new sampling clock XCLK.Sampling clock XCLK is carried out
64 times of frequency dividings use other relatively low clock frequencies, produce the sampling clock XCLKDIV under current phase;Digital-to-analogue turns
Parallel operation DAC+ and DAC- receive the voltage control word of the digital output of time-sharing multiplex control module 21 respectively;Digital analog converter 22 will connect
The voltage max and voltage minimum for receiving carry out data processing, obtain voltage magnitude;According to the voltage control word for receiving,
The voltage magnitude is changed, is exported and is obtained analog reference voltage signal Y1-level and Y2-level;Sampling comparator
The negative input termination analog references electricity of negative input the termination analog reference voltage signal Y1-level, sampling comparator CMP- of CMP+
Pressure signal Y2-level.
In specific example, it is assumed that the voltage and phase of transmission performance test are respectively divided into 32 deciles, input reference
(REEP) voltage minimum -200mV that the voltage max+200mV and input of input are input into reference to (REFN), digital timesharing
The voltage control word of multiplexing control module output is 6, then the analog reference voltage signal Y1- of digital analog converter DAC+ outputs
Level is+75mV and the analog reference voltage signal Y2-level of digital analog converter DAC- outputs is -75mV.
Then, under sampling clock XCLKDIV, sampling comparator 24 to the input serial data VinP after data processing,
VinN is simulated voltage signal sampling, and the positive input terminal of sampling comparator CMP+ receives the analog voltage signal of collection VinP,
The positive input terminal of sampling comparator CMP- receives the analog voltage signal of collection VinN;When sampling comparator CMP+, CMP- are to mould
Intend voltage signal and analog reference voltage Y1-level, Y2-level is compared after exporting, then completed to sentence by an XOR gate
Certainly export court verdict signal eyeQ.
Digital supervision module carries out data processing according to court verdict signal eyeQ, obtains transmission performance parameter signal, and
The monitoring of performance parameter signal is transmitted, wherein, transmission performance parameter signal can include that transmission error rates, transmitted symbol are missed
Difference signal amplitude;When transmission error rates and/or transmitted symbol error signal amplitude exceed default threshold value, digital supervision module
Adaptive equalization parameter adjustment is sent to digital time-sharing multiplex control module 21 to ask;Digital time-sharing multiplex control module 21 is received
To after adaptive equalization parameter adjustment request, under detection present sample clock frequency, the phase signal and electricity of eye pattern are being scanned
Pressure signal, when the phase signal of detection is equal to the phase of the sampling clock output for recovering, and the voltage signal for detecting is equal to and sets
When determining the medium voltage of voltage, digital time-sharing multiplex control module 21 carries out adaptive equalization parameter adjustment.
Or be the adjustment adaptive equalization parameter setting time, when the digital input serial data of time-sharing multiplex control module 21
Time often through setting time period after, digital time-sharing multiplex control module 21 carries out a tune for adaptive equalization parameter
It is whole.
Adaptive equalization parameter adjustment can use two digital analog converter DAC+ and DAC-, three comparator CMP+,
CMP- and CMPZ, two XOR gate XOR are realized.
Adaptive equalization parameter under digital time-sharing multiplex control module 21 pairs current phase signal, voltage signal is adjusted
Whole, digital time-sharing multiplex control module exports presetting voltage control word, and digital analog converter 22 is defeated according to digital time-sharing multiplex
The voltage control word for going out, the voltage max and voltage minimum that digital analog converter 22 will be received carries out data processing, obtains
Voltage magnitude, according to the voltage control word that the digital time-sharing multiplex control module 21 for receiving is exported, is turned to voltage magnitude
Change, export and obtain analog reference voltage signal+dlevel and-dlevel;The negative input end of sampling comparator CMP+ receives simulation
Reference voltage signal+dlevel, the negative input end of sampling comparator CMP- receives analog reference voltage signal-dlevel;Sampling
Comparator 24 carries out the mould to serial data on the sampling clock after output sampling clock CDRCLK carries out 4096 frequency dividings is recovered
Intend voltage signal sampling, voltage signal sampling is simulated to the input serial data VinP after data processing, comparator of sampling
The positive input terminal of CMP+ receives the analog voltage signal collected after data processing VinP signals, sampling comparator CMP-, CMPZ
Positive input terminal receive the negative input end of the analog voltage signal sampling comparator CMPZ collected after data processing VinN signals
It is connected to ground;Sampling comparator CMP+, CMP- are compared to sampling analogue voltage signal and analog reference voltage signal, sample
With simulation earth signal be compared the analog voltage signal of collection by comparator CMPZ, the output end output of sampling comparator CMP+
Error signal Error+, the output end output error signal Error- of sampling comparator CMP-, the output of sampling comparator CMPZ
Hold output error signal ErrorZ;Error signal Error+, Error- and ErrorZ are final defeated by being obtained after XOR gate
Go out error signal Error, error signal Error can include the analog voltage signal of collection and judgement set in advance reference
Magnitude Difference information between voltage signal, i.e. error signal amplitude;Digital time-sharing multiplex control module 21 is according to error span
Carry out adaptive equalization parameter adjustment, symbolization least-mean-square error algorithm.When error signal amplitude does not meet the threshold of setting
During value, digital time-sharing multiplex control module 21 adjusts output and increaseds or decreases voltage control word, digital-to-analogue according to error signal Error
Next control word of the output of converter 22 is adjusted according to current voltage signal, circulates successively;Work as error signal amplitude
During more than the threshold value for setting, the adaptive equalization parameter after generation adjustment;After digital time-sharing multiplex control module 21 is according to adjustment
Adaptive equalization parameter adjustment balanced device coefficient;Digital time-sharing multiplex control module 21 cancels adaptive equalization parameter afterwards
Adjustment interrupt requests, proceed transmission performance parameter scanning.
When digital Time-sharing control module is detected under present sample clock frequency, phase signal and the voltage letter of eye pattern are scanned
The condition for number not meeting and setting:The phase signal of detection is not equal to the phase of sampling clock output, or the voltage signal for detecting
Equal to setting voltage medium voltage when, digital time-sharing multiplex control module 21 keeps adaptive equalization parameter adjustment request.
In actual eye pattern scanning process, digital time-sharing multiplex control module 21 controls a phase, increaseds or decreases the level control of output
Word processed, digital analog converter 22 exports analog reference voltage according to the Automatic level control word after increaseing or decreasing, and gathers present sample phase
Serial data signal under bit clock, completes an eye pattern scanning for vertical direction;Then digital time-sharing multiplex control module 21
Increase phase control words, phase interpolator 23 generates new sampling phase clock, under the sampling phase clock, digital timesharing is answered
Change Automatic level control word with control module 21, complete the eye pattern scanning of vertical direction;Finally the court verdict of all outputs is believed
Number eyeQ is overlapped and obtains eye pattern.Wherein, analog reference voltage signal is no more than default voltage signal threshold value;Phase signal
No more than default phase signal threshold value.
Therefore, the adaptive equalization parameter adjustment for being provided by the present invention and the integrated and circuit of transmission performance test,
Adaptive equalization parameter adjustment is integrated with transmission performance test circuit on receiving terminal chip, according to digital supervision module
The transmission performance data parameters for detecting, or produce adaptive equalization parameter adjustment to interrupt according to the presetting time, use
The method of digital time-sharing multiplex, by digital time-sharing multiplex control module time-sharing multiplex part of module, completes adaptive equalization ginseng
Number adjustment and eye pattern scanning;Therefore, the power consumption of entirety has been saved, the area of chip has also been greatly reduced.
Professional should further appreciate that, each example described with reference to the embodiments described herein
Unit and algorithm steps, can be realized with electronic hardware, computer software or the combination of the two, hard in order to clearly demonstrate
The interchangeability of part and software, generally describes the composition and step of each example according to function in the above description.
These functions are performed with hardware or software mode actually, depending on the application-specific and design constraint of technical scheme.
Professional and technical personnel can realize described function to each specific application using distinct methods, but this realization
It is not considered that beyond the scope of this invention.
The method that is described with reference to the embodiments described herein can use hardware, computing device the step of algorithm
Software module, or the two combination is implemented.Software module can be placed in random access memory (RAM), internal memory, read-only storage
(ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field
In any other form of storage medium well known to interior.
Above-described specific embodiment, has been carried out further to the purpose of the present invention, technical scheme and beneficial effect
Describe in detail, should be understood that and the foregoing is only specific embodiment of the invention, be not intended to limit the present invention
Protection domain, all any modification, equivalent substitution and improvements within the spirit and principles in the present invention, done etc. all should include
Within protection scope of the present invention.