CN202735407U - Active power filter harmonic detection device - Google Patents
Active power filter harmonic detection device Download PDFInfo
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- CN202735407U CN202735407U CN 201220462481 CN201220462481U CN202735407U CN 202735407 U CN202735407 U CN 202735407U CN 201220462481 CN201220462481 CN 201220462481 CN 201220462481 U CN201220462481 U CN 201220462481U CN 202735407 U CN202735407 U CN 202735407U
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Abstract
The utility model discloses an active power filter harmonic detection device, comprising a current sensor, a signal processing circuit, a series lead compensation circuit, a FBD method harmonic calculation module, and a all-pass filter. The current sensor samples load current. The signal processing circuit comprises an amplifying circuit and a second order anti-aliasing low pass filter, and the signal processing circuit magnifies and filters the sampled signals from the current sensor. The series lead compensation circuit compensates delay generated in filtration of the second order anti-aliasing low pass filter in the signal processing circuit. The FBD method harmonic calculation module using a FBD method to calculate the compensated signals from the series lead compensation circuit. The all-pass filter compensates phase delay generated when the current sensor samples and delay generated when the FBD method harmonic calculation module calculates to output harmonic current. The active power filter harmonic detection device performs total phase compensation on pure time delay and phase lag delay of the current sensor, and can preferably compensate delay in a harmonic detection process.
Description
Technical field
The utility model relates to the detection of field of power electronics power electronic equipment, relates in particular to a kind of APF harmonic pick-up unit.
Background technology
Various power electronic equipments with on-off mode work constantly increase at present, make voltage, the electric current distorted of electric system, cause severe contamination to power supply quality.The harmonic wave of compensates electric system improves the quality of power supply and becomes the technical matters of being badly in need of solution.Active Power Filter-APF (being called for short APF) is a kind of novel electric power electric device for dynamically suppressing harmonic wave, compensating reactive power, it can be to size and the frequency harmonic wave and idle the compensating that all change, it can overcome the shortcoming of traditional LC reactive-load compensation, and therefore studying APF has important practical significance.
APF belongs to real-time control apparatus, requires in theory offset current real-time follow-up load harmonic current component.But the existence of time-delay can impact the higher hamonic wave compensation effect so that offset current and power network current have certain phase differential, even amplifies higher hamonic wave, not only affects the APF compensation effect, also might cause harmonic pollution to electrical network.
Traditional APF harmonic measurement device has larger time-delay, has affected the performance of APF.Therefore, need a kind of device badly to address the above problem, be implemented in and carry out compensation of delay when detecting harmonic wave.
The utility model content
One of technical problem to be solved in the utility model is that a kind of APF harmonic pick-up unit with compensation of delay need to be provided.
In order to solve the problems of the technologies described above, the utility model provides a kind of APF harmonic pick-up unit, and this device comprises:
Current sensor, it is used for load current is sampled;
Signal conditioning circuit, it is coupled to described current sensor, and described signal conditioning circuit comprises amplifying circuit and the anti-aliasing low-pass filter of second order, and described signal conditioning circuit is to amplifying and filtering from the signal after the sampling of described current sensor;
Series connection lead compensation circuit, it is coupled to described signal conditioning circuit, and the time-delay that produces during to the anti-aliasing low-pass filter filtering of second order described in the described signal conditioning circuit compensates;
FBD method Harmonics Calculation module, it is coupled to described series connection lead compensation circuit, utilizes the FBD method to calculating from the signal after the compensation of described series connection lead compensation circuit; And
All-pass filter, it is coupled to described FBD method Harmonics Calculation module, and the time-delay that produces when the phase delay that produces when described current sensor is sampled and described FBD method Harmonics Calculation module are calculated compensates with the output harmonic wave electric current.
The APF harmonic pick-up unit that the utility model provides, preferably, described FBD method Harmonics Calculation module is realized that by dsp chip described dsp chip comprises A/D sampling unit, computing unit and D/A output unit, wherein,
Described A/D sampling unit is connected with described computing unit, and it will be converted to digital signal from the signal after the compensation of described series connection lead compensation circuit;
Described computing unit is connected with described D/A output unit, and the digital signal after it utilizes the FBD algorithm to conversion is calculated;
Described D/A output unit, its results conversion that dsp chip is calculated is simulating signal and exports described all-pass filter to.
The APF harmonic pick-up unit that the utility model provides, preferably, described series connection lead compensation circuit comprises the first resistance, the second resistance and an electric capacity,
Wherein, described the first resistance is connected the other end ground connection of described the second resistance with being connected behind the Capacitance parallel connection with an end of described the second resistance.
The APF harmonic pick-up unit that the utility model provides, preferably, described all-pass filter is by three resistive element, an operational amplifier and single order all-pass filters that capacity cell consists of that resistance is identical.
Compared with prior art, one or more embodiment of the present utility model can have following advantage:
The utility model is by setting up a series connection lead compensation circuit before the A/D sampling unit in FBD method Harmonics Calculation module, be used for the time-delay that anti-aliasing analog filter in the compensating signal modulate circuit produces, and after the D/A output unit of FBD method Harmonics Calculation module, set up the single order all-pass filter, overall phase compensation is carried out in time-delay to other pure time-delays and the hysteresis of current sensor phase place, time-delay that can well the compensation harmonic testing process, satisfy the requirement of real-time, increased substantially the compensation of delay effect of Active Power Filter-APF.
Other features and advantages of the utility model will be set forth in the following description, and, partly from instructions, become apparent, perhaps understand by implementing the utility model.The purpose of this utility model and other advantages can realize and obtain by specifically noted structure in instructions, claims and accompanying drawing.
Description of drawings
Accompanying drawing is used to provide further understanding of the present utility model, and consists of the part of instructions, jointly is used for explaining the utility model with embodiment of the present utility model, does not consist of restriction of the present utility model.In the accompanying drawings:
Fig. 1 is the APF harmonic pick-up unit with compensation of delay according to an embodiment of the present utility model;
Fig. 2 is the hardware circuit diagram according to the signal conditioning circuit 2 interior frequency overlapped-resistable filters of embodiment shown in Figure 1;
Fig. 3 is the hardware circuit diagram according to the series connection lead compensation circuit 3 of embodiment shown in Figure 1;
Fig. 4 is the structural representation of FBD method Harmonics Calculation module 4;
Fig. 5 is the hardware circuit diagram according to the all-pass filter 5 of embodiment shown in Figure 1.
Embodiment
Describe embodiment of the present utility model in detail below with reference to drawings and Examples, how the application technology means solve technical matters to the utility model whereby, and the implementation procedure of reaching technique effect can fully understand and implements according to this.Need to prove that only otherwise consist of conflict, each embodiment in the utility model and each feature among each embodiment can mutually combine, formed technical scheme is all within protection domain of the present utility model.
Fig. 1 is the Active Power Filter-APF with compensation of delay (hereinafter to be referred as the APF) harmonic measurement device according to an embodiment of the present utility model, below with reference to Fig. 1, describes the function of ingredient and the each several part of this harmonic measurement device in detail.
This harmonic measurement device comprises: current sensor 1, signal conditioning circuit 2, series connection lead compensation circuit 3, FBD method Harmonics Calculation module 4 and all-pass filter 5 form.Wherein, current sensor 1 is coupled to signal conditioning circuit 2, signal conditioning circuit 2 is coupled to the front end of series connection lead compensation circuit 3, and the rear end of series connection lead compensation circuit 3 is coupled to FBD method Harmonics Calculation module 4, and FBD method harmonic wave detection module 4 is coupled to all-pass filter 5.
As shown in Figure 1, current sensor 1, its load current i that is used for sampling
La, i
Lb, i
LcCurrent sensor 1 is transformed to voltage signal with current signal, and the phase place of its primary current and secondary current is also not quite identical, exists certain phase delay between the two.
Fig. 2 is the anti-aliasing low-pass filter of the second order of present embodiment, wherein, and R
1And C
1, R
2And C
2Consist of respectively the single order passive filter circuit, the two and operational amplifier U
1Series connection consists of the active anti-aliasing low-pass filter of second order, C
1Another termination operational amplifier U
1Output, C
2Other end ground connection, C
3And C
4Be connected on respectively and positive and negative 15V power supply between, be used for filtering interference signals.
Fig. 3 is the hardware circuit diagram of the series connection lead compensation circuit 3 of present embodiment, and as shown in Figure 3, series connection lead compensation circuit 3 is to be made of two resistive elements and a capacity cell, wherein, and R
3And C
5Parallel connection, front termination signal input, rear end and R
4Be connected connection, R
4Other end ground connection.It is used for the time-delay that anti-aliasing low-pass filters of second order in the compensating signal modulate circuit 2 produce when filtering, and the signal behind the compensation delay is sent in the FBD method Harmonics Calculation module 4.
Fig. 4 is the structural representation of FBD method Harmonics Calculation module 4, and FBD method Harmonics Calculation module 4 is used for utilizing the FBD method to calculating from the signal after the compensation of described series connection lead compensation circuit 4.
As shown in Figure 4, FBD method Harmonics Calculation module 4 realizes by dsp chip, comprises in the dsp chip D/A output unit in A/D sampling unit, dsp chip computing unit and the dsp chip.Wherein the A/D sampling unit is connected with the dsp chip computing unit in the dsp chip, and it is used for and will be converted to digital signal from the signal after the compensation of described series connection lead compensation circuit; D/A output unit in dsp chip computing unit and the dsp chip is connected, and it is used for utilizing the FBD algorithm that the digital signal after changing is calculated and result of calculation is sent to D/A output unit in the connected dsp chip; The results conversion that the D/A output unit calculates dsp chip in the dsp chip is to export all-pass filter 5 to after the simulating signal.
FBD method Harmonics Calculation module 4 also can produce time-delay when calculating, finish the required time spent of FBD method calculation task comprising A/D sampling time spent and DSP, the model of the time-delay of this part and chip has relation, in addition, the computation delay that also can introduce of the wave digital lowpass filter in the FBD method (LPF).
Fig. 5 is the all-pass filter 5 of present embodiment, and all-pass filter 5 consists of single order all-pass filter, wherein R by three identical resistive element, an amplifier and capacity cells of resistance
5The input of one termination signal, another termination operational amplifier U
2Inverting input, R
6Be feedback resistance, be connected on operational amplifier U
2Inverting input and output terminal, R
7And C
6Consist of the single order passive filter circuit, front end and R
5Connect together the signal input, rear termination operational amplifier U
2In-phase input end, R
7Other end ground connection.Its phase place that is used for the pure time-delay of compensation harmonic test section and current sensor lags behind, to obtain harmonic current i
Ah, i
Bh, i
Ch
To sum up, harmonic measurement device of the present utility model, by setting up a hardware series connection lead compensation circuit before the A/D sampling unit in the dsp chip in FBD method Harmonics Calculation module, be used for the time-delay that anti-aliasing analog filter in the compensating signal modulate circuit produces, and the D/A output unit is set up the single order all-pass filter afterwards in the dsp chip of FBD method Harmonics Calculation module, overall phase compensation is carried out in time-delay to other pure time-delays and the hysteresis of current sensor phase place, time-delay that can well the compensation harmonic testing process, satisfy the requirement of real-time, increased substantially the compensation effect of Active Power Filter-APF.
Certainly; the utility model also can have other various embodiments; in the situation that does not deviate from the utility model spirit and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the utility model, but these corresponding changes and distortion all should belong to the protection domain of claim of the present utility model.
Claims (4)
1. an APF harmonic pick-up unit is characterized in that, comprising:
Current sensor, it is sampled to load current;
Signal conditioning circuit, it is coupled to described current sensor, and described signal conditioning circuit comprises amplifying circuit and the anti-aliasing low-pass filter of second order, and described signal conditioning circuit is to amplifying and filtering from the signal after the sampling of described current sensor;
Series connection lead compensation circuit, it is coupled to described signal conditioning circuit, and the time-delay that produces during to the anti-aliasing low-pass filter filtering of second order described in the described signal conditioning circuit compensates;
FBD method Harmonics Calculation module, it is coupled to described series connection lead compensation circuit, utilizes the FBD method to calculating from the signal after the compensation of described series connection lead compensation circuit; And
All-pass filter, it is coupled to described FBD method Harmonics Calculation module, and the time-delay that produces when the phase delay that produces when described current sensor is sampled and described FBD method Harmonics Calculation module are calculated compensates with the output harmonic wave electric current.
2. APF harmonic pick-up unit according to claim 1 is characterized in that,
Described FBD method Harmonics Calculation module is realized that by dsp chip described dsp chip comprises A/D sampling unit, computing unit and D/A output unit, wherein,
Described A/D sampling unit is connected with described computing unit, and it will be converted to digital signal from the signal after the compensation of described series connection lead compensation circuit;
Described computing unit is connected with described D/A output unit, and the digital signal after it utilizes the FBD algorithm to conversion is calculated;
Described D/A output unit, its results conversion that dsp chip is calculated is simulating signal and exports described all-pass filter to.
3. APF harmonic pick-up unit according to claim 1 is characterized in that,
Described series connection lead compensation circuit comprises the first resistance, the second resistance and an electric capacity,
Wherein, described the first resistance is connected the other end ground connection of described the second resistance with being connected behind the Capacitance parallel connection with an end of described the second resistance.
4. APF harmonic pick-up unit according to claim 1 is characterized in that,
Described all-pass filter is by three resistive element, an operational amplifier and single order all-pass filters that capacity cell consists of that resistance is identical.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220462481 CN202735407U (en) | 2012-09-12 | 2012-09-12 | Active power filter harmonic detection device |
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| CN 201220462481 CN202735407U (en) | 2012-09-12 | 2012-09-12 | Active power filter harmonic detection device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105430797A (en) * | 2015-12-11 | 2016-03-23 | 成都翰道科技有限公司 | Energy saving control system of intelligent LED lamp based on double-order filter circuit |
| CN109842328A (en) * | 2017-11-28 | 2019-06-04 | 现代自动车株式会社 | The method for calculating motor position using Hall sensor |
| CN110011311A (en) * | 2019-05-16 | 2019-07-12 | 中国测试技术研究院电子研究所 | A kind of harmonic controling device |
| CN112467963A (en) * | 2019-09-09 | 2021-03-09 | 昆山新士坦电子科技有限公司 | Circuit harmonic elimination system and method |
-
2012
- 2012-09-12 CN CN 201220462481 patent/CN202735407U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105430797A (en) * | 2015-12-11 | 2016-03-23 | 成都翰道科技有限公司 | Energy saving control system of intelligent LED lamp based on double-order filter circuit |
| CN109842328A (en) * | 2017-11-28 | 2019-06-04 | 现代自动车株式会社 | The method for calculating motor position using Hall sensor |
| CN109842328B (en) * | 2017-11-28 | 2023-03-17 | 现代自动车株式会社 | Method for calculating motor position by using Hall sensor |
| CN110011311A (en) * | 2019-05-16 | 2019-07-12 | 中国测试技术研究院电子研究所 | A kind of harmonic controling device |
| CN112467963A (en) * | 2019-09-09 | 2021-03-09 | 昆山新士坦电子科技有限公司 | Circuit harmonic elimination system and method |
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| C14 | Grant of patent or utility model | ||
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| ASS | Succession or assignment of patent right |
Owner name: HUNAN HUDA HUAXIANG SMART GRID TECHNOLOGY CO., LTD Free format text: FORMER OWNER: CAO YIJIA Effective date: 20140109 |
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| C41 | Transfer of patent application or patent right or utility model | ||
| C53 | Correction of patent for invention or patent application | ||
| CB03 | Change of inventor or designer information |
Inventor after: Cao Yijia Inventor after: Yu Jingrong Inventor after: Chen Gang Inventor after: Cao Xiaoming Inventor after: Xu Yong Inventor after: Zou Yongjun Inventor after: Li Jianjun Inventor after: Wang Haiyan Inventor after: Xu Min Inventor before: Cao Yijia Inventor before: Yu Jingrong Inventor before: Chen Gang Inventor before: Cao Xiaoming Inventor before: Xu Yong |
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| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 410082 CHANGSHA, HUNAN PROVINCE TO: 413001 YIYANG, HUNAN PROVINCE Free format text: CORRECT: INVENTOR; FROM: CAO YIJIA YU JINGRONG CHEN GANG CAO XIAOMING XU YONG TO: CAO YIJIA YU JINGRONG CHEN GANG CAO XIAOMING XU YONG ZOU YONGJUN LI JIANJUN WANG HAIYAN XU MIN |
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| TR01 | Transfer of patent right |
Effective date of registration: 20140109 Address after: Changchun Industrial Park He Jia Qiao Bei Lu 413001 Yiyang city of Hunan province Ziyang District No. 28 Patentee after: HUNAN HUDA HUAXIANG SMART GRID TECHNOLOGY CO., LTD. Address before: 410082 engineering laboratory building, South Campus of Hunan University, Hunan, Changsha 519 Patentee before: Cao Yijia |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130213 Termination date: 20160912 |
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| CF01 | Termination of patent right due to non-payment of annual fee |