CN106899325A - Pilot system when one kind is based on IRIG B yards of hardware pair - Google Patents
Pilot system when one kind is based on IRIG B yards of hardware pair Download PDFInfo
- Publication number
- CN106899325A CN106899325A CN201710116562.6A CN201710116562A CN106899325A CN 106899325 A CN106899325 A CN 106899325A CN 201710116562 A CN201710116562 A CN 201710116562A CN 106899325 A CN106899325 A CN 106899325A
- Authority
- CN
- China
- Prior art keywords
- irig
- collecting card
- data collecting
- yards
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G7/00—Synchronisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
Abstract
Pilot system, technical field when belonging to hardware pair during the invention discloses one kind based on IRIG B coded hardwares pair.Including：Connection cables between data collecting card, clock server and data collecting card and clock server；Data collecting card is provided with IRIG B yards of interface, is used to receive the temporal information transmitted in IRIG B yards of form；Clock server is connected by cable with data collecting card, and the time encoding of IRIG B forms can be sent to each data collecting card；Clock server to each data collecting card send IRIG B forms time encoding while can be data markers timestamp, so as to realize each data collecting card accurately hardware pair when.The present invention is united function when being realized using the interface on data collecting card, for the Accurate Analysis and fault location of test data provide time guarantee.The accuracy of timing accuracy and data analysis is improved, fault location is accurately carried out, the probability broken down on reduction machine, to shortening the data-analysis time, improving security of system and reducing the system development time.
Description
Technical field
The invention belongs to technical field during hardware pair, and in particular to pilot system when one kind is based on IRIG-B yards of hardware pair.
Background technology
With the development that current electronic technology is maked rapid progress, time synchronized has obtained more and more important application.Timing code
The mode that IRIG-B is transmitted as a kind of important time synchronized, it is first as timing equipment with its actual prominent superior function
The standard pattern of choosing, is widely applied to the important industry such as telecommunications, electric power, military affairs or department.
The ground experiment of current aircraft system is, by means such as excitation, emulation, actual airborne set to be completed in the ground stage
Standby experimental test project.During experimental test, in order to more accurately carry out time response analysis and fault diagnosis, need
Strengthen the time precision of system under test (SUT).
Few unified clock servers ensure the accuracy of time, the master for using clock server in experimental enviroment
It is also function of being united when being realized by way of software, it is accurate during hardware pair to be not so good as in precision.
The content of the invention
The purpose of the present invention：In order to solve the above problems, tried when the present invention proposes one kind based on IRIG-B yards of hardware pair
Check system, function of being united when being realized by the interface on data collecting card, for the Accurate Analysis and fault location of test data are provided
Time ensures.
Technical scheme：It is a kind of based on IRIG-B yards of hardware pair when test system, including：Data acquisition
Card, the connection cables between clock server and data collecting card and clock server；
The data collecting card is provided with IRIG-B yards of interface, on the draw-in groove of computer, be used to receive with
The IRIG-B yards of temporal information of form transmission；
The clock server is connected by cable with data collecting card, can send IRIG-B to each data collecting card
The time encoding of form；
The clock server can be number while the time encoding of IRIG-B forms is sent to each data collecting card
According to mark timestamp.
Preferably, described IRIG-B yards interface uses RS422 interfaces.
Preferably, the synchronization accuracy of described IRIG-B yards interface is 1 μm.
Technique effect of the invention：The pilot system when present invention provides one kind based on IRIG-B hardware pair, can fully carry
Timing accuracy high, improves the accuracy of data analysis, accurately carries out fault location, more easily asking in discovery system design
Topic, pinpoints the problems in advance in system design and experimental test stage, the probability broken down on reduction machine, to shortening data analysis
Time, raising security of system and reduction system development time.
Brief description of the drawings
Fig. 1 be the present invention it is a kind of based on IRIG-B yards of hardware pair when pilot system the experiment process of a preferred embodiment show
It is intended to.
Specific embodiment
To make the purpose, technical scheme and advantage of present invention implementation clearer, below in conjunction with the embodiment of the present invention
Accompanying drawing, the technical scheme in the embodiment of the present invention is further described in more detail.In the accompanying drawings, identical from start to finish or class
As label represent same or similar element or the element with same or like function.Described embodiment is the present invention
A part of embodiment, rather than whole embodiments.Embodiment below with reference to Description of Drawings is exemplary, it is intended to used
It is of the invention in explaining, and be not considered as limiting the invention.Based on the embodiment in the present invention, ordinary skill people
The every other embodiment that member is obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.Under
Face is described in detail with reference to accompanying drawing to embodiments of the invention.
In the description of the invention, it is to be understood that term " " center ", " longitudinal direction ", " transverse direction ", "front", "rear",
The orientation or position relationship of the instruction such as "left", "right", " vertical ", " level ", " top ", " bottom " " interior ", " outward " are based on accompanying drawing institute
The orientation or position relationship for showing, are for only for ease of the description present invention and simplify description, rather than the dress for indicating or implying meaning
Put or element with specific orientation, with specific azimuth configuration and operation, therefore it is not intended that must be protected to the present invention
The limitation of scope.
Embodiments of the invention are described in detail below in conjunction with the accompanying drawings, refer to Fig. 1；
It is a kind of based on IRIG-B yards of hardware pair when test system, including：Data collecting card, clock server and number
According to the connection cables between capture card and clock server.
Current data collecting card on the market, such as GJB289A, 1394, RS422 boards, the present invention is setting chronometric data
Capture card has generally reserved IRIG-B yards of general interface, and IRIG-B yards of interface generally uses TTL interfaces or RS422 interfaces,
The synchronization accuracy of described IRIG-B yards interface is 1 μm, and IRIG-B yards of reserved interface can be received and passed in IRIG-B yards of form
Defeated temporal information.
Improved clock server can produce the time encoding of IRIG-B forms and can pass to each data
Capture card.
At the trial, IRIG-B yards of interface of data collecting card is attached with clock server first, data acquisition
Card is arranged on computer draw-in groove, and the temporal information that IRIG-B yards of form is transmitted is read by computer, and clock server is to each
Individual data collecting card sends the time encoding of IRIG-B forms, and data collecting card is operationally using this time for data are stamped
Timestamp, so as to realize each data collecting card accurately hardware pair when.This technology, Ke Yichong are applied in test system
Precision when dividing raising pair, for data analysis and fault diagnosis provide stronger time precision guarantee.
Pilot system during a kind of coded hardware pair based on IRIG-B of the invention, is realized using the interface on data collecting card
When unite function, ensured for the Accurate Analysis and fault location of test data provide the time.Timing accuracy is improved, data analysis is improved
Accuracy, accurately carry out fault location, the problem in system design is more easily found, in system design and experimental test
Stage pinpoints the problems in advance, the probability broken down on reduction machine, to shortening data-analysis time, raising security of system and subtracting
Few system development time.
It is last it is to be noted that：The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations.To the greatest extent
Pipe has been described in detail to the present invention with reference to the foregoing embodiments, it will be understood by those within the art that：It is still
Technical scheme described in foregoing embodiments can be modified, or which part technical characteristic is equally replaced
Change；And these modifications or replacement, do not make the essence of the essence disengaging various embodiments of the present invention technical scheme of appropriate technical solution
God and scope.
Claims (3)
1. it is a kind of to be based on pilot system during IRIG-B yards of hardware pair, it is characterised in that including：Data collecting card, clock server
And the connection cables between data collecting card and clock server；
The data collecting card is provided with IRIG-B yards of interface, and on computer draw-in groove, is used to receive with IRIG-B
The temporal information of code form transmission；
The clock server is connected by cable with data collecting card, can send IRIG-B forms to each data collecting card
Time encoding；
The clock server to each data collecting card send IRIG-B forms time encoding while can be data mark
Note timestamp.
2. pilot system when one kind according to claim 1 is based on IRIG-B yards of hardware pair, it is characterised in that：It is described
IRIG-B yards of interface uses RS422 interfaces.
3. pilot system when one kind according to claim 2 is based on IRIG-B yards of hardware pair, it is characterised in that：It is described
The synchronization accuracy of IRIG-B yards of interface is 1 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710116562.6A CN106899325A (en) | 2017-02-28 | 2017-02-28 | Pilot system when one kind is based on IRIG B yards of hardware pair |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710116562.6A CN106899325A (en) | 2017-02-28 | 2017-02-28 | Pilot system when one kind is based on IRIG B yards of hardware pair |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106899325A true CN106899325A (en) | 2017-06-27 |
Family
ID=59184596
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710116562.6A Pending CN106899325A (en) | 2017-02-28 | 2017-02-28 | Pilot system when one kind is based on IRIG B yards of hardware pair |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106899325A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108763141A (en) * | 2018-06-05 | 2018-11-06 | 成都爱斯顿科技有限公司 | A kind of IRIG-B codes symbol is nonpolarity data processing equipment and method |
Citations (4)
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| US20060017967A1 (en) * | 2004-07-23 | 2006-01-26 | Noriko Asami | Image data obtaining system, digital compound machine and system management server |
| CN202475024U (en) * | 2012-02-04 | 2012-10-03 | 南京因泰莱电器股份有限公司 | Digital protection device according with IEC61850 standard |
| CN102879032A (en) * | 2012-09-25 | 2013-01-16 | 中国科学院西安光学精密机械研究所 | Dynamic angle measurement accuracy measuring device |
| CN103346804A (en) * | 2013-07-30 | 2013-10-09 | 哈尔滨工业大学 | IRIG-B (Inter Range Instrumentation Group) encoding and decoding system and method based on FPGA (Field Programmable Gate Array) |
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2017
- 2017-02-28 CN CN201710116562.6A patent/CN106899325A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060017967A1 (en) * | 2004-07-23 | 2006-01-26 | Noriko Asami | Image data obtaining system, digital compound machine and system management server |
| CN202475024U (en) * | 2012-02-04 | 2012-10-03 | 南京因泰莱电器股份有限公司 | Digital protection device according with IEC61850 standard |
| CN102879032A (en) * | 2012-09-25 | 2013-01-16 | 中国科学院西安光学精密机械研究所 | Dynamic angle measurement accuracy measuring device |
| CN103346804A (en) * | 2013-07-30 | 2013-10-09 | 哈尔滨工业大学 | IRIG-B (Inter Range Instrumentation Group) encoding and decoding system and method based on FPGA (Field Programmable Gate Array) |
Non-Patent Citations (1)
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| 贾瑞军: "基于DSP的网络数据采集板卡DMA传输方案的设计与实现", 《中国优秀硕士学位论文全文数据库》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108763141A (en) * | 2018-06-05 | 2018-11-06 | 成都爱斯顿科技有限公司 | A kind of IRIG-B codes symbol is nonpolarity data processing equipment and method |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170627 |