CN106899287A - The reinforcing circuit and clock line length line transmission circuit of a kind of Long line transmission driver - Google Patents
The reinforcing circuit and clock line length line transmission circuit of a kind of Long line transmission driver Download PDFInfo
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- CN106899287A CN106899287A CN201710236820.4A CN201710236820A CN106899287A CN 106899287 A CN106899287 A CN 106899287A CN 201710236820 A CN201710236820 A CN 201710236820A CN 106899287 A CN106899287 A CN 106899287A
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- phase inverter
- reinforcing
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- reinforcing phase
- circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
- H03K19/017518—Interface arrangements using a combination of bipolar and field effect transistors [BIFET]
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- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
A kind of driver the invention discloses Long line transmission reinforces circuit, it is characterized in that, including clkin inputs and clkout output ends, the input connection of described clkin inputs and reinforcing phase inverter inv1, the output end of described reinforcing phase inverter inv1 is connected with the input for reinforcing phase inverter inv2, and described reinforcing phase inverter inv2 output ends are connected with clkout output ends.The invention also discloses a kind of clock line Long line transmission circuit.The Antiradiation of the Long line transmission driver in Antiradiation chip of the present invention reinforces circuit, and under nuclear radiation environment, its output voltage has reached the requirement of rail voltage, significantly enhances the robustness of NMOS tube, effectively overcomes the debiasing effect of substrate.
Description
Technical field
The present invention relates to the clock line in Antiradiation chip, set line, reset line and various data, the length of control line
During Distance Transmission, driver（BUFFER）Reinforcement design technology field, it particularly relates to a kind of driver of Long line transmission
Reinforce circuit and clock line length line transmission circuit.
Background technology
With the enhancing of china's overall national strength, for nuclear accident the rescue key technology equipment of nuclear war to have gone up be state
The most important thing of family's Strategic Technology equipment deposit!Nuclear accident nuclear war rescue outfit, technically for, two can be divided into
Key level:One is the anti-nuclear irradiation chip technology and anti-nuclear irradiation reinforcement technique of electronic information, and two is possess anti-core skill
The intelligentized unmanned equipment such as unmanned vehicle of art robot unmanned plane unmanned boat.
China only employs Flouride-resistani acid phesphatase chip reinforcement technique in space satellite field at present, because the single-particle in outer space
The influence of effect, long-term irradiation can make that the elementary cell gate circuit of electronic system is damaged, breech lock does not overturn, whole so as to cause
The failure of electronic system！But in aviation, weapons especially nuclear engineering field, the application of the anti-core piece of China or blank！
How with the enhancing of China's economic strength, there is Tactical Nuclear Warfare, nuclear power plant accident, core work in increasing for nuclear power station
In the strong environment of journey disaster plasma ray, aerospace plane, unmanned plane can also fly, surface car can also normally travel, this is just
Making the problem of anti-nuclear technology needs input significant capital to go to capture.
The nuclear accident rescue history in the world is made a general survey of, such as Russia, the nuclear accident of state of Japan, it is found that they are current
And the technology such as unmanned vehicle, unmanned plane reinforced without anti-core piece, anti-core the chip design art only U.S., China etc. at present
A small number of nuclear powers possess.
Antiradiation chip is one of key technology in anti-nuclear technology link, clock line therein, set line, reset line
And various data, control line etc. are when long range is transmitted, driver（BUFFER）It is also one of key element, is also anti-core
One of piece key technology to be solved.
General commercial unguyed anti-core piece will under the gamma-rays close rate of 107-108 rad (Si)/s
Generation breech lock, its anti-γ integral dose radiations ability is in 102Gy（Si）The order of magnitude, and nuclear explosive environment and the radiation of other cores, its X
Ray and gamma-rays, about in 10ns--1 μ s, with intensity very high, close rate reaches 1010Gy to impulse radiation width（Si）/
s（1300 yards=1185m）.Also as the design in some documents to phase inverter, BUFFER is all space-oriented radiation-hardened design
, accordingly, it would be desirable to the driver BUFFER circuits needed for designing the Long line transmission that a kind of Antiradiation is reinforced.
The content of the invention
For the above-mentioned technical problem in correlation technique, the present invention proposes that a kind of Antiradiation chip middle or long line transmission drives
The reinforcing circuit of device BUFFER, can overcome the above-mentioned deficiency of prior art.
To realize above-mentioned technical purpose, the technical proposal of the invention is realized in this way：
A kind of reinforcing circuit of Antiradiation chip middle or long line transmission driver BUFFER, including it is connected on input signal clkin
Several between output signal clkout reinforce phase inverter inv.
Further, the described phase inverter inv that reinforces includes the reinforcing phase inverter inv1 and reinforcing phase inverter inv2 of series connection,
Wherein, described reinforcing phase inverter inv1 receives input signal clkin, and the described output for reinforcing phase inverter inv1 is used as described
The input of phase inverter inv2 is reinforced, the described output for reinforcing phase inverter inv2 is used as output signal clkout.
Further, the reinforcing phase inverter inv1 is made up of p1, n1, p2 and n2, the grid of described p1, n1, p2 and n2
Pole is connected with input signal clkin, and the source electrode of described p1, p2 meets Vdd, and the source electrode of n2 meets Vss, and the drain electrode of p2, n2 is connected and hands over
In sp2, the source electrode of n1 is connected with sp2, and the drain electrode of P1, n1 is connected and meets at sp1, and described sp1 is used as reinforcing phase inverter inv1's
Output.
Further, the reinforcing phase inverter inv2 is made up of p3, n3, p4 and n4, the grid of described p3, n3, p4 and n4
Pole is connected with the output sp1 for reinforcing phase inverter inv1, and the source electrode of p3, p4 meets Vdd, and the source electrode of n4 meets Vss, the leakage of described p3, n4
Extremely it is connected and meets at sp4, the source electrode of n3 is connected with sp4, the drain electrode of P3, n3 is connected and meets at sp3, sp3 is used as reinforcing phase inverter inv2
Output.
Further, the grid of described reinforcing phase inverter inv1 and the NMOS tube for reinforcing phase inverter inv2 are set using ring-shaped gate
Meter, reinforces with to place.
Further, the driver BUFFER uses triple-well process, wherein, n traps are formed on p-substrate, in n traps
N is formed on bottom+Deep trap, then p traps are formed in n traps, nmos device, n are manufactured in p traps+Deep trap connects ceiling voltage.
The present invention also provides clock line Long line transmission circuit in a kind of Antiradiation chip, including the output of clock line long is driven
Dynamic buffer1 and receiving terminal buffer2, the output driving buffer1 and receiving terminal buffer2 of described clock line long it
Between be in series with several and as claimed in claim 1 reinforce circuit.
Further：Including be sequentially connected in series reinforcing phase inverter inv1, reinforce phase inverter inv2, reinforce phase inverter inv3 and
Phase inverter inv4 is reinforced, wherein, the input of output driving buffer1 reinforcement by connection phase inverters inv1 reinforces phase inverter inv1's
Export as the input for reinforcing phase inverter inv2, reinforce the output of phase inverter inv2 as the input for reinforcing phase inverter inv3, plus
Gu the output of phase inverter inv3 reinforces the output connection receiving terminal of phase inverter inv4 as the input for reinforcing phase inverter inv4
buffer2。
Beneficial effects of the present invention：The Antiradiation of the Long line transmission driver in Antiradiation chip of the present invention reinforces electricity
Road, under nuclear radiation environment, its output voltage has reached the requirement of rail voltage, significantly enhances the robustness of NMOS tube, has
Overcome to effect the debiasing effect of substrate.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to institute in embodiment
The accompanying drawing for needing to use is briefly described, it should be apparent that, drawings in the following description are only some implementations of the invention
Example, for those of ordinary skill in the art, on the premise of not paying creative work, can also obtain according to these accompanying drawings
Obtain other accompanying drawings.
Fig. 1 is a kind of circuit diagram of clock line Long line transmission circuit described according to embodiments of the present invention；
Fig. 2 is a kind of circuit diagram of the driver reinforcing circuit of Long line transmission described according to embodiments of the present invention；
Fig. 3 is reinforcing phase inverter inv1 described according to embodiments of the present invention and the logical construction for reinforcing phase inverter inv2 parts
Figure；
Fig. 4 is the structural representation that driver described according to embodiments of the present invention reinforces driver in circuit.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, the every other embodiment that those of ordinary skill in the art are obtained belongs to present invention protection
Scope.
As in Figure 2-4, a kind of Antiradiation chip middle or long line described according to embodiments of the present invention transmission driver
The reinforcing circuit of BUFFER, including several reinforcings being connected between input signal clkin and output signal clkout are anti-phase
Device inv.
In one embodiment, the described phase inverter inv that reinforces includes the reinforcing phase inverter inv1 of series connection and reinforces anti-
Phase device inv2, wherein, described reinforcing phase inverter inv1 receives input signal clkin, and described reinforces the defeated of phase inverter inv1
Go out the input as the reinforcing phase inverter inv2, the described output for reinforcing phase inverter inv2 is used as output signal clkout.
In one embodiment, the reinforcing phase inverter inv1 is made up of p1, n1, p2 and n2, described p1, n1, p2
Grid with n2 is connected with input signal clkin, and the source electrode of described p1, p2 meets Vdd, and the source electrode of n2 meets Vss, the leakage of p2, n2
Extremely it is connected and meets at sp2, the source electrode of n1 is connected with sp2, the drain electrode of P1, n1 is connected and meets at sp1, described sp1 is anti-phase as reinforcing
The output of device inv1.
In one embodiment, the reinforcing phase inverter inv2 is made up of p3, n3, p4 and n4, described p3, n3, p4
Grid with n4 is connected with the output sp1 for reinforcing phase inverter inv1, and the source electrode of p3, p4 meets Vdd, and the source electrode of n4 meets Vss, described
The drain electrode of p3, n4 is connected and meets at sp4, and the source electrode of n3 is connected with sp4, and the drain electrode of P3, n3 is connected and meets at sp3, and sp3 is anti-as reinforcing
The output of phase device inv2.
In one embodiment, the grid of described reinforcing phase inverter inv1 and the NMOS tube for reinforcing phase inverter inv2 are used
Ring-shaped gate design, reinforces with to place.
In one embodiment, the driver BUFFER uses triple-well process, wherein, n is formed on p-substrate
Trap, n is formed in the bottom of n traps+Deep trap, then p traps are formed in n traps, nmos device, n are manufactured in p traps+Deep trap connects highest electricity
Pressure.
The present invention also provides the present invention and also provides clock line Long line transmission circuit in a kind of Antiradiation chip, such as Fig. 1 institutes
Show：Output driving buffer1 and receiving terminal buffer2 including clock line long, the output driving of described clock line long
Several reinforcing circuits as claimed in claim 1 are in series between buffer1 and receiving terminal buffer2.
In one embodiment：Including be sequentially connected in series reinforcing phase inverter inv1, reinforce phase inverter inv2, reinforce anti-phase
Device inv3 and reinforcing phase inverter inv4, wherein, the input of output driving buffer1 reinforcement by connection phase inverters inv1 is reinforced anti-phase
The output of device inv1 reinforces the output of phase inverter inv2 as reinforcing phase inverter inv3's as the input for reinforcing phase inverter inv2
Input, reinforces the output of phase inverter inv3 as the input for reinforcing phase inverter inv4, and the output for reinforcing phase inverter inv4 connects
Receive terminal buffer2.
Understand above-mentioned technical proposal of the invention for convenience, below by way of in specifically used mode to of the invention above-mentioned
Technical scheme is described in detail.
When specifically used, p1, n1, p2 and n2 are respectively pmos pipes one, nmos pipes one, pmos pipes two and nmos pipes two,
The grid of pmos pipes one, nmos pipes one, pmos pipes two and nmos pipes two is connected with input signal clkin, pmos pipes one, pmos pipe
Two source electrode meets Vdd, and the source electrode of nmos pipes two meets Vss, and pmos pipes two, the drain electrode of nmos pipes two are connected and meet at spmos pipes two,
The source electrode of nmos pipes one is connected with spmos pipes two.Pmos pipes one, the drain electrode of nmos pipes one are connected and meet at spmos pipes one, spmos
Pipe one as inv1 output.When spmos pipes one as shown in Figure 2, spmos pipes two are in circuit sensitive point, 2 points of electricity
Position it is equal, the threshold voltage step-down of nmos pipes one that will not be caused by nuclear radiation and make spmos pipes one voltage produce reduction.
P3, n3, p4 and n4 are respectively pmos pipes three, nmos3 pipes three, pmos pipes four and nmos pipes four, pmos pipes three, nmos3 pipes three,
The grid of pmos pipes four and nmos pipes four is connected with the output spmos pipes one of inv1, and pmos pipes three, the source electrode of pmos pipes four connect
The source electrode of Vdd, nmos pipe four meets Vss, and pmos pipes three, the drain electrode of nmos pipes four are connected and meet at spmos pipes four, nmos3 pipes three
Source electrode is connected with spmos pipes four.Pmos pipes three, the drain electrode of nmos3 pipes three are connected and meet at spmos pipes three, the conduct of spmos pipes three
The output connection output signal of inv2.Equally when spmos pipes three as shown in Figure 2, spmos pipes four are in circuit sensitive point,
2 points of current potential is equal, the threshold voltage step-down of nmos3 pipes three that will not be caused by nuclear radiation and produce the voltage of spmos pipes three
It is raw to reduce.The grid for reinforcing phase inverter NMOS tube use ring-shaped gate design, and place is reinforced.For the drain electrode of NMOS tube
Sensitive spot, due to beak effect and edge effect, the parasitic NMOS tube of generation easily causes patrolling for device under the conditions of nuclear radiation
Collect mistake.The method that drain electrode to NMOS tube uses ring-shaped gate design, effectively overcomes the destruction of parasitic NMOS tube.Institute
The triple-well process that line BUFFER drivers long are used is stated, interference of the substrate noise to device is considerably reduced.In nuclear radiation ring
Under border, common single trap technique or twin well process, the big noise of substrate easily cause the debiasing effect of substrate, cause device
Logic error, even results in the permanent damages of device.It is even more sensitive for the drive circuit BUFFRE of clock.Using three trap works
Skill, forms n traps on p-substrate, and n is formed in the bottom of n traps+Deep trap, then p traps are formed in n traps, manufacture NMOS in p traps
Device, n+Deep trap connects ceiling voltage.
In sum, the Antiradiation of the Long line transmission driver in Antiradiation chip of the present invention reinforces circuit, in core
Under radiation environment, its output voltage has reached the requirement of rail voltage, significantly enhances the robustness of NMOS tube, efficiently against
The debiasing effect of substrate.
Presently preferred embodiments of the present invention is the foregoing is only, is not intended to limit the invention, it is all in essence of the invention
Within god and principle, any modification, equivalent substitution and improvements made etc. should be included within the scope of the present invention.
Claims (8)
1. a kind of Antiradiation chip middle or long line transmits the reinforcing circuit of driver BUFFER, it is characterised in that including being connected on
Several between input signal clkin and output signal clkout reinforce phase inverter inv.
2. a kind of Antiradiation chip middle or long line according to claim 1 transmits the reinforcing circuit of driver BUFFER, its
It is characterised by, the described phase inverter inv that reinforces includes the reinforcing phase inverter inv1 of series connection and reinforces phase inverter inv2, wherein, institute
The reinforcing phase inverter inv1 for stating receives input signal clkin, and the described output for reinforcing phase inverter inv1 reinforces anti-as described
The input of phase device inv2, the described output for reinforcing phase inverter inv2 is used as output signal clkout.
3. a kind of Antiradiation chip middle or long line according to claim 2 transmits the reinforcing circuit of driver BUFFER, its
It is characterised by, the reinforcing phase inverter inv1 is made up of p1, n1, p2 and n2, grid and the input of described p1, n1, p2 and n2
Signal clkin is connected, and the source electrode of described p1, p2 meets Vdd, and the source electrode of n2 meets Vss, and the drain electrode of p2, n2 is connected and meets at sp2, n1
Source electrode be connected with sp2, the drain electrode of P1, n1 is connected and meets at sp1, and described sp1 is used as the output for reinforcing phase inverter inv1.
4. a kind of Antiradiation chip middle or long line according to claim 3 transmits the reinforcing circuit of driver BUFFER, its
Be characterised by, the reinforcing phase inverter inv2 is made up of p3, n3, p4 and n4, the grid of described p3, n3, p4 and n4 with reinforce
The output sp1 connections of phase inverter inv1, the source electrode of p3, p4 meets Vdd, and the source electrode of n4 meets Vss, and the drain electrode of described p3, n4 is connected and hands over
In sp4, the source electrode of n3 is connected with sp4, and the drain electrode of P3, n3 is connected and meets at sp3, and sp3 is used as the output for reinforcing phase inverter inv2.
5. a kind of Antiradiation chip middle or long line according to claim 4 transmits the reinforcing circuit of driver BUFFER, its
It is characterised by, described reinforcing phase inverter inv1 and the grid of the NMOS tube for reinforcing phase inverter inv2 use ring-shaped gate design, with right
Place is reinforced.
6. a kind of Antiradiation chip middle or long line according to claim 5 transmits the reinforcing circuit of driver BUFFER, its
It is characterised by, the driver BUFFER uses triple-well process, wherein, n traps are formed on p-substrate, formed in the bottom of n traps
n+Deep trap, then p traps are formed in n traps, nmos device, n are manufactured in p traps+Deep trap connects ceiling voltage.
7. a kind of clock line Long line transmission circuit in Antiradiation chip, it is characterised in that the output driving including clock line long
Buffer1 and receiving terminal buffer2, between the output driving buffer1 and receiving terminal buffer2 of described clock line long
It is in series with several reinforcing circuits as claimed in claim 1.
8. clock line Long line transmission circuit in a kind of Antiradiation chip according to claim 7, it is characterised in that including
Reinforcing phase inverter inv1, reinforcing phase inverter inv2, reinforcing phase inverter inv3 and the reinforcing phase inverter inv4 being sequentially connected in series, wherein,
The input of output driving buffer1 reinforcement by connection phase inverters inv1, reinforces the output of phase inverter inv1 as reinforcing phase inverter
The input of inv2, reinforces the output of phase inverter inv2 as the input for reinforcing phase inverter inv3, reinforces the output of phase inverter inv3
As the input for reinforcing phase inverter inv4, the output connection receiving terminal buffer2 of phase inverter inv4 is reinforced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710236820.4A CN106899287A (en) | 2017-04-12 | 2017-04-12 | The reinforcing circuit and clock line length line transmission circuit of a kind of Long line transmission driver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710236820.4A CN106899287A (en) | 2017-04-12 | 2017-04-12 | The reinforcing circuit and clock line length line transmission circuit of a kind of Long line transmission driver |
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| Publication Number | Publication Date |
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| CN106899287A true CN106899287A (en) | 2017-06-27 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710236820.4A Pending CN106899287A (en) | 2017-04-12 | 2017-04-12 | The reinforcing circuit and clock line length line transmission circuit of a kind of Long line transmission driver |
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Citations (4)
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| CN201918975U (en) * | 2010-11-26 | 2011-08-03 | 中国电子科技集团公司第五十八研究所 | Anti-single particle latch structure based on status saving mechanism |
| CN102361440A (en) * | 2011-10-21 | 2012-02-22 | 中国人民解放军国防科学技术大学 | Single-event-upset resistant scan structure D trigger capable of being reset synchronously |
| CN105070669A (en) * | 2015-07-14 | 2015-11-18 | 西北核技术研究所 | Analysis method of total dose effect sensitivity of logic gate circuit and analysis method of total dose effect sensitivity of CMOS digital circuit |
| CN105811935A (en) * | 2016-03-06 | 2016-07-27 | 中国人民解放军国防科学技术大学 | On-chip SET pulse testing method based on dynamic input vector |
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2017
- 2017-04-12 CN CN201710236820.4A patent/CN106899287A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201918975U (en) * | 2010-11-26 | 2011-08-03 | 中国电子科技集团公司第五十八研究所 | Anti-single particle latch structure based on status saving mechanism |
| CN102361440A (en) * | 2011-10-21 | 2012-02-22 | 中国人民解放军国防科学技术大学 | Single-event-upset resistant scan structure D trigger capable of being reset synchronously |
| CN105070669A (en) * | 2015-07-14 | 2015-11-18 | 西北核技术研究所 | Analysis method of total dose effect sensitivity of logic gate circuit and analysis method of total dose effect sensitivity of CMOS digital circuit |
| CN105811935A (en) * | 2016-03-06 | 2016-07-27 | 中国人民解放军国防科学技术大学 | On-chip SET pulse testing method based on dynamic input vector |
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| P. FRANCIS等: "Radiation-hard design for SOI MOS inverters", 《IEEE TRANSACTIONS ON NUCLEAR SCIENCE 》 * |
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Application publication date: 20170627 |