CN106876451A - Thin film transistor (TFT) and preparation method thereof, array base palte - Google Patents
Thin film transistor (TFT) and preparation method thereof, array base palte Download PDFInfo
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- CN106876451A CN106876451A CN201710130992.3A CN201710130992A CN106876451A CN 106876451 A CN106876451 A CN 106876451A CN 201710130992 A CN201710130992 A CN 201710130992A CN 106876451 A CN106876451 A CN 106876451A
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- 239000010409 thin film Substances 0.000 title claims abstract description 64
- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- 239000010408 film Substances 0.000 claims abstract description 89
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 72
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 66
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 239000000463 material Substances 0.000 claims abstract description 35
- 239000010949 copper Substances 0.000 claims abstract description 31
- 229910052802 copper Inorganic materials 0.000 claims abstract description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 48
- 238000000059 patterning Methods 0.000 claims description 31
- 230000008569 process Effects 0.000 claims description 26
- 239000012212 insulator Substances 0.000 claims description 17
- 239000004065 semiconductor Substances 0.000 claims description 15
- 229910044991 metal oxide Inorganic materials 0.000 claims description 9
- 150000004706 metal oxides Chemical group 0.000 claims description 9
- 229910021389 graphene Inorganic materials 0.000 claims description 6
- 229910005265 GaInZnO Inorganic materials 0.000 claims description 4
- 229910007717 ZnSnO Inorganic materials 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000004381 surface treatment Methods 0.000 claims description 3
- 238000012546 transfer Methods 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 13
- 239000002184 metal Substances 0.000 description 13
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 10
- 238000005530 etching Methods 0.000 description 9
- 239000004973 liquid crystal related substance Substances 0.000 description 9
- 238000000151 deposition Methods 0.000 description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 8
- 238000000231 atomic layer deposition Methods 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 239000011787 zinc oxide Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 238000001755 magnetron sputter deposition Methods 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 3
- -1 InZnO Inorganic materials 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 239000011733 molybdenum Substances 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
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- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 2
- 239000004926 polymethyl methacrylate Substances 0.000 description 2
- 239000003870 refractory metal Substances 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
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- 238000005401 electroluminescence Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
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- 239000012774 insulation material Substances 0.000 description 1
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- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
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- 229920003023 plastic Polymers 0.000 description 1
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- 230000009467 reduction Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention discloses a kind of thin film transistor (TFT), including the active layer, gate electrode, source electrode and the drain electrode that are formed on underlay substrate, wherein, the source electrode and the spaced setting of drain electrode, conductive carbon film is respectively arranged between the source electrode and the active layer and between the drain electrode and the active layer, the source electrode and the drain electrode are respectively and electrically connected to the active layer by the conductive carbon film, and the material of the source electrode and the drain electrode is metallic copper.Array base palte the invention also discloses the preparation method of thin film transistor (TFT) as described above and comprising thin film transistor (TFT) as described above.
Description
Technical field
The present invention relates to technical field of semiconductor device, more particularly to a kind of thin film transistor (TFT) and preparation method thereof, also relate to
And the array base palte comprising the thin film transistor (TFT).
Background technology
Panel display apparatus have many merits such as thin fuselage, power saving, radiationless, are widely used.It is existing
Panel display apparatus mainly include that liquid crystal display device (Liquid Crystal Display, LCD) and organic electroluminescent are aobvious
Showing device (Organic Light Emitting Display, OLED).Thin film transistor (TFT) (Thin Film Transistor,
TFT) be panel display apparatus important component, may be formed on glass substrate or plastic base, usually as the dress that opens the light
Put and be used in such as LCD, OLED with drive device.
Display panel industry in, with present display industry in it is in large size, the demand of high-res is more and more stronger,
Requirement higher is proposed to active layer semiconductor devices discharge and recharge.IGZO (indium gallium zinc oxide, indium gallium
Zinc oxide) it is a kind of amorphous oxides containing indium, gallium and zinc, it has high mobility, and carrier mobility is non-crystalline silicon
20~30 times, charge-discharge velocities of the TFT to pixel electrode can be greatly improved, with ON state current high, low off-state current can
To switch rapidly, the response speed of pixel is improved, realize faster refresh rate, while response also substantially increases pixel faster
Line scanning rate so that ultrahigh resolution is possibly realized in display panel.
As the resolution ratio of display panel raises the increase with size, " signal delay " phenomenon will be more serious, reduce cloth
Line resistance turns into a urgent demand.The electric conductivity of Cu is only second to Ag, and the prices of raw materials are cheap, it is considered to be most have uncommon
The low-resistivity wiring material of prestige, has used Cu as the material of the source/drain electrode of TFT in the prior art.But, Cu atoms
Oxide semiconductor active layer easily is diffused under heat or electric field stress, causes TFT electric properties to deteriorate and reliability reduction.Cu
The inner electron track of atom is full up, and outer-shell electron track is half-full, and its chemism is weaker, it is difficult to most of substrate bondings,
Adhesiveness between material layer is very poor.In order to prevent the diffusion of Cu and increase the adhesiveness of Cu, conventional method is in Cu and lining
" barrier layer " is introduced between bottom (insulating barrier or oxide semiconductor active layer).Usually using titanium (Ti), tantalum (Ta), molybdenum (Mo) etc.
Refractory metal, the adhesiveness between these metals and substrate and Cu is all preferable, while playing a part of to prevent Cu diffusions.However,
After refractory metal is introduced as " barrier layer ", had differences due to Cu and as the etching characteristic of the metal on " barrier layer ",
In the patterning processes for preparing source/drain electrode, etching technics is usually relatively complex, and etching effect is often undesirable, increases
Technology difficulty.
The content of the invention
In view of this, the invention provides a kind of thin film transistor (TFT), by the improvement of the structure to thin film transistor (TFT), obtain
Relatively low routing resistance and technology difficulty is reduced, it is applied in the array base palte of display panel, be conducive to being surpassed
High-resolution is in display panel.
To achieve these goals, present invention employs following technical scheme：
A kind of thin film transistor (TFT), including active layer on underlay substrate, gate electrode, source electrode and drain electrode are formed in, its
In, the source electrode and the spaced setting of drain electrode, between the source electrode and the active layer and the drain electrode with
Conductive carbon film is respectively arranged between the active layer, the source electrode and the drain electrode are electric respectively by the conductive carbon film
Property be connected to the active layer, the material of the source electrode and the drain electrode is metallic copper.
Wherein, the conductive carbon film is more than one layer of graphene film.
Wherein, the thickness of the conductive carbon film is 0.3~1nm.
Wherein, the material of the active layer is metal oxide semiconductor material.
Wherein, the metal oxide semiconductor material is selected from ZnO, InZnO, ZnSnO, GaInZnO and ZrInZnO
Any one is two or more.
Wherein, the thin film transistor (TFT) is the thin film transistor (TFT) of bottom grating structure；The gate electrode is formed at the substrate base
On plate, gate insulator is covered with the gate electrode, the active layer is formed on the gate insulator and is located relatively at
The top of the gate electrode, the source electrode and drain electrode are formed on the active layer spaced reciprocally.
The preparation method of thin film transistor (TFT) as described above, it includes step：S1, offer underlay substrate simultaneously pass through for the first time
Patterning processes prepare the gate electrode to form patterning；S2, on the underlay substrate prepare form gate insulator；S3, in institute
State and prepare the active layer to form patterning by second patterning processes on gate insulator；S4, the preparation on the active layer
Form conductive carbon film；S5, source electrode and the leakage to form patterning are prepared by third time patterning processes on the conductive carbon film
Electrode；Wherein, the source electrode and drain electrode are set spaced reciprocally, and the active layer corresponds to the source electrode and drain electrode
Spaced region forms channel region；S6, removal obtain the film brilliant corresponding to the conductive carbon film above the channel region
Body pipe.
Wherein, the step of forming conductive carbon film is prepared on the active layer to specifically include：S41, one support substrate of offer,
Deposition forms conductive carbon film in the support substrate；S42, by the conductive carbon film transfer be attached on the active layer；
S43, the removal support substrate.
Wherein, in step S6, the ditch is corresponded to using plasma surface treatment craft or high-temperature heating removal
Conductive carbon film above road area.
Another aspect of the present invention is to provide a kind of thin-film transistor array base-plate, and it includes that underlay substrate and array set
The thin film transistor (TFT) being placed on the underlay substrate, each thin film transistor (TFT) is electrically connected with a pixel electrode, wherein, institute
Thin film transistor (TFT) is stated for thin film transistor (TFT) as described above.
The thin film transistor (TFT) provided in the embodiment of the present invention, between source electrode and active layer and drain electrode and active layer it
Between be respectively arranged with conductive carbon film, thus：(1), the material of source electrode and drain electrode can directly use pure Cu materials, using low
The material of cost can obtain relatively low routing resistance；(2), conductive carbon film can carry out source/drain electricity as etching barrier layer
During the patterning processes of pole, the metal film such as pure Cu metal films Mo/Cu compared with the prior art or Ti/Cu is easier etching, and carves
Erosion is better, not only reduces technology difficulty, also improves the electric property of device；(3), conductive carbon film has good leading
Electrical property, does not interfere with the electrical connection of source/drain electrode and active layer, and conductive carbon film can stop that the Cu of source/drain electrode is former
Son diffuses to oxide semiconductor active layer.More than being based on, the thin film transistor (TFT) is applied in the array base palte of display panel, is had
Beneficial to acquisition ultrahigh resolution in display panel.
Brief description of the drawings
Fig. 1 is the structural representation of thin film transistor (TFT) provided in an embodiment of the present invention；
During Fig. 2 a- Fig. 2 f are the preparation method of the thin film transistor (TFT) in the embodiment of the present invention, the device that each step is obtained
The graphical representation of exemplary of structure；
Fig. 3 a- Fig. 3 c are that the graphical representation of exemplary for forming conductive carbon film is prepared on active layer in the embodiment of the present invention；
Fig. 4 is the structural representation of array base palte provided in an embodiment of the present invention；
Fig. 5 is the structural representation of display device provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with the accompanying drawings to specific reality of the invention
The mode of applying is described in detail.The example of these preferred embodiments is illustrated in the accompanying drawings.Shown in accompanying drawing and according to
What the embodiments of the present invention of Description of Drawings were merely exemplary, and the present invention is not limited to these implementation methods.
Here, also, it should be noted that in order to avoid having obscured the present invention because of unnecessary details, in the accompanying drawings only
Structure and/or the process step closely related with scheme of the invention is shown, and is eliminated little with relation of the present invention
Other details.
The present embodiment provide firstly a kind of thin film transistor (TFT), and refering to Fig. 1, the thin film transistor (TFT) 2 is formed at substrate base
On plate 1, the thin film transistor (TFT) 2 includes gate electrode 21, gate insulator 22, active layer 23, source electrode 24 and drain electrode 25.
Specifically, as shown in figure 1, the thin film transistor (TFT) 2 that the present embodiment is provided is the thin film transistor (TFT) of bottom gate type, the grid
Electrode 21 is formed on the underlay substrate 1, and gate insulator 22 is covered with the gate electrode 21, and the active layer 23 is formed
In on the gate insulator 22 and the top of the gate electrode 21 is located relatively at, the source electrode 24 and drain electrode 25 are mutual
It is formed on the active layer 23 every ground, the source electrode 24 and drain electrode 25 are electrically connected with the active layer 23.Enter
One step ground, as shown in figure 1, between the source electrode 24 and the active layer 23 and the drain electrode 25 and the active layer 23
Between be respectively arranged with conductive carbon film 26, the source electrode 24 and the drain electrode 25 are electrical respectively by the conductive carbon film 26
It is connected to the active layer 23.It should be noted that in some other embodiments, the thin film transistor (TFT) 2 can also set
Count the thin film transistor (TFT) of top-gate type structure.
Wherein, the material of the source electrode 24 and the drain electrode 25 uses metallic copper (Cu).The conductive carbon film 26 can
Being that the carbon film prepared by grapheme material can also be the carbon film that is prepared by other carbon sources.The conductive carbon film 26
Thickness be preferably 0.3~1nm.
In the present embodiment, the conductive carbon film 26 uses graphene film, can be arranged to a layer graphene film, or
The graphene film of person's two-layer and the above.
In the present embodiment, the material of the active layer is metal oxide semiconductor material.Specifically, the metal oxidation
Thing semi-conducting material is selected from any one in ZnO, InZnO, ZnSnO, GaInZnO and ZrInZnO or two or more.
The thin film transistor (TFT) of example offer is provided, is divided between source electrode and active layer and between drain electrode and active layer
Conductive carbon film is not provided with, thus：(1), the material of source electrode and drain electrode can directly use pure Cu materials, use low cost
Material can obtain relatively low routing resistance；(2), conductive carbon film has good electric conductivity, does not interfere with source/drain electrode
With the electrical connection of active layer, and conductive carbon film can stop that the Cu atoms permeatings of source/drain electrode are active to oxide semiconductor
Layer.
Further, the underlay substrate 1 can select to be glass substrate.The material of the gate electrode 21 can be selected from molybdenum
(Mo), any one in aluminium (Al) and copper (Cu) or two kinds.The material of the gate insulator 22 is mainly inorganic insulation
Material, for example, can be SiNxOr SiOxOr both combine.
The preparation method of thin film transistor (TFT) as described above is described below, thin film transistor (TFT) is by multiple patterning processes
(light shield technique) forms structure graph and completes, include respectively again in patterning processes each time mask, exposure, development, etch and
The techniques such as stripping, wherein etching technics include dry etching and wet etching.Wherein, patterning processes have been existing comparings into
Ripe technology, therefore the detailed process not reinflated detailed description herein of patterning processes that each step is used.
Refering to Fig. 2 a- Fig. 2 f, the preparation method of thin film transistor (TFT) provided in an embodiment of the present invention includes step：
S1, as shown in Figure 2 a, there is provided underlay substrate 1 simultaneously prepares the gate electrode to form patterning by first time patterning processes
21.Specifically, first it is to deposit gate metal film layer in underlay substrate 1, it is then by first time patterning processes that grid is golden
Category film layer etches the gate electrode 21 to form patterning.The material of gate metal film layer can selected from molybdenum (Mo), aluminium (Al) and
Any one in copper (Cu) or two kinds, can be by magnetron sputtering technique, plasma enhanced chemical vapor deposition technique
(PECVD), the depositing operation such as atomic layer deposition process (ALD) is prepared.
S2, as shown in Figure 2 b, prepares on the underlay substrate 1 and forms gate insulator 22, the gate insulator 22
Cover the gate electrode 21.Specifically, the material of the gate insulator 22 is mainly inorganic insulating material, for example, can be
SiNxOr SiOxOr both combine, can by magnetron sputtering technique, plasma enhanced chemical vapor deposition technique (PECVD),
The depositing operation such as atomic layer deposition process (ALD) or solwution method is prepared.
S3, as shown in Figure 2 c, prepares to form patterning on the gate insulator 22 by second patterning processes
Active layer 23.Specifically, first it is to deposit active layer film layer in gate insulator 22, then will by second patterning processes
Active layer film layer etches the active layer 23 to form patterning.The material of active layer film layer is metal-oxide semiconductor (MOS) material
Material, the metal oxide semiconductor material be selected from ZnO, InZnO, ZnSnO, GaInZnO and ZrInZnO in any one or
It is two or more, can be by magnetron sputtering technique, plasma enhanced chemical vapor deposition technique (PECVD), atomic deposition work
The depositing operation such as skill (ALD) or solwution method is prepared.
S4, as shown in Figure 2 d, prepares on the active layer 23 and forms conductive carbon film 26.The conductive carbon film 26 can be
The carbon film prepared by grapheme material can also be the carbon film prepared by other carbon sources, the thickness of the conductive carbon film 26
Degree is preferably 0.3~1nm.Because the thickness of conductive carbon film 26 is smaller, and it is formed in metal-oxide semiconductor (MOS) active layer
On, in order to avoid the damage in the technique for preparing conductive carbon film 26 to metal-oxide semiconductor (MOS) active layer, typically first another
Outer Grown forms conductive carbon film 26, and conductive carbon film 26 is transferred on active layer 23 again then.
S5, as shown in Figure 2 e, the source to form patterning is prepared on the conductive carbon film 26 by third time patterning processes
Electrode 24 and drain electrode 25.Specifically, first it is to deposit source/drain metal film layer in conductive carbon film 26, then by third time
Source/drain metal film layer is etched patterning processes the source electrode 24 and drain electrode 25 to form patterning.Source/drain metal film layer
Material selection is fine copper, can be by magnetron sputtering technique, plasma enhanced chemical vapor deposition technique (PECVD), atom
The depositing operations such as depositing operation (ALD) are prepared.Wherein, as shown in Figure 2 e, the source electrode 24 and drain electrode 25 are mutual
Set every ground, the active layer 23 corresponds to the source electrode 24 and the spaced region of drain electrode 25 forms channel region 23a,
In this step, the position from above channel region 23a is etched up to exposing conductive carbon film 26 to source/drain metal film layer, by
This both sides above channel region 23a obtains spaced source electrode 24 and drain electrode 25.
S6, as shown in figure 2f, removal obtains the film brilliant corresponding to the conductive carbon film 26 above the channel region 23a
Body pipe.Specifically, can correspond to using plasma surface treatment (Plasma) technique or high-temperature heating removal described
Conductive carbon film 26 above channel region 23a.When using Plasma techniques, the gas for preferably using is O2。
Further, in the present embodiment, the conductive carbon film 26 uses graphene film.Wherein, in the active layer
The step of forming conductive carbon film 26 is prepared on 23 to specifically include：
S41, as shown in Figure 3 a a, there is provided support substrate 27, deposition forms conductive carbon film 26 in the support substrate 27.
Support substrate 27 can select polymethyl methacrylate (PMMA) material, first be to grow sacrifice layer in support substrate 27, so
Conductive carbon film 26 is grown on sacrifice layer afterwards, generally conductive carbon film 26 is formed from chemical vapor deposition method (CVD) growth.
S42, as shown in Figure 3 b, the transfer of the conductive carbon film 26 is attached on the active layer 23.Specifically, will have
The support substrate 27 of conductive carbon film 26 is connected to active layer 23, and conductive carbon film 26 is mutually attached with active layer 23 and combined or key
Close and combine.
S43, as shown in Figure 3 c, removes the support substrate 27.By high-temperature heating or the method for chemical attack, will support
The sacrifice layer fusing of substrate 27 is dissolved, and is thus mutually peeled off support substrate 27 and conductive carbon film 26, finally in active layer 23
Obtain conductive carbon film 26.
In the preparation method of thin film transistor (TFT) as described above, the material selection of source/drain electrode is fine copper, the source of carrying out/
During the patterning processes of drain electrode, conductive carbon film can as etching barrier layer, pure Cu metal films Mo/Cu compared with the prior art or
The metal films such as Ti/Cu are easier etching, and etching effect is more preferably, not only reduces technology difficulty, also improves the electricity of device
Gas performance.
The present embodiment additionally provides a kind of thin-film transistor array base-plate, as shown in figure 4, the thin-film transistor array base-plate
The thin film transistor (TFT) 2 being arranged on glass substrate 1 including glass substrate 1 and array is (merely exemplary in Fig. 4 to be shown in which
One), wherein, the thin film transistor (TFT) 2 is to be performed as described above the thin film transistor (TFT) 2 that example is provided.Specifically, the film crystal
Passivation layer 3 is also covered with pipe 2, pixel electrode 4 is provided with the passivation layer 3, the pixel electrode 4 is described by being arranged on
Via in passivation layer 3 is electrically connected to the thin film transistor (TFT) 2.In thin-film transistor array base-plate, each sub-pixel knot
Structure generally comprises a thin film transistor (TFT) 2 and a pixel electrode 4.
The present embodiment additionally provides a kind of display device, wherein employing thin film transistor (TFT) battle array provided in an embodiment of the present invention
Row substrate.The display device for example can be thin-film transistor LCD device (TFT-LCD) or ORGANIC ELECTROLUMINESCENCE DISPLAYS
Device (OLED), employs thin-film transistor array base-plate provided in an embodiment of the present invention, can cause display device compared to
Prior art has more superior performance, while also reducing cost.Specifically, it is with thin-film transistor LCD device
Example, refering to Fig. 5, the liquid crystal display device includes liquid crystal panel 100 and backlight module 200, the liquid crystal panel 100 and the back of the body
Light module 200 is oppositely arranged, and the backlight module 200 provides display light source to the liquid crystal panel 100, so that the liquid crystal surface
Plate 100 shows image.Wherein, liquid crystal panel 100 includes the array base palte 101 and optical filtering substrate 102 that are oppositely arranged, also including position
Liquid crystal layer 103 between array base palte 101 and optical filtering substrate 102.Wherein, array base palte 101 employs implementation of the present invention
The thin-film transistor array base-plate that example is provided.
It should be noted that herein, such as first and second or the like relational terms are used merely to a reality
Body or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or deposited between operating
In any this actual relation or order.And, term " including ", "comprising" or its any other variant be intended to
Nonexcludability is included, so that process, method, article or equipment including a series of key elements not only will including those
Element, but also other key elements including being not expressly set out, or also include being this process, method, article or equipment
Intrinsic key element.In the absence of more restrictions, the key element limited by sentence "including a ...", it is not excluded that
Also there is other identical element in process, method, article or equipment including the key element.
The above is only the specific embodiment of the application, it is noted that for the ordinary skill people of the art
For member, on the premise of the application principle is not departed from, some improvements and modifications can also be made, these improvements and modifications also should
It is considered as the protection domain of the application.
Claims (10)
1. a kind of thin film transistor (TFT), including active layer on underlay substrate, gate electrode, source electrode and drain electrode are formed in, it is special
Levy and be, the source electrode and the spaced setting of drain electrode, between the source electrode and the active layer and the electric leakage
Conductive carbon film is respectively arranged between pole and the active layer, the source electrode and the drain electrode are by the conductive carbon film point
It is not electrically connected to the active layer, the material of the source electrode and the drain electrode is metallic copper.
2. thin film transistor (TFT) according to claim 1, it is characterised in that the conductive carbon film is more than one layer of Graphene
Film.
3. thin film transistor (TFT) according to claim 1 and 2, it is characterised in that the thickness of the conductive carbon film is 0.3~
1nm。
4. thin film transistor (TFT) according to claim 1, it is characterised in that the material of the active layer is metal oxide half
Conductor material.
5. thin-film transistor array base-plate according to claim 4, it is characterised in that the metal-oxide semiconductor (MOS) material
Material is selected from any one in ZnO, InZnO, ZnSnO, GaInZnO and ZrInZnO or two or more.
6. thin film transistor (TFT) according to claim 1, it is characterised in that the thin film transistor (TFT) is the film of bottom grating structure
Transistor；The gate electrode is formed on the underlay substrate, and gate insulator, the active layer are covered with the gate electrode
The top of the gate electrode is formed on the gate insulator and is located relatively at, the source electrode and drain electrode are spaced reciprocally
It is formed on the active layer.
7. the preparation method of a kind of thin film transistor (TFT) as described in claim 1-6 is any, it is characterised in that including step：
S1, offer underlay substrate simultaneously prepare the gate electrode to form patterning by first time patterning processes；
S2, on the underlay substrate prepare form gate insulator；
S3, on the gate insulator prepare the active layer to form patterning by second patterning processes；
S4, on the active layer prepare form conductive carbon film；
S5, the source electrode and drain electrode to form patterning are prepared by third time patterning processes on the conductive carbon film；Wherein,
The source electrode and drain electrode are set spaced reciprocally, and the active layer corresponds to the source electrode and drain electrode is spaced
Region forms channel region；
S6, removal obtain the thin film transistor (TFT) corresponding to the conductive carbon film above the channel region.
8. according to the preparation method of thin film transistor (TFT) as claimed in claim 7, it is characterised in that prepared on the active layer
The step of forming conductive carbon film specifically includes：
S41, one support substrate of offer, deposition forms conductive carbon film in the support substrate；
S42, by the conductive carbon film transfer be attached on the active layer；
S43, the removal support substrate.
9. according to the preparation method of thin film transistor (TFT) as claimed in claim 7, it is characterised in that in step S6, using etc. from
Daughter process of surface treatment or high-temperature heating removal are corresponding to the conductive carbon film above the channel region.
10. a kind of thin-film transistor array base-plate, including underlay substrate and array are arranged at the film on the underlay substrate
Transistor, each thin film transistor (TFT) is electrically connected with a pixel electrode, it is characterised in that the thin film transistor (TFT) is right
It is required that any described thin film transistor (TFT)s of 1-6.
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| US10600816B2 (en) | 2017-11-17 | 2020-03-24 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Array substrate comprising graphene conductive layer and manufacturing method of the same |
| WO2020082624A1 (en) * | 2018-10-26 | 2020-04-30 | 深圳市华星光电半导体显示技术有限公司 | Method for preparing thin film transistor array substrate |
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| CN102856364A (en) * | 2011-06-28 | 2013-01-02 | 三星电子株式会社 | Thin film transistor and method of manufacturing the same |
| CN104505405A (en) * | 2014-12-30 | 2015-04-08 | 京东方科技集团股份有限公司 | Thin-film transistor and preparing method thereof, array substrate and preparing method thereof, and display device |
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| CN102856364A (en) * | 2011-06-28 | 2013-01-02 | 三星电子株式会社 | Thin film transistor and method of manufacturing the same |
| CN104505405A (en) * | 2014-12-30 | 2015-04-08 | 京东方科技集团股份有限公司 | Thin-film transistor and preparing method thereof, array substrate and preparing method thereof, and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107946316A (en) * | 2017-11-17 | 2018-04-20 | 深圳市华星光电半导体显示技术有限公司 | The production method of array base palte, display panel and array base palte |
| WO2019095556A1 (en) * | 2017-11-17 | 2019-05-23 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, display panel and method for manufacturing array substrate |
| US10600816B2 (en) | 2017-11-17 | 2020-03-24 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Array substrate comprising graphene conductive layer and manufacturing method of the same |
| WO2020082624A1 (en) * | 2018-10-26 | 2020-04-30 | 深圳市华星光电半导体显示技术有限公司 | Method for preparing thin film transistor array substrate |
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