CN106875913A - Shift register cell and its driving method, gate driving circuit - Google Patents
Shift register cell and its driving method, gate driving circuit Download PDFInfo
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- CN106875913A CN106875913A CN201710266015.6A CN201710266015A CN106875913A CN 106875913 A CN106875913 A CN 106875913A CN 201710266015 A CN201710266015 A CN 201710266015A CN 106875913 A CN106875913 A CN 106875913A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- Crystallography & Structural Chemistry (AREA)
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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Abstract
This disclosure relates to a kind of shift register cell and its driving method, gate driving circuit.The shift register cell includes：Input module, transmits to pull-up node for responding input signal with by the first power supply signal；Pull-up module, for responding the first reference signal with by the first reference signal transmission to pull-down node, and response pull-up node voltage signal with by the second reference signal transmission to pull-down node；Drop-down module, pull-up node and signal output part are transmitted separately to for responding the voltage signal of pull-down node with by the second reference signal；Reseting module, for responding reset signal with by second source signal transmission to pull-up node；Output module, for responding the voltage signal of pull-up node with by clock signal transmission to signal output part；Compensating module, the output signal for response signal output end applies to signal output part with by thermal compensation signal.The disclosure can reduce the signal delay of shift register cell, so as to improve raster data model effect.
Description
Technical field
This disclosure relates to display technology field, more particularly to a kind of shift register cell and its driving method, grid drive
Dynamic circuit.
Background technology
With the development of optical technology and semiconductor technology, with liquid crystal display (Liquid Crystal Display,
LCD it is) that the flat-panel monitor of representative has that frivolous, energy consumption is low, reaction speed is fast, excitation is good and the features such as contrast high,
Leading position is occupied in display field.Display device presented high integration and the development of low cost becomes in the last few years
Gesture.(Gate Driver on Array, GOA) technology is driven for representative with array base palte row, using GOA technologies by raster data model
Circuit is integrated in the neighboring area of array base palte, can while narrow frame design is realized, effective lifting module process yields,
Lifting product yield and cost-effective.
The output signal of GOA circuits is to realize the key factor of normal display.Ideally, the output letter of GOA circuits
Number should be the rising time Tr (output signal increase to from 10% 90% time) of square-wave signal, i.e. output waveform and defeated
The trailing edge time Tf (output signal drops to for 10% time from 90%) for going out waveform is 0.Level link based on GOA circuits
Structure understands that in addition to the input signal of first order GOA unit is for an initial signal, the input signal of other GOA units at different levels is come
From the output signal of higher level's GOA unit.Signal output waveform figure with reference to shown in Fig. 1 understands, due to input signal step by step to
Cabling and many TFT very long can be flowed through during lower transmission, and RC retardation ratio inevitably causes input signal
Gradually decay, therefore be more proximate to the end of GOA circuits, signal delay is more serious, the waveform delay of output signal is also got over
Greatly, its shown as in figure the rising edge gradient increasingly delay, rising time Tr it is increasing.Based on this, in the signal period one
In the case of fixed, pixel can just be charged when the 90% of crest voltage is reached due to output signal, therefore signal delay will be straight
Cause the reduction of pixel charging time and pixel to charge insufficient is met, so as to cause the exception of display image.
It should be noted that information is only used for strengthening the reason of background of this disclosure disclosed in above-mentioned background section
Solution, therefore can include not constituting the information to prior art known to persons of ordinary skill in the art.
The content of the invention
The purpose of the disclosure is to provide a kind of shift register cell and its driving method, gate driving circuit, and then
At least overcome to a certain extent due to one or more problem caused by the limitation of correlation technique and defect.
Other characteristics and advantage of the disclosure will be apparent from by following detailed description, or partially by the disclosure
Practice and acquistion.
According to an aspect of this disclosure, there is provided a kind of shift register cell, including：
Input module, connection signal input part, the first power supply signal end and pull-up node, for responding input signal
Transmitted to the pull-up node with by the first power supply signal；
Pull-up module, the first reference signal end of connection, the pull-up node, pull-down node and the second reference signal end,
Saved with by first reference signal transmission to the pull-down node, and the response pull-up for responding the first reference signal
The voltage signal of point is with by the second reference signal transmission to the pull-down node；
Drop-down module, connects the pull-down node, the second reference signal end, the pull-up node and signal defeated
Go out end, the pull-up node is transmitted separately to by second reference signal for responding the voltage signal of the pull-down node
With the signal output part；
Reseting module, connection reset signal end, second source signal end and the pull-up node, resets for responding
Signal is with by second source signal transmission to the pull-up node；
Output module, connects the pull-up node, clock signal terminal and the signal output part, described for responding
The voltage signal of pull-up node is with by clock signal transmission to the signal output part；
Compensating module, connects thermal compensation signal end and the signal output part, the output for responding the signal output part
Signal applies to the signal output part with by thermal compensation signal.
In a kind of exemplary embodiment of the disclosure, the input module includes：
First switch element, its control end connect the signal input part, first end connect the first power supply signal end,
Second end connects the pull-up node；
The reseting module includes：
Second switch element, its control end connect the reset signal end, first end connect the second source signal end,
Second end connects the pull-up node；
The output module includes：
3rd switch element, its control end connects the pull-up node, first end and connects the clock signal terminal, the second end
Connect the signal output part；And,
Storage capacitance, is connected between the pull-up node and the signal output part.
In a kind of exemplary embodiment of the disclosure, the compensating module includes：
4th switch element, its control end connects the signal output part, first end and connects the thermal compensation signal end, second
The end connection signal output part.
In a kind of exemplary embodiment of the disclosure, the pull-up module includes：
5th switch element, its control end and first end connect the first reference signal end, the second end and connect drop-down control
Node processed；
6th switch element, its control end connects the drop-down control node, first end and connects first reference signal
End, the second end connect the pull-down node；
7th switch element, its control end connects the pull-up node, first end and connects the second reference signal end, the
Two ends connect the drop-down control node；
8th switch element, its control end connects the pull-up node, first end and connects the second reference signal end, the
Two ends connect the pull-down node.
In a kind of exemplary embodiment of the disclosure, the drop-down module includes：
9th switch element, its control end connects the pull-down node, first end and connects the second reference signal end, the
Two ends connect the pull-up node；
Tenth switch element, its control end connects the pull-down node, first end and connects the second reference signal end, the
Two ends connect the signal output part.
In a kind of exemplary embodiment of the disclosure, all switch elements are P-type transistor or are N-type crystalline substance
Body pipe.
In a kind of exemplary embodiment of the disclosure, first power supply signal and first reference signal are direct current
High level signal, the second source signal and second reference signal are direct current low level signal.
According to an aspect of this disclosure, there is provided a kind of gate driving circuit, including the above-mentioned displacement of multiple cascades is posted
Storage unit；Wherein,
The M-1 grades of signal output part of shift register cell connects the M grades of signal input part of shift register cell；
The M+1 grades of signal output part of shift register cell connects the M grades of reset signal end of shift register cell.
In a kind of exemplary embodiment of the disclosure, the scanning direction of the gate driving circuit and the thermal compensation signal
Compensation direction is opposite.
According to an aspect of this disclosure, there is provided a kind of driving method of shift register cell, including：
In the charging stage, input module is transmitted to pull-up node the first power supply signal under the control of input signal, on
Drawing-die block is under the control of the voltage signal of the pull-up node by the second reference signal transmission to pull-down node；
In output/compensated stage, output module passes clock signal under the control of the voltage signal of the pull-up node
Transport to signal output part, compensating module is transmitted to described thermal compensation signal under the control of the voltage signal of the signal output part
Signal output part, the signal output part exports gated sweep signal；
In reseting stage, reseting module is under the control of reset signal by second source signal transmission to the pull-up section
Point, the pull-up module under the control of the first reference signal by first reference signal transmission to the pull-down node, under
Second reference signal is transmitted separately to the pull-up section by drawing-die block under the control of the voltage signal of the pull-down node
Point and the signal output part.
Shift register cell and its driving method, gate driving circuit that disclosure illustrative embodiments are provided,
A compensating module is increased on the basis of conventional shift register cell, and the compensating module is arranged on signal output part.This
Sample one, when shift register cell be in the signal output stage when, thermal compensation signal can be applied directly to signal output part with
Compensation is synchronized to output signal.The applying of the thermal compensation signal, on the one hand can reduce the rise time of output signal so that
The delay reduction of output signal, so as to ensure the charging interval of pixel, on the other hand can improve the voltage peak of output signal,
Reduce the decay of output signal, so as to ensure the fully charged of pixel.
It should be appreciated that the general description of the above and detailed description hereinafter are only exemplary and explanatory, not
The disclosure can be limited.
Brief description of the drawings
Accompanying drawing herein is merged in specification and constitutes the part of this specification, shows the implementation for meeting the disclosure
Example, and it is used to explain the principle of the disclosure together with specification.It should be evident that drawings in the following description are only the disclosure
Some embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
These accompanying drawings obtain other accompanying drawings.
Fig. 1 schematically shows the oscillogram of output signal in the prior art；
Fig. 2 schematically shows the circuit structure diagram of shift register cell in disclosure exemplary embodiment；
Fig. 3 schematically shows the clock signal figure of shift register cell in disclosure exemplary embodiment；
Fig. 4 schematically shows the level link composition of gate driving circuit in disclosure exemplary embodiment.
Specific embodiment
Example embodiment is described more fully with referring now to accompanying drawing.However, example embodiment can be with various shapes
Formula is implemented, and is not understood as limited to example set forth herein；Conversely, thesing embodiments are provided so that the disclosure will more
Fully and completely, and by the design of example embodiment those skilled in the art is comprehensively conveyed to.Described feature, knot
Structure or characteristic can be combined in one or more implementation methods in any suitable manner.
Additionally, accompanying drawing is only the schematic illustrations of the disclosure, it is not necessarily drawn to scale.Identical accompanying drawing mark in figure
Note represents same or similar part, thus will omit repetition thereof.Some block diagrams shown in accompanying drawing are work(
Energy entity, not necessarily must be corresponding with physically or logically independent entity.These work(can be realized using software form
Energy entity, or these functional entitys are realized in one or more hardware modules or integrated circuit, or at heterogeneous networks and/or place
These functional entitys are realized in reason device device and/or microcontroller device.
This example embodiment proposes a kind of shift register cell, for providing gate drive signal；Such as Fig. 2 institutes
Show, the shift register cell can include：
Input module 10, connection signal input part Input, the first power supply signal end VDD and pull-up node PU, is used for
Response input signal is transmitted to pull-up node PU with by the first power supply signal；
Pull-up module 20, the first reference signal end VGH of connection, pull-up node PU, pull-down node PD and second are with reference to letter
Number end VGL, for responding the first reference signal with by the first reference signal transmission to pull-down node PD, and response pull-up node
The voltage signal of PU is with by the second reference signal transmission to pull-down node PD；
Drop-down module 30, connection pull-down node PD, the second reference signal end VGL, pull-up node PU and signal output part
Output, pull-up node PU and signal are transmitted separately to for responding the voltage signal of pull-down node PD with by the second reference signal
Output end Output；
Reseting module 40, connection reset signal end Reset, second source signal end VSS and pull-up node PU, is used for
Response reset signal is with by second source signal transmission to pull-up node PU；
Output module 50, connection pull-up node PU, clock signal terminal CLK and signal output part Output, for responding
The voltage signal of pull-up node PU is with by clock signal transmission to signal output part Output；
Compensating module 60, connects thermal compensation signal end VC and signal output part Output, for response signal output end
The output signal of Output applies to signal output part Output with by thermal compensation signal.
It should be noted that：The input signal is the voltage signal of signal input part Input, first power supply signal
It is the voltage signal of the first power supply signal end VDD, the reset signal is the voltage signal of reset signal end Reset, described the
Two power supply signals are the voltage signal of second source signal end VSS, and the clock signal is believed for the voltage of clock signal terminal CLK
Number, the thermal compensation signal is the voltage signal of thermal compensation signal end VC, and first reference signal is the first reference signal end VGH
Voltage signal, second reference signal is the voltage signal of the second reference signal end VGL.
The shift register cell that disclosure illustrative embodiments are provided, on the basis of conventional shift register cell
On increased a compensating module 60, and the compensating module 60 is arranged on signal output part Output.So, shift LD is worked as
When device unit is in the signal output stage, thermal compensation signal can be applied directly to signal output part Output and enter with to output signal
Row synchroballistic.On the one hand, the applying of the thermal compensation signal can reduce the rise time of output signal so that output signal is prolonged
Reduce late, so as to ensure the charging interval of pixel, while the crest voltage of output signal can also be improved, reduce output signal
Decay, so as to ensure the fully charged of pixel；On the other hand, because compensating module 60 is controlled by the defeated of signal output part Output
Go out signal, therefore compensation will be stopped when the output of shift register cell is closed, so as to avoid pixel from overcharging or electric current
The phenomenon of leakage.
In this example embodiment, first power supply signal of the first power supply signal end VDD and described first is with reference to letter
First reference signal of number end VGH can be direct current high level signal, and the second source of the second source signal end VSS
Second reference signal of signal and the second reference signal end VGL can be direct current low level signal.
Wherein, first power supply signal is used to charge pull-up node PU, and the second source signal is used for pull-up
Node PU discharges, and first reference signal is used to provide high level signal for pull-up module 20, and second reference signal is used
In be pull-up module 20 and drop-down module 30 provide low level signal.
It should be noted that：First power supply signal and first reference signal can be connected to same high level letter
Number end or be connected to different high level signal ends, the second source signal and second reference signal can be connected to
Same low level signal end is connected to different low level signal ends, as long as ensure that the effect of each functional module i.e.
Can, this example embodiment is not specifically limited for the connected mode at each power supply signal end and reference signal end.
The structure of the shift register cell in this example embodiment is described in detail below in conjunction with Fig. 2.
The input module 10 can include：
First switch element M1, its control end connection signal input part Input, first end connect the first power supply signal end
VDD, the second end connect pull-up node PU.
The reseting module 40 can include：
Second switch element M2, its control end connection reset signal end Reset, first end connection second source signal end
VSS, the second end connect pull-up node PU.
The output module 50 can include：
3rd switch element M3, its control end connection pull-up node PU, first end connection clock signal terminal CLK, the second end
Connection signal output part Output；And,
Storage capacitance C, it is connected between pull-up node PU and signal output part Output.
The compensating module 60 can include：
4th switch element M4, its control end connection signal output part Output, first end connection thermal compensation signal end VC, the
Two ends connect signal output part Output.
The pull-up module 20 can include：
5th switch element M5, its control end and first end connect the first reference signal end VGH, the second end and connect drop-down control
Node PD-CN processed；
6th switch element M6, its control end connects drop-down control node PD-CN, first end and connects the first reference signal end
VGH, the second end connect pull-down node PD；
7th switch element M7, its control end connection pull-up node PU, first end connect the second reference signal end VGL, the
Two ends connect drop-down control node PD-CN；
8th switch element M8, its control end connection pull-up node PU, first end connect the second reference signal end VGL, the
Two ends connect pull-down node PD.
The drop-down module 30 can include：
9th switch element M9, its control end connection pull-down node PD, first end connect the second reference signal end VGL, the
Two ends connect pull-up node PU；
Tenth switch element M10, its control end connection pull-down node PD, first end connect the second reference signal end VGL, the
Two ends connect signal output part Output.
In this example embodiment, all switch elements can be P-type transistor or be N-type transistor.
Specifically, all switch elements can use MOS (Metal Oxide Semiconductor, metal-oxide-partly lead
Body field-effect transistor) field-effect transistor, it can specifically use N-type metal-oxide-semiconductor using p-type metal-oxide-semiconductor or.Need
Bright is：For different transistor types, the level signal of each signal end needs corresponding adjustment change.
Below so that all switch elements are NMOS as an example, with reference to Fig. 2 and Fig. 3 to the shift register cell of the present embodiment
The course of work be specifically described.Wherein, the first power supply signal and the first reference signal are high level signal, second source
Signal and the second reference signal are low level signal.
Charging stage：Input signal is high level, and first switch element M1 conductings are with supreme by the transmission of the first power supply signal
Draw node PU and storage capacitance C is charged, then pull-up node PU is high level；At the same time, in the effect of the first reference signal
Under, the 5th switch element M5 conductings cause the 6th switch with by the first reference signal transmission to drop-down control node PD-CN
Element M6 conductings are with by the first reference signal transmission to pull-down node PD；But under the high level effect of pull-up node PU, the 7th
Switch element M7 and the 8th switch element M8 conducting with by the second reference signal be transmitted separately to drop-down control node PD-CN and under
Node PD is drawn, so as to drag down the level of drop-down control node PD-CN and pull-down node PD.
Output/compensated stage：Clock signal is high level, and pull-up node PU keeps electricity high in the presence of storage capacitance C
Flat, the 3rd switch element M3 is turned on and by the boot strap of storage capacitance C so that pull-up node PU has current potential higher, then
3rd switch element M3 is sufficiently conductive with by clock signal transmission to signal output part Output；Thermal compensation signal is high level,
Under the high level effect of signal output part Output, the 4th switch element M4 conductings are transmitted to signal output part with by thermal compensation signal
Output is compensated to output signal, so as to realize this grade of signal output of shift register cell.
Reseting stage：Reset signal is high level, second switch element M2 conductings with by second source signal to storage
Electric capacity C is discharged, and with the carrying out of electric discharge, the voltage of pull-up node PU is reduced, then the switches of the 7th switch element M7 and the 8th unit
Part M8 is closed；In the presence of the first reference signal, the 5th switch element M5 conductings with by the first reference signal transmission to drop-down
Control node PD-CN, and then the 6th switch element M6 conductings are caused with by the first reference signal transmission to pull-down node PD, so that
Draw high the level of pull-down node PD；Under the high level effect of pull-down node PD, the 9th switch element M9 and the tenth switch element
M10 conductings are transmitted separately to pull-up node PU and signal output part Output with by the second reference signal, so as to realize pull-up section
The reset of point PU and signal output part Output.
Understood based on the above-mentioned course of work, in the signal output stage of shift register cell, by signal output
End Output applies thermal compensation signal to realize the synchroballistic to output signal, you can reduce the delay and decay of output signal.
With reference to shown in Fig. 1, functioning as the thermal compensation signal is defeated in signal at first in the rising time Tr of output waveform
Go out to hold Output to apply thermal compensation signal, so that the voltage signal of reality output can rapidly from 10% increasing of crest voltage Vmax
90% is added to, rising time Tr is greatly shortened, so as to ensure that the charging interval of pixel.
It should be noted that：The thermal compensation signal is used to compensate the output signal of signal output part Output, its
Magnitude of voltage should be set greater than or equal to the 90% of crest voltage, and guarantee will not puncture the 4th transistor.
A kind of gate driving circuit is additionally provided in this example embodiment, as shown in figure 4, the gate driving circuit can
With the above-mentioned shift register cell including multiple cascades；Wherein, the M-1 grades of signal output part of shift register cell
Output connects the M grades of signal input part Input of shift register cell；The signal of M+1 grades of shift register cell is defeated
Go out to hold Output to connect the M grades of reset signal end Reset of shift register cell.
It should be noted that：The scan mode of the gate driving circuit can use forward scan or scanning direction,
The present embodiment is not especially limited to this.
On this basis, it is contemplated that in the cascade structure of gate driving circuit, near front end attenuated output signal compared with
Small, the attenuated output signal near end is larger, thus this example embodiment preferably the gate driving circuit scanning side
To opposite with the compensation direction of the thermal compensation signal.That is, when gate driving circuit uses forward scan, the thermal compensation signal
Direction is for from bottom to top；When gate driving circuit uses reverse scan, the direction of the thermal compensation signal is for from top to bottom.
Based on this compensation way, in the front end of gate driving circuit, the decay of output signal is smaller, thermal compensation signal to decline
Subtract larger, and in the end of gate driving circuit, larger, thermal compensation signal the decay of decay of output signal is smaller, so
The output signals at different levels of the gate driving circuit are balanced, improves raster data model ability, so as to ensure display effect.
It should be noted that：The detail of each modular unit in the gate driving circuit is in corresponding displacement
It is described in detail in register cell, therefore is repeated no more here.
This example embodiment also proposed a kind of display panel, including viewing area and neighboring area.The display surface
The neighboring area of plate can set above-mentioned gate driving circuit.The viewing area of the display panel can interlock including transverse and longitudinal
A plurality of grid line and a plurality of data lines, and multiple pixel cells limited by the adjacent grid line and the adjacent data wire：
Wherein, the grid line is used to transmit the scanning signal that the gate driving circuit is provided, and the data wire is used to transmit source electrode drive
The data-signal that dynamic circuit is provided.
Gate driving circuit is integrated in this example embodiment the periphery of display panel using GOA technologies, so as in reality
While existing narrow frame panel is designed, manufacturing cost, the process yields of lifting display module of display panel can be also effectively reduced.
In this example embodiment, the display panel is specifically as follows LCD display panel, OLED display panel, PLED
(Polymer Light-Emitting Diode, polymer LED) display panel, PDP (Plasma Display
Panel, Plasmia indicating panel) etc., specific limitation is not done for the applicable of display panel here.
This example embodiment also provides a kind of display device, including above-mentioned display panel.Wherein, the display device
For example can be any with display function including mobile phone, panel computer, television set, notebook computer, DPF, navigator etc.
Product or part.
Although it should be noted that being referred to some modules or list of the equipment for action executing in above-detailed
Unit, but this division is not enforceable.In fact, according to embodiment of the present disclosure, it is above-described two or more
The feature and function of module or unit can embody in a module or unit.Conversely, an above-described mould
The feature and function of block or unit can be further divided into being embodied by multiple modules or unit.
Additionally, although each step of method in the disclosure is described with particular order in the accompanying drawings, this does not really want
Asking or imply must perform these steps according to the particular order, or the step having to carry out shown in whole could be realized
Desired result.It is additional or alternative, it is convenient to omit some steps, multiple steps are merged into a step and is performed, and/
Or a step is decomposed into execution of multiple steps etc..
Through the above description of the embodiments, those skilled in the art is it can be readily appreciated that example described herein is implemented
Mode can be realized by software, it is also possible to be realized by way of software is with reference to necessary hardware.Therefore, according to the disclosure
The technical scheme of implementation method can be embodied in the form of software product, and the software product can store non-volatile at one
Property storage medium (can be CD-ROM, USB flash disk, mobile hard disk etc.) in or network on, including some instructions are causing a calculating
Equipment (can be personal computer, server, mobile terminal or network equipment etc.) is performed according to disclosure implementation method
Method.
Those skilled in the art will readily occur to its of the disclosure after considering specification and putting into practice invention disclosed herein
Its embodiment.The application is intended to any modification, purposes or the adaptations of the disclosure, these modifications, purposes or
Person's adaptations follow the general principle of the disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.Description and embodiments are considered only as exemplary, and the true scope of the disclosure and spirit are by appended
Claim is pointed out.
Claims (10)
1. a kind of shift register cell, it is characterised in that including：
Input module, connection signal input part, the first power supply signal end and pull-up node, for responding input signal to incite somebody to action
First power supply signal is transmitted to the pull-up node；
Pull-up module, the first reference signal end of connection, the pull-up node, pull-down node and the second reference signal end, is used for
The first reference signal is responded with by first reference signal transmission to the pull-down node, and responds the pull-up node
Voltage signal is with by the second reference signal transmission to the pull-down node；
Drop-down module, connects the pull-down node, the second reference signal end, the pull-up node and signal output part,
For responding the voltage signal of the pull-down node pull-up node and institute are transmitted separately to by second reference signal
State signal output part；
Reseting module, connection reset signal end, second source signal end and the pull-up node, for responding reset signal
With by second source signal transmission to the pull-up node；
Output module, connects the pull-up node, clock signal terminal and the signal output part, for responding the pull-up
The voltage signal of node is with by clock signal transmission to the signal output part；
Compensating module, connects thermal compensation signal end and the signal output part, the output signal for responding the signal output part
Apply to the signal output part with by thermal compensation signal.
2. shift register cell according to claim 1, it is characterised in that the input module includes：
First switch element, its control end connects the signal input part, first end and connects the first power supply signal end, second
The end connection pull-up node；
The reseting module includes：
Second switch element, its control end connects the reset signal end, first end and connects the second source signal end, second
The end connection pull-up node；
The output module includes：
3rd switch element, its control end connects the pull-up node, first end and connects the clock signal terminal, the connection of the second end
The signal output part；And,
Storage capacitance, is connected between the pull-up node and the signal output part.
3. shift register cell according to claim 1, it is characterised in that the compensating module includes：
4th switch element, its control end connects the signal output part, first end and connects the thermal compensation signal end, the second end company
Connect the signal output part.
4. shift register cell according to claim 1, it is characterised in that the pull-up module includes：
5th switch element, its control end and first end connect the first reference signal end, the drop-down control section of the second end connection
Point；
6th switch element, its control end connects the drop-down control node, first end and connects the first reference signal end, the
Two ends connect the pull-down node；
7th switch element, its control end connects the pull-up node, first end and connects the second reference signal end, the second end
Connect the drop-down control node；
8th switch element, its control end connects the pull-up node, first end and connects the second reference signal end, the second end
Connect the pull-down node.
5. shift register cell according to claim 1, it is characterised in that the drop-down module includes：
9th switch element, its control end connects the pull-down node, first end and connects the second reference signal end, the second end
Connect the pull-up node；
Tenth switch element, its control end connects the pull-down node, first end and connects the second reference signal end, the second end
Connect the signal output part.
6. the shift register cell according to claim any one of 2-5, it is characterised in that all switch elements are equal
For P-type transistor or it is N-type transistor.
7. the shift register cell according to claim any one of 1-5, it is characterised in that first power supply signal and
First reference signal is direct current high level signal, and the second source signal and second reference signal are direct current
Low level signal.
8. a kind of gate driving circuit, it is characterised in that the displacement described in the claim any one of 1-7 including multiple cascades is posted
Storage unit；Wherein,
The M-1 grades of signal output part of shift register cell connects the M grades of signal input part of shift register cell；
The M+1 grades of signal output part of shift register cell connects the M grades of reset signal end of shift register cell.
9. gate driving circuit according to claim 8, it is characterised in that the scanning direction of the gate driving circuit with
The compensation direction of the thermal compensation signal is opposite.
10. a kind of driving method of shift register cell, it is characterised in that including：
In the charging stage, input module is transmitted to pull-up node the first power supply signal under the control of input signal, upper drawing-die
Block is under the control of the voltage signal of the pull-up node by the second reference signal transmission to pull-down node；
In output/compensated stage, output module under the control of the voltage signal of the pull-up node by clock signal transmission extremely
Signal output part, compensating module is transmitted to the signal thermal compensation signal under the control of the voltage signal of the signal output part
Output end, the signal output part exports gated sweep signal；
In reseting stage, reseting module is under the control of reset signal by second source signal transmission to the pull-up node, institute
Pull-up module is stated under the control of the first reference signal by first reference signal transmission to the pull-down node, drop-down module
Second reference signal is transmitted separately to the pull-up node and institute under the control of the voltage signal of the pull-down node
State signal output part.
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| CN201710266015.6A CN106875913A (en) | 2017-04-21 | 2017-04-21 | Shift register cell and its driving method, gate driving circuit |
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| CN201710266015.6A CN106875913A (en) | 2017-04-21 | 2017-04-21 | Shift register cell and its driving method, gate driving circuit |
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Application publication date: 20170620 |