CN106841973B - Logic testing device and method - Google Patents

Logic testing device and method Download PDF

Info

Publication number
CN106841973B
CN106841973B CN201510884678.5A CN201510884678A CN106841973B CN 106841973 B CN106841973 B CN 106841973B CN 201510884678 A CN201510884678 A CN 201510884678A CN 106841973 B CN106841973 B CN 106841973B
Authority
CN
China
Prior art keywords
module
test
programmable gate
gate array
array processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201510884678.5A
Other languages
Chinese (zh)
Other versions
CN106841973A (en
Inventor
孙轶群
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Shengdejin Technology Co ltd
Original Assignee
Shenzhen Shengdejin Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Shengdejin Technology Co ltd filed Critical Shenzhen Shengdejin Technology Co ltd
Priority to CN201510884678.5A priority Critical patent/CN106841973B/en
Publication of CN106841973A publication Critical patent/CN106841973A/en
Application granted granted Critical
Publication of CN106841973B publication Critical patent/CN106841973B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31718Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention discloses a logic testing device and a logic testing method, wherein the logic testing device comprises a configuration storage module, a programmable gate array processing module, a tested device signal interface module, a data transmission interface module, a tested device power supply module, a display interface module and a light emitting module; the programmable gate array processing module is respectively connected with the configuration storage module, the tested device signal interface module, the data transmission interface module, the tested device power supply module, the display interface module and the light emitting module. The invention can realize the technical effects of flexibly adjusting the signal bandwidth of the test channel, independently opening the logic test process and the test example downloading process, reducing the volume of the test equipment, reducing the requirements of operators, reducing the test cost and improving the flexibility of the use of the equipment.

Description

Logic testing device and method
Technical Field
The invention relates to a logic testing device and a logic testing method.
Background
The board test environment of a circuit board is often relatively simple for cost control reasons. The main electric signal test equipment on the market at present occupies a large amount of test land due to more functions, large volume and high cost, and meanwhile, the main electric signal test equipment also needs computer control, has higher quality requirements on control personnel, and causes improvement of test cost.
The edwan test (china) management limited company and related parent and subsidiary companies are first-class companies that are internationally engaged in the development and sales of automatic test equipment for semiconductors and electronic logic signals. The product can download test stimulus to the test equipment through the computer/server/workstation with the operating system, test the equipment to be tested (DUT for short, design Under Test) to judge whether the equipment to be tested is correct or incorrect, and compare the actual signal generated by the DUT with the expected signal on the computer/server/workstation with the operating system to display the actual signal for debugging.
The method is a very perfect test method, but the equipment is large in size and not easy to move. The test case loading and monitoring needs to be downloaded to the equipment by using a computer/server/workstation with an operating system through a special communication channel such as a serial port, USB, PCI and other interfaces, the process needs to prepare a space for placing the computer/server/workstation on the side of a test machine, the operation flow is complex, and the requirement on the quality of operators is high. In some simple electrical signal testing procedures, a significant cost is added.
Disclosure of Invention
The invention aims to provide a logic testing device and a logic testing method, which are used for solving the technical problems that the testing device is complex to control, occupies large volume and cannot be flexibly configured.
In order to achieve the above object, the present invention provides a logic test device, including a configuration storage module, a programmable gate array processing module, a signal interface module of a device under test, and a light emitting module;
the configuration storage module is used for solidifying and storing the measurement examples and the configuration files;
the programmable gate array processing module is used for sending and processing the test signals;
the signal interface module of the tested device is used for receiving the signal fed back by the tested device and sending a test signal to the tested device;
the light-emitting module is used for giving out corresponding light-emitting prompts according to the test results;
the configuration storage module is connected with the programmable gate array processing module, and the programmable gate array processing module is respectively connected with the signal interface module and the light emitting module of the tested device.
Further, the logic testing device also comprises a data transmission interface module, a storage module, a button module and a function selection module;
the data transmission interface module is used for data communication between the logic testing device and the computer;
the storage module is used for storing the test cases in an external test case downloading mode by the logic test device;
the button module is used for controlling the logic testing device to start or stop testing in a manual testing mode;
the function selection module is used for controlling the logic testing device to be in a certain download state or a certain testing state;
the data transmission interface module is connected with the programmable gate array processing module, the storage module is connected with the programmable gate array processing module, the button module is connected with the programmable gate array processing module, and the function selection module is connected with the programmable gate array processing module.
Further, the logic test device also comprises a power supply module of the tested device,
the tested device power supply module is used for directly supplying power to the tested device;
the tested device power supply module is connected with the programmable gate array processing module.
Further, the logic test device also comprises a display interface module,
the display interface module is used for externally connecting a display device and transmitting the test result to the display device for display through the display interface module;
the display interface module is connected with the programmable gate array processing module.
Further, the logic test device also comprises an expansion interface module,
the expansion interface module is used for providing a function expansion interface for the logic testing device;
the expansion interface module is connected with the programmable gate array processing module.
Further, the data transmission interface module is a universal asynchronous receiver transmitter interface module.
Further, the function selection module is a dial switch.
On the other hand, the invention provides a logic testing method, which uses a logic testing device to test, and comprises the following specific steps:
step S1: connecting the tested device with a logic testing device;
step S2: setting the programmable gate array processing module to a test case downloading state through a function selecting module;
step S3: sending the test cases to a programmable gate array processing module;
step S4: the programmable gate array processing module stores the measured example;
step S5: setting the programmable gate array processing module to a test case test state through a function selection module;
step S6: the programmable gate array processing module acquires a test case;
step S7: the programmable gate array processing module sends the measured example to the signal interface module of the tested device;
step S8: the signal interface module of the tested device sends the test case to the tested device;
step S9: the tested device responds to the test case and sends feedback information to the signal interface module of the tested device;
step S10: the signal interface module of the tested device sends feedback information to the programmable gate array processing module;
step S11: the programmable gate array processing module compares the feedback information with preset comparison information;
if the comparison results are the same, the tested device passes the test of the test example;
if the comparison results are different, the tested device fails the test of the test example;
step S12: the programmable gate array processing module judges whether the test is completed;
if not, executing step S6;
if the acquisition is completed, the test is completed.
Further, the setting of the programmable gate array processing module in the step S2 to the case download state includes;
an external test case download mode;
internal test case download mode.
Further, the method for saving the measurement example by the programmable gate array processing module in the step S4 includes;
if the programmable gate array processing module is in an external test case downloading mode, saving the test case into the storage module;
if the programmable gate array processing module is in the internal test case downloading mode, the test case is stored in the configuration storage module.
Further, the setting of the programmable gate array processing module in the step S5 to the case test state includes;
an external test pattern;
an internal test pattern;
a manual external test pattern;
manual internal test case mode.
Further, the method for obtaining a test case by the programmable gate array processing module in the step S6 includes;
if the programmable gate array processing module is in an external test case test mode, the programmable gate array processing module acquires a test case from the memory module through the memory module interface;
if the programmable gate array processing module is in the internal test case test mode, the programmable gate array processing module acquires a test case from the configuration storage module through the configuration storage module interface;
if the programmable gate array processing module is in a manual external test mode,
when the button module is pressed down, the programmable gate array processing module acquires a test case from the storage module through the storage module interface;
when the button module is released, the logic testing device stops testing;
if the programmable gate array processing module is in a manual internal test mode,
when the button module is pressed down, the programmable gate array processing module acquires a measurement from the configuration storage module through the configuration storage module interface;
when the button module is released, the logic test device stops testing.
Compared with the prior art, the invention has the beneficial effects that:
1. the technical scheme that the programmable gate array processing module is used as a main chip for testing is adopted, so that the technical effect of flexibly adjusting the signal bandwidth of the test channel is achieved;
2. the technical scheme of downloading the test cases into the programmable gate array processing module by using the data transmission interface module obtains the technical effects of independently opening the logic test process and the test case downloading process, reducing the volume of test equipment, reducing the requirements of operators, reducing the test cost and improving the flexibility of equipment use;
3. by adopting the technical scheme of adding the power supply module of the tested device, the technical effect that an external power supply for the tested device is not needed is obtained, and the flexibility of the equipment use is better improved.
4. By using the technical scheme of adding the display interface module, the technical effect that the test result is not required to be displayed through other equipment and the monitoring test is convenient is obtained.
Drawings
FIG. 1 is a block diagram of a logic test device of the present invention;
FIG. 2 is another block diagram of the logic test device of the present invention;
FIG. 3 is a block diagram of an embodiment of a logic test device of the present invention;
FIG. 4 is a flow chart of a logic test method of the present invention;
FIG. 5 is a flow chart of a logic test method according to an embodiment of the present invention.
In the figure:
configuring a storage module 1; a programmable gate array processing module 2; a device under test signal interface module 3; a light emitting module 4; a data transmission interface module 5; a storage module 6; a button module 7; a function selection module 8; a device under test power supply module 9; a display interface module 10; the interface module 11 is extended.
Detailed Description
The invention will be further described with reference to the drawings and the specific examples.
Example 1:
as shown in fig. 1, the logic test device of the present invention includes a configuration storage module 1, a programmable gate array processing module 2, a device under test signal interface module 3, and a light emitting module 4;
the configuration storage module 1 is used for solidifying and storing the measurement examples and the configuration files;
the programmable gate array processing module 2 is used for sending and processing the test signals;
the tested device signal interface module 3 is used for receiving the signal fed back by the tested device and sending a test signal to the tested device;
the light-emitting module 4 is used for giving out corresponding light-emitting prompts according to the test results;
the configuration storage module 1 is connected with the programmable gate array processing module 2, and the programmable gate array processing module 2 is respectively connected with the tested device signal interface module 3 and the light emitting module 4.
As shown in fig. 4, the logic test method of the present invention includes the following steps:
step S1: connecting the tested device with a logic testing device;
step S2: setting the programmable gate array processing module 2 to a test case download state by the function selecting module 8;
step S3: sending the test cases to the programmable gate array processing module 2
Step S4: the programmable gate array processing module 2 stores the measurement example;
step S5: setting the programmable gate array processing module 2 to a test case test state through the function selecting module 8;
step S6: the programmable gate array processing module 2 obtains a measurement,
step S7: the programmable gate array processing module 2 sends the measured example to the signal interface module 3 of the tested device;
step S8: the tested device signal interface module 3 sends the test example to the tested device;
step S9: the tested device responds to the test case and sends feedback information to the tested device signal interface module 3;
step S10: the tested device signal interface module 3 sends feedback information to the programmable gate array processing module 2;
step S11: the programmable gate array processing module 2 compares the feedback information with preset comparison information;
if the comparison results are the same, the tested device passes the test of the test example;
if the comparison results are different, the tested device fails the test of the test example;
step S12: the programmable gate array processing module 2 judges whether the test is completed;
if not, executing step S6;
if the acquisition is completed, the test is completed.
In particular, in connection with fig. 1 and 4, the required measurements are downloaded into the configuration storage module 1 therein before the logic test device is used. After the logic test device is electrified, the test cases in the configuration storage module 1 are read into the programmable gate array processing module 2, the programmable gate array processing module 2 sends the test cases to the tested device one by one through the tested device signal interface module 3, the tested device signal interface module 3 sends information fed back by the tested device to the programmable gate array processing module 2, and the programmable gate array processing module 2 compares the feedback information with the expected set value and indicates the result through the light emitting module 4.
Example 2:
as shown in fig. 2, the logic test device is further embodied on the basis of embodiment 1, and further includes a data transmission interface module 5, a storage module 6, a button module 7, and a function selection module 8;
a data transmission interface module 5 for data communication between the logic test device and the computer;
the storage module 6 is used for storing the test cases in the external test case downloading mode by the logic test device;
the button module 7 is used for controlling the logic testing device to start or stop testing in a manual testing mode;
a function selecting module 8, configured to control the logic testing device to be in a certain download state or a certain testing state;
the data transmission interface module 5 is connected with the programmable gate array processing module 2, the storage module 6 is connected with the programmable gate array processing module 2, the button module 7 is connected with the programmable gate array processing module 2, and the function selection module 8 is connected with the programmable gate array processing module 2.
As shown in fig. 5, the logic test method is further embodied on the basis of embodiment 1, and the specific steps are as follows:
step A1: connecting the tested device with a logic testing device;
step A2: setting the programmable gate array processing module 2 to an external test downloading mode or an internal test downloading mode through the function selecting module 8;
step A3: sending the test cases to the programmable gate array processing module 2
Step A4: the programmable gate array processing module 2 stores the test cases according to the downloading mode;
if the programmable gate array processing module 2 is in the external test case downloading mode, the test case is stored in the storage module 6;
if the programmable gate array processing module 2 is in the internal test case downloading mode, saving the test case into the configuration storage module 1;
step A5: the programmable gate array processing module 2 is set to one of an external case test mode, an internal case test mode, a manual external case test mode and a manual internal case test mode by the function selection module 8;
step A6: the programmable gate array processing module 2 performs a test according to the test mode;
if the programmable gate array processing module 2 is in the external test mode, the programmable gate array processing module 2 obtains a test case from the memory module 6 through the memory module interface;
if the programmable gate array processing module 2 is in the internal test case test mode, the programmable gate array processing module 2 acquires a test case from the configuration storage module 1 through the configuration storage module interface;
if the programmable gate array processing module 2 is in a manual external test mode,
when the button module 7 is pressed down, the programmable gate array processing module 2 acquires a measurement from the memory module 6 through the memory module interface;
when the button module 7 is released, the logic test device stops testing;
if the programmable gate array processing module 2 is in a manual internal test mode,
when the button module 7 is pressed, the programmable gate array processing module 2 acquires a measurement from the configuration storage module 1 through the configuration storage module interface;
when the button module 7 is released, the logic test device stops testing;
step A7: the programmable gate array processing module 2 sends the measured example to the signal interface module 3 of the tested device;
step A8: the tested device signal interface module 3 sends the test example to the tested device;
step A9: the tested device responds to the test case and sends feedback information to the tested device signal interface module 3;
step A10: the tested device signal interface module 3 sends feedback information to the programmable gate array processing module 2;
step A11: the programmable gate array processing module 2 compares the feedback information with preset comparison information;
if the comparison results are the same, the tested device passes the test of the test example;
if the comparison results are different, the tested device fails the test of the test example;
step A12: the programmable gate array processing module 2 judges whether the test is completed;
if not, executing the step A6;
if the acquisition is completed, the test is completed.
Specifically, with reference to fig. 2 and 5, step A2 in embodiment 2 corresponds to step S2 in embodiment 1; step A4 corresponds to step S4; step A5 corresponds to step S5; step A6 corresponds to step S6.
The logic test device is provided with two downloading modes and three working modes; the download and working modes are selected by a function selection module 8, and the function selection module 8 can be a dial switch; for example, "001" indicates an external case download mode; "09" indicates the internal case download mode; a 010 external test pattern; "90" internal test case test mode; "91" manual external test case test mode; "19" manual internal test case test mode. The concrete explanation is as follows:
external test case download mode:
the test cases are edited on the computer and downloaded to the logic test device through the data transmission interface module 5, the data transmission interface module 5 receives the test cases and transmits the test cases to the programmable gate array processing module 2 one by one, and the test cases are transmitted to the storage module 6 for storage under the management of a logic circuit designed in the programmable gate array processing module 2.
Internal test case download mode:
editing the test case on the computer and passing through a debugging channel; for example: test Action Group (JTAG) solidifies the test cases in configuration memory module 1.
External test case test mode:
after the logic test device is powered on, the programmable gate array processing module 2 acquires all the test cases from the storage module 6 through the memory interface, and sends the test cases to the tested device one by one through the tested device signal interface module 3, the tested device signal interface module 3 sends information fed back by the tested device to the programmable gate array processing module 2, and the programmable gate array processing module 2 compares the feedback information with the expected set value and displays the result through the light emitting module 4.
Internal test case test mode:
after the logic test device is powered on, the programmable gate array processing module 2 acquires all the test cases in the configuration storage module 1, and sends the test cases to the tested device one by one through the tested device signal interface module 3, the tested device signal interface module 3 sends information fed back by the tested device to the programmable gate array processing module 2, and the programmable gate array processing module 2 compares the feedback information with an expected set value and displays the result through the light emitting module 4.
Manual test mode:
the manual test mode is divided into two types, one is a manual external test mode and the other is a manual internal test mode.
After the logic testing device is powered on, the logic testing device does not directly perform testing, but waits for a tester to press the button module 7, and when the tester presses the button module 7, a corresponding manual testing specific test mode is selected according to the dial switch. When the tester releases the button module 7, the test is stopped.
Example 3:
as shown in fig. 3, the logic test device is further embodied on the basis of embodiment 2, and further includes a device under test power supply module 9, a display interface module 10 and an expansion interface module 11,
the tested device power supply module 9 is used for directly supplying power to the tested device;
the display interface module 10 is used for externally connecting a display device and transmitting the test result to the display device for display through the display interface module;
an expansion interface module 11 for providing a function expansion interface for the logic test device;
the power supply module 9 of the tested device is respectively connected with the power supply module 1 and the programmable gate array processing module 2, the display interface module 10 is connected with the programmable gate array processing module 2, and the expansion interface module 11 is connected with the programmable gate array processing module 2;
specifically, the power supply module 9 of the tested device is added in the logic testing device, so that the logic testing device can directly supply power to the tested device under the condition that the power supply to the tested device cannot be supplied or is inconvenient, and the use flexibility of the logic testing device is improved. The display interface module 10 is added in the logic test device, so that the external display device can be conveniently connected, the test process and the test result can be visually displayed through the display device by the display interface module 10, and the control of the test process and the test result by a tester is convenient. The expansion interface module 11 can enable the logic test device to have an expansion function, such as an expansion voice prompt function, so that the logic test device has good suitability.
In addition to the above embodiments, other embodiments of the present invention are possible, and all technical solutions formed by equivalent substitution or equivalent transformation are within the scope of the present invention.

Claims (13)

1. The logic testing device is characterized by comprising a configuration storage module, a programmable gate array processing module, a tested device signal interface module, a light emitting module, a storage module and a function selection module;
the configuration storage module is used for solidifying and storing the test case and the configuration file when the programmable gate array processing module is in an internal test case downloading mode;
the programmable gate array processing module is used for storing the test case into the storage module when the programmable gate array processing module is in an external test case downloading mode; when the programmable gate array processing module is in an internal test case downloading mode, storing the test case into the configuration storage module; setting the programmable gate array processing module to a test case test state through the function selection module; acquiring one test case, transmitting the test case to the tested device signal interface module, receiving feedback information transmitted by the tested device signal interface module, comparing the feedback information with preset comparison information, and judging whether the test is completed;
the tested device signal interface module is used for receiving the tested example sent by the programmable gate array processing module, sending the tested example to a tested device, receiving the feedback information sent by the tested device and sending the feedback information to the programmable gate array processing module;
the light-emitting module is used for giving out corresponding light-emitting prompts according to the test results;
the storage module is used for storing the test cases in an external test case downloading mode by the logic test device;
the function selection module is used for setting the programmable gate array processing module into a test case downloading state, wherein the test case downloading state comprises an external test case downloading mode and an internal test case downloading mode, and is also used for setting the programmable gate array processing module into a test case testing state;
the configuration storage module is connected with the programmable gate array processing module, the programmable gate array processing module is respectively connected with the tested device signal interface module and the light-emitting module, the storage module is connected with the programmable gate array processing module, and the function selection module is connected with the programmable gate array processing module.
2. The logic testing device of claim 1, wherein the logic testing device further comprises a data transmission interface module and a button module;
the data transmission interface module is used for data communication between the logic testing device and the computer;
the button module is used for controlling the logic testing device to start or stop testing in a manual testing mode;
the data transmission interface module is connected with the programmable gate array processing module, and the button module is connected with the programmable gate array processing module.
3. The logic test device of any one of claim 1 or 2, further comprising a device under test power module,
the tested device power supply module is used for directly supplying power to the tested device;
the tested device power supply module is connected with the programmable gate array processing module.
4. The logic test device of any one of claim 1 or 2, wherein the logic test device further comprises a display interface module,
the display interface module is used for externally connecting a display device and transmitting the test result to the display device for display through the display interface module;
the display interface module is connected with the programmable gate array processing module.
5. The logic test device of claim 3, further comprising a display interface module,
the display interface module is used for externally connecting a display device and transmitting the test result to the display device for display through the display interface module;
the display interface module is connected with the programmable gate array processing module.
6. The logic test device of any one of claims 1-2, wherein the logic test device further comprises an expansion interface module,
the expansion interface module is used for providing a function expansion interface for the logic testing device;
the expansion interface module is connected with the programmable gate array processing module.
7. The logic test device of claim 3, wherein the logic test device further comprises an expansion interface module,
the expansion interface module is used for providing a function expansion interface for the logic testing device;
the expansion interface module is connected with the programmable gate array processing module.
8. The logic test device of claim 5, further comprising an expansion interface module,
the expansion interface module is used for providing a function expansion interface for the logic testing device;
the expansion interface module is connected with the programmable gate array processing module.
9. The logic testing device of claim 2, wherein the data transmission interface module is a universal asynchronous receiver transmitter interface module.
10. The logic test device of claim 1, wherein the function selection module is a dial switch.
11. A logic test method, wherein the logic test method is applied to the logic test device according to any one of claims 2 to 10, and comprises the following steps:
step S1, connecting a tested device with a logic testing device;
s2, setting a programmable gate array processing module into a test case downloading state through a function selecting module, wherein the test case downloading state comprises an external test case downloading mode and an internal test case downloading mode;
s3, sending a measurement example to a programmable gate array processing module;
step S4, the programmable gate array processing module stores the measurement example, which comprises the following steps:
if the programmable gate array processing module is in an external test case downloading mode, saving the test case into the storage module;
if the programmable gate array processing module is in an internal test case downloading mode, saving the test case into the configuration storage module;
s5, setting the programmable gate array processing module to be in a test case test state through the function selection module;
s6, the programmable gate array processing module acquires a measurement example;
step S7, the programmable gate array processing module sends the measured example to the signal interface module of the tested device;
s8, the signal interface module of the tested device sends the test example to the tested device;
step S9, the tested device responds to the test example and sends feedback information to the signal interface module of the tested device;
step S10, a signal interface module of a tested device sends feedback information to a programmable gate array processing module;
step S11, the programmable gate array processing module compares feedback information with preset comparison information;
if the comparison results are the same, the tested device passes the test of the test example;
if the comparison results are different, the tested device fails the test of the test example;
step S12, the programmable gate array processing module judges whether the test is completed;
if not, executing step S6;
if the acquisition is completed, the test is completed.
12. The logic test method according to claim 11, wherein the setting of the programmable gate array processing module to the case test state in step S5 includes;
an external test pattern;
an internal test pattern;
a manual external test pattern;
manual internal test case mode.
13. The logic test method according to claim 12, wherein the programmable gate array processing module in step S6 obtains a test case by the method comprising;
if the programmable gate array processing module is in an external test case test mode, the programmable gate array processing module acquires a test case from the memory module through the memory module interface; if the programmable gate array processing module is in the internal test case test mode, the programmable gate array processing module acquires a test case from the configuration storage module through the configuration storage module interface;
if the programmable gate array processing module is in a manual external test mode, when the button module is pressed down, the programmable gate array processing module acquires a test case from the storage module through the storage module interface;
when the button module is released, the logic testing device stops testing;
if the programmable gate array processing module is in a manual internal test case test mode, when the button module is pressed down, the programmable gate array processing module acquires a test case from the configuration storage module through the configuration storage module interface;
when the button module is released, the logic test device stops testing.
CN201510884678.5A 2015-12-04 2015-12-04 Logic testing device and method Active CN106841973B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510884678.5A CN106841973B (en) 2015-12-04 2015-12-04 Logic testing device and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510884678.5A CN106841973B (en) 2015-12-04 2015-12-04 Logic testing device and method

Publications (2)

Publication Number Publication Date
CN106841973A CN106841973A (en) 2017-06-13
CN106841973B true CN106841973B (en) 2023-12-15

Family

ID=59150639

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510884678.5A Active CN106841973B (en) 2015-12-04 2015-12-04 Logic testing device and method

Country Status (1)

Country Link
CN (1) CN106841973B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107290654A (en) * 2017-06-27 2017-10-24 济南浪潮高新科技投资发展有限公司 A kind of fpga logic test structure and method

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102183726A (en) * 2011-03-16 2011-09-14 建荣集成电路科技(珠海)有限公司 Field programmable gate array (FPGA)-based integrated circuit chip testing system and method
CN202008657U (en) * 2011-01-31 2011-10-12 杭州士兰微电子股份有限公司 Vector generation device for simulation test of integrated circuit
CN103323768A (en) * 2013-06-09 2013-09-25 苏州大学 Designated high-speed DA chip performance parameter testing method
CN203537390U (en) * 2013-09-12 2014-04-09 成都成电光信科技有限责任公司 Test system based on optical fiber channel
CN104049995A (en) * 2014-05-23 2014-09-17 北京兆易创新科技股份有限公司 Method and device for configuring FPGA (field programmable gate array) in MCU (microprogrammed control unit) chip
CN104133168A (en) * 2013-04-30 2014-11-05 鸿富锦精密工业(深圳)有限公司 Motherboard test system and method
CN104866423A (en) * 2015-05-20 2015-08-26 中国科学院空间应用工程与技术中心 Software configuration item test method and system
CN104965168A (en) * 2015-07-23 2015-10-07 北京华峰测控技术有限公司 FPGA configuration system and method for testing of integrated circuit
CN205176214U (en) * 2015-12-04 2016-04-20 深圳市盛德金科技有限公司 Logic testing arrangement

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202008657U (en) * 2011-01-31 2011-10-12 杭州士兰微电子股份有限公司 Vector generation device for simulation test of integrated circuit
CN102183726A (en) * 2011-03-16 2011-09-14 建荣集成电路科技(珠海)有限公司 Field programmable gate array (FPGA)-based integrated circuit chip testing system and method
CN104133168A (en) * 2013-04-30 2014-11-05 鸿富锦精密工业(深圳)有限公司 Motherboard test system and method
CN103323768A (en) * 2013-06-09 2013-09-25 苏州大学 Designated high-speed DA chip performance parameter testing method
CN203537390U (en) * 2013-09-12 2014-04-09 成都成电光信科技有限责任公司 Test system based on optical fiber channel
CN104049995A (en) * 2014-05-23 2014-09-17 北京兆易创新科技股份有限公司 Method and device for configuring FPGA (field programmable gate array) in MCU (microprogrammed control unit) chip
CN104866423A (en) * 2015-05-20 2015-08-26 中国科学院空间应用工程与技术中心 Software configuration item test method and system
CN104965168A (en) * 2015-07-23 2015-10-07 北京华峰测控技术有限公司 FPGA configuration system and method for testing of integrated circuit
CN205176214U (en) * 2015-12-04 2016-04-20 深圳市盛德金科技有限公司 Logic testing arrangement

Also Published As

Publication number Publication date
CN106841973A (en) 2017-06-13

Similar Documents

Publication Publication Date Title
CN109917276A (en) Multifunction circuit board automatic test equipment, test macro and test method
CN104345262A (en) Universal circuit board test system
CN111142008B (en) Circuit board power parameter testing system and method
CN103312852A (en) Automatic mobile terminal current testing device and testing method thereof
CN112305398A (en) Automatic circuit board testing system and method thereof
CN103439600A (en) Anti-interference test monitoring system and monitoring method
CN104198910A (en) Automatic testing system and testing method for integrated circuit
CN107018223A (en) One kind is used for mobile phone radio frequency signal testing method and system
CN211826353U (en) DDR tests mainboard and DDR test platform
CN106772464A (en) A kind of universal satellite navigation receiver test platform and method of testing
CN104202099A (en) System for calibrating 3G network card and calibration method thereof
CN106841973B (en) Logic testing device and method
CN110620704A (en) Throughput automatic test equipment
CN210297733U (en) Throughput automatic test equipment
CN116489054A (en) FPGA-based CoaXPress link performance detection method and system
CN208110030U (en) A kind of communication test plate of ammeter communication module
CN107733740B (en) VEE-based communication equipment automatic test method
CN205176214U (en) Logic testing arrangement
CN104750101A (en) Detection apparatus and method of digital signal processing module of airborne interrogator
CN206387909U (en) A kind of universal satellite navigation receiver test platform
CN112738502B (en) Automatic testing system and method for non-standard display equipment
CN210222230U (en) Automatic test equipment for electric wire bundle of civil aircraft landing gear
CN211785736U (en) Laser current analyzer of LO5 module
CN208334532U (en) A kind of multi-core cable switching detection device based on Radio Transmission Technology
CN210609142U (en) Intercom interface board and intercom detecting system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant