CN106816481A - A kind of preparation method of heterojunction solar battery - Google Patents
A kind of preparation method of heterojunction solar battery Download PDFInfo
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- CN106816481A CN106816481A CN201510866931.4A CN201510866931A CN106816481A CN 106816481 A CN106816481 A CN 106816481A CN 201510866931 A CN201510866931 A CN 201510866931A CN 106816481 A CN106816481 A CN 106816481A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 19
- 239000010408 film Substances 0.000 claims abstract description 156
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 56
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 56
- 239000010703 silicon Substances 0.000 claims abstract description 56
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 47
- 229910052751 metal Inorganic materials 0.000 claims abstract description 43
- 239000002184 metal Substances 0.000 claims abstract description 43
- 229910021419 crystalline silicon Inorganic materials 0.000 claims abstract description 27
- 239000010409 thin film Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 16
- 230000008021 deposition Effects 0.000 claims abstract description 10
- 235000008216 herbs Nutrition 0.000 claims abstract description 9
- 210000002268 wool Anatomy 0.000 claims abstract description 9
- 238000004140 cleaning Methods 0.000 claims abstract description 5
- 230000007797 corrosion Effects 0.000 claims abstract description 5
- 238000005260 corrosion Methods 0.000 claims abstract description 5
- 229910052709 silver Inorganic materials 0.000 claims description 7
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 239000012528 membrane Substances 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 229910052718 tin Inorganic materials 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 5
- 239000011787 zinc oxide Substances 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 claims description 3
- 229910021389 graphene Inorganic materials 0.000 claims description 3
- 229910003437 indium oxide Inorganic materials 0.000 claims description 3
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 229910001120 nichrome Inorganic materials 0.000 claims description 3
- BWHMMNNQKKPAPP-UHFFFAOYSA-L potassium carbonate Substances [K+].[K+].[O-]C([O-])=O BWHMMNNQKKPAPP-UHFFFAOYSA-L 0.000 claims description 3
- 229910000027 potassium carbonate Inorganic materials 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 description 11
- 239000011651 chromium Substances 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 10
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 9
- 238000000151 deposition Methods 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- JUGMVQZJYQVQJS-UHFFFAOYSA-N [B+3].[O-2].[Zn+2] Chemical compound [B+3].[O-2].[Zn+2] JUGMVQZJYQVQJS-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a kind of preparation method of heterojunction solar battery, methods described includes:In the two sides cleaning and texturing of N-type silicon chip, pyramid matte is formed；The wherein one side deposition first intrinsic amorphous silicon film layer and N-type amorphous thin Film layers of the N-type silicon chip after making herbs into wool, deposit the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer on another side；Transparent conductive film layer is deposited on N-type amorphous thin Film layers and P-type non-crystalline silicon film layer；The deposited metal film layer in the transparent conductive film layer on N-type silicon chip two sides；Dry film is sticked on N-type silicon chip two sides；Dry film is exposed with laser scanning method to form grid line pattern；Develop on two sides to N-type silicon chip；Metal grid lines are electroplated on grid line pattern after N-type silicon chip two sides is developed；Dry film outside removal metal grid lines region；Metal film layer outside corrosion metal grid lines region.
Description
Technical field
The present invention relates to area of solar cell, more particularly to a kind of preparation of heterojunction solar battery
Method.
Background technology
Solar cell is a kind of semiconductor devices that can convert solar energy into electric energy, in illumination condition
Lower inside solar energy battery can produce photogenerated current, be exported electric energy by electrode.In recent years, the sun
Energy battery production technology is constantly improved, and production cost is constantly reduced, and conversion efficiency is improved constantly, the sun
Can cell power generation application is increasingly extensive and important energy source as supply of electric power.
Homojunction based on crystalline state-Si (c-Si) substrate and formed with c-Si layer based on amorphous Si (a-Si)
Heterojunction solar battery be a kind of new and effective battery technology.Wherein heterojunction solar battery
The gate line electrode on surface plays a part of collected current, and the electric current of solar cell mainly passes through thin grid line
To main grid line electrode, the thin grid of metal that resistivity is smaller, width is smaller are more conducive to drop to electrode converging
The series resistance of low solar cell, while the shading-area of solar cell is reduced, so as to be lifted too
The fill factor, curve factor and short circuit current of positive energy battery.Therefore, part company has been proposed that the film, chromium plate expose
Electroplating technique makes metal grid lines after light dry film forms grating figure.But, exposed using the film, chromium plate
Light dry film formed grid line pattern thin grid width be generally higher than 30um, in addition film cost it is relatively low but
Service life is very short, and replacement frequency is very frequent in high volume production process, and chromium plate cost is very high makes
It is relatively long with the life-span, often replacing is similarly needed in high volume production process, so as to increase life
Cost is produced, production efficiency is influenceed.
The content of the invention
It is an object of the invention to improve defect present in prior art, there is provided a kind of hetero-junctions sun
Can battery preparation method, it optimizes grid line width, improves battery performance, reduces and be produced into
This, improves production efficiency.
To achieve the above object, the present invention uses following technical scheme：A kind of heterojunction solar battery
Preparation method, methods described includes：In the two sides cleaning and texturing of N-type silicon chip, pyramid suede is formed
Face；The wherein one side deposition first intrinsic amorphous silicon film layer and N-type of the N-type silicon chip after making herbs into wool are non-
Layer polycrystal silicon film, deposits the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer on another side；
Transparent conductive film layer is deposited in N-type amorphous thin Film layers and P-type non-crystalline silicon film layer；In N-type silicon
Deposited metal film layer in the transparent conductive film layer on piece two sides；Dry film is sticked on N-type silicon chip two sides；
Dry film is exposed with laser scanning method to form grid line pattern；Develop on two sides to N-type silicon chip；
Metal grid lines are electroplated on grid line pattern after the development of N-type silicon chip two sides；Outside removal metal grid lines region
Dry film；Metal film layer outside corrosion metal grid lines region.
Preferably, the wherein one side first intrinsic amorphous of deposition of N-type silicon chip of the step after making herbs into wool
Silicon membrane layer and N-type amorphous thin Film layers, deposit the second intrinsic amorphous silicon film layer and p-type on another side
Amorphous thin Film layers are that the first intrinsic amorphous silicon film layer on first deposited n-type silicon chip two sides is intrinsic with second
Amorphous thin Film layers, redeposited N-type amorphous thin Film layers, P-type non-crystalline silicon film layer, or first sink
The first intrinsic amorphous silicon film layer on product N-type silicon chip two sides and the second intrinsic amorphous silicon film layer, then sink
Product P-type non-crystalline silicon film layer, N-type non-crystalline silicon layer.
Preferably, the wherein one side first intrinsic amorphous of deposition of N-type silicon chip of the step after making herbs into wool
Silicon membrane layer and N-type amorphous thin Film layers, deposit the second intrinsic amorphous silicon film layer and p-type on another side
Amorphous thin Film layers are the first intrinsic amorphous silicon film layer and N-type amorphous of first deposited n-type silicon chip one side
Silicon membrane layer, the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer of redeposited another side,
Or the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer of first deposited n-type silicon chip one side,
The first intrinsic amorphous silicon film layer and N-type amorphous thin Film layers of redeposited another side.
Preferably, the transparent conductive film layer is indium tin oxide films, Al-Doped ZnO film, mixes
At least one in boron zinc oxide, tungsten-doped indium oxide, graphene film.
Preferably, the metal film layer is in Ag, Cu, Ni, Ti, TiN, Sn or NiCr
It is at least one.
Preferably, during the dry film is positive dry film or negative dry film, the thickness of the dry film is
15~40um, the dry film is exposed using laser scanning method.
Preferably, the grid line pattern is that many main grid patterns or transverse and longitudinal intersect dereliction grid waffle-like pattern.
Preferably, the thin grid line width of the metal grid lines is 5~20um, and thickness is 10-40um.Institute
It is at least one in Ag, Cu, Ni, Sn or Cr to state metal grid lines.
Preferably, the solution for using that develops is alkalescent etching solution, and the alkalescent etching is molten
Liquid is NA2CO3Or K2CO3Solution.
Preferably, the solution that the removal dry film is used is strong base etchant solution, the strong basicity erosion
Etching solution is NAOH or KOH solution.
The present invention uses above technical scheme, and dry film is exposed by using laser scanning method, makes
Obtaining battery grid line width can be fabricated into less than 20um, so greatly reduce battery surface grid line
Shading-area, and need not use the film or chromium plate, reduces the loss and frequently more of the film or chromium plate
The operating time changed, so as to lift the conversion efficiency of battery, reduce production cost, improving production efficiency.
Brief description of the drawings
The present invention is further described below in conjunction with the accompanying drawings
Fig. 1 is a kind of schematic flow sheet of the preparation method of solar cell of the invention；
Fig. 2 is a kind of many main grid patterning schematic diagrames of heterojunction solar battery of the invention；
Fig. 3 is that a kind of transverse and longitudinal of heterojunction solar battery of the invention intersects latticed dereliction gate pattern
Structural representation；
Fig. 4 is a kind of special-shaped pattern schematic diagram of heterojunction solar battery of the invention；
Fig. 5 is a kind of structural representation of heterojunction solar battery of the invention.
Specific embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, below in conjunction with accompanying drawing
And embodiment, the present invention will be described in further detail.It should be appreciated that described herein specific
Embodiment is only used to explain the present invention, is not intended to limit the present invention.
As shown in figure 1, the invention discloses a kind of preparation method of heterojunction solar battery, its bag
Include following steps：
S101：In the two sides cleaning and texturing of N-type silicon chip, pyramid matte is formed；
S102：The wherein one side deposition first intrinsic amorphous silicon film layer of N-type silicon chip after making herbs into wool and
N-type amorphous thin Film layers, deposit the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film on another side
Layer；
S103：Transparent conductive film is deposited on N-type amorphous thin Film layers and P-type non-crystalline silicon film layer
Layer；
S104：The deposited metal film layer in the transparent conductive film layer on N-type silicon chip two sides；
S105：Dry film is sticked on N-type silicon chip two sides；
S106：Dry film is exposed with laser scanning method to form grid line pattern；
S107：The two-sided development of N-type silicon chip；
S108：Metal grid lines are electroplated on grid line pattern after N-type silicon chip two sides is developed；
S109：Dry film outside removal metal grid lines region；
S110：Metal film layer outside corrosion metal grid lines region.
Wherein, during the dry film is positive dry film or negative dry film, thickness is 15-40um；The dry film
On grid line pattern formed using laser scanning method, grid line pattern is input in laser controlling software,
Laser machine scan exposure on dry film by the grid line pattern of input so that dry film surface forms grid line pattern；
As shown in Fig. 2 grid line pattern is many main grid patterns after the dry film laser scanning exposure, or such as Fig. 3
It is shown, it is that transverse and longitudinal intersects dereliction grid waffle-like pattern, or as shown in figure 4, be other special-shaped patterns；
Thin grid line width is 5-20um after the dry film laser scanning exposure.The metal grid lines electrode is using electricity
Plating mode is formed；It is the first intrinsic amorphous silicon film layer, N-type amorphous thin Film layers, second intrinsic
Amorphous thin Film layers and P-type non-crystalline silicon film layer pass through plasma enhanced chemical vapor deposition；It is described
Transparent conductive film layer and metal film layer pass through magnetron sputtering deposition.
Specifically can be as follows：
N-type silicon chip is provided, to N-type silicon chip cleaning and making herbs into wool, pyramid is formed on N-type silicon chip two sides
Matte, then under 150-220 DEG C of temperature conditionss, by N-type silicon chip placing response chamber, toward reaction chamber
In be passed through SiH4And H2Mixed gas, wherein SiH4Content be 10% to 50%, H2Content
It is 5% to 20%, by the method for plasma enhanced chemical vapor deposition in the front of N-type silicon chip
Deposition forms first intrinsic amorphous silicon film layer on face.The N of first intrinsic amorphous silicon film layer will be formed
Type silicon chip is put into doping chamber, and SiH is passed through toward doping chamber4、H2And the gas containing dopant P,
Thus first intrinsic amorphous silicon film layer on deposited n-type amorphous thin Film layers.
First intrinsic amorphous silicon film layer will be formed again and the N-type silicon chip of N-type amorphous thin Film layers is put
Enter in reaction chamber, SiH is passed through toward doping chamber4、H2Mixed gas, in the back side shape of N-type silicon chip
Into the second intrinsic amorphous silicon film layer.The N-type silicon chip for forming the second intrinsic amorphous silicon film layer is put into
In doping chamber, SiH is passed through toward doping chamber4、H2, and the gas containing dopant B is synchronously passed through,
P-type non-crystalline silicon film layer is formed in the second intrinsic amorphous silicon film layer.
Respectively by the method for magnetron sputtering in P-type non-crystalline silicon film layer and N-type amorphous thin Film layers
Generation transparent conductive film layer and metal level, then stick dry film on the metal level on N-type silicon chip two sides,
Dry film is exposed with laser scanning method to form grid line pattern, with alkalescent developer solution NA2CO3Or
K2CO3Solution subtracts development to grid line pattern, electroplates metal grid lines in grid line area of the pattern afterwards.
Using the dry film outside highly basic NAOH or KOH solution stripping metal grid lines region, lost with metal
Carve the metal film layer outside corrosion metal grid lines region.
As shown in figure 5, being the heterojunction solar battery prepared according to the present invention, it includes：
N-type silicon chip 1；
Be located at the wherein one side of N-type silicon chip 1 first intrinsic amorphous silicon film layer 2 and another side the
Two intrinsic amorphous silicon film layers 3；
It is located at the N-type amorphous thin Film layers 4 on first intrinsic amorphous silicon film layer 2；
It is located at the P-type non-crystalline silicon film layer 5 in the second intrinsic amorphous silicon film layer 3；
The electrically conducting transparent being respectively provided on N-type amorphous thin Film layers 4 and P-type non-crystalline silicon film layer 5 is thin
Film layer 6；
It is respectively provided at the metal film layer 7 in the transparent conductive film layer 6 on the two sides of N-type silicon chip 1；
It is respectively provided at the exposure silver paste gate line electrode 8 on 1 metal film layer on two sides 7 of N-type silicon.
Wherein, 2 thickness of the first intrinsic amorphous silicon film layer are 4-10nm, N-type amorphous silicon membrane
4 thickness of layer are 4-10nm, the thickness of the second intrinsic amorphous silicon film layer 3 is 4-10nm, P-type non-crystalline silicon
The thickness of film layer 5 is 4-10nm, the thickness of the transparent conductive film layer 6 is 90-120nm, the gold
Category film layer 7 thickness is 50-300nm, the thin grid width of the metal grid lines 8 is 5-20um, described
The thickness of metal grid lines 8 is 10-40um；
The transparent conductive film layer 6 is indium tin oxide films, Al-Doped ZnO film, boron-doping oxidation
At least one in zinc, tungsten-doped indium oxide, graphene film；
The metal film layer 7 is in Ag, Cu, Al, Ni, Ti, TiN, Sn or NiCr film
At least one.
The metal grid lines electrode 8 is at least one in Ag, Cu, Ni, Sn or Cr.
Because laser is contrasted with the ultraviolet LED exposure lamp source of current exposure, directionality is more preferable, laser
The size of the angle of divergence very little of beam, almost one parallel light, and hot spot can control 20um with
Interior, it is not necessary to use the MASK such as the film, chromium plate, the pattern of laser scanning is input to by software in addition
In laser, then the galvanometer in laser is controlled to be scanned by software, the grid line pattern of scanning
Can be very diversified.So the present invention substitutes the film or chromium plate mode to dry film by using laser scanning
It is exposed so that battery grid line width can be fabricated into less than 20um, so greatly reduce electricity
The shading-area of pool surface grid line, and the film or chromium plate need not be used, reduce the film or chromium plate
Loss and the operating time frequently changed, so as to lift the conversion efficiency of battery, production cost is reduced,
Improving production efficiency.Preparation method of the present invention is simple and easy to apply, process, battery turn
Efficiency high is changed, and is adapted to large-scale production.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all
Any modification, equivalent and improvement for being made within the spirit and principles in the present invention etc., all should include
Within protection scope of the present invention.
Claims (10)
1. a kind of preparation method of heterojunction solar battery, it is characterised in that：Methods described includes,
In the two sides cleaning and texturing of N-type silicon chip, pyramid matte is formed；
The wherein one side deposition first intrinsic amorphous silicon film layer and N-type of the N-type silicon chip after making herbs into wool are non-
Layer polycrystal silicon film, deposits the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer on another side；
Transparent conductive film layer is deposited on N-type amorphous thin Film layers and P-type non-crystalline silicon film layer；
The deposited metal film layer in the transparent conductive film layer on N-type silicon chip two sides；
Dry film is sticked on N-type silicon chip two sides；
Dry film is exposed with laser scanning method to form grid line pattern；
Develop on two sides to N-type silicon chip；
Metal grid lines are electroplated on grid line pattern after N-type silicon chip two sides is developed；
Dry film outside removal metal grid lines region；
Metal film layer outside corrosion metal grid lines region.
2. preparation method according to claim 1, it is characterised in that：The step is in making herbs into wool
The wherein one side deposition first intrinsic amorphous silicon film layer and N-type amorphous silicon membrane of N-type silicon chip afterwards
Layer, it is first deposited n-type that the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer are deposited on another side
The first intrinsic amorphous silicon film layer and the second intrinsic amorphous silicon film layer, redeposited N-type on silicon chip two sides
Amorphous thin Film layers, P-type non-crystalline silicon film layer, or first deposited n-type silicon chip two sides is first intrinsic
Amorphous thin Film layers and the second intrinsic amorphous silicon film layer, redeposited P-type non-crystalline silicon film layer, N-type
Amorphous silicon layer.
3. preparation method according to claim 1, it is characterised in that：The step is in making herbs into wool
The wherein one side deposition first intrinsic amorphous silicon film layer and N-type amorphous silicon membrane of N-type silicon chip afterwards
Layer, it is first deposited n-type that the second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer are deposited on another side
The first intrinsic amorphous silicon film layer and N-type amorphous thin Film layers of silicon chip one side, redeposited another side
Second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer, or first deposited n-type silicon chip one side
Second intrinsic amorphous silicon film layer and P-type non-crystalline silicon film layer, the first of redeposited another side are intrinsic non-
Layer polycrystal silicon film and N-type amorphous thin Film layers.
4. preparation method according to claim 1, it is characterised in that：The transparent conductive film
Layer is indium tin oxide films, Al-Doped ZnO film, boron-doping zinc oxide, tungsten-doped indium oxide, Graphene
At least one in film.
5. preparation method according to claim 1, it is characterised in that：The metal film layer is
At least one in Ag, Cu, Ni, Ti, TiN, Sn or NiCr.
6. preparation method according to claim 1, it is characterised in that：The dry film is dry for positivity
Film or negative dry film, the thickness of the dry film is 15~40um.
7. preparation method according to claim 1, it is characterised in that：The grid line pattern is many
Main grid pattern or transverse and longitudinal intersect dereliction grid waffle-like pattern.
8. preparation method according to claim 1, it is characterised in that：The metal grid lines it is thin
Grid line width is 5~20um, and thickness is 10-40um.The metal grid lines are Ag, Cu, Ni, Sn
Or at least one in Cr.
9. preparation method according to claim 1, it is characterised in that：It is molten that the development is used
Liquid is alkalescent etching solution, and the alkalescent etching solution is NA2CO3Or K2CO3Solution.
10. preparation method according to claim 1, it is characterised in that：The removal dry film is used
Solution be strong base etchant solution, the strong base etchant solution be NAOH or KOH solution.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510866931.4A CN106816481A (en) | 2015-12-02 | 2015-12-02 | A kind of preparation method of heterojunction solar battery |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510866931.4A CN106816481A (en) | 2015-12-02 | 2015-12-02 | A kind of preparation method of heterojunction solar battery |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109148615A (en) * | 2017-06-16 | 2019-01-04 | 福建金石能源有限公司 | A kind of production method of heterojunction solar battery electrode |
| CN110168750A (en) * | 2017-11-15 | 2019-08-23 | 君泰创新（北京）科技有限公司 | Heterojunction solar battery and preparation method thereof |
| CN111370504A (en) * | 2020-03-12 | 2020-07-03 | 中威新能源(成都)有限公司 | Main-gate-free silicon heterojunction SHJ solar cell and preparation method thereof |
| CN114203839A (en) * | 2020-11-11 | 2022-03-18 | 福建金石能源有限公司 | Manufacturing method of heterojunction solar single-sided battery |
| CN115132856A (en) * | 2021-03-24 | 2022-09-30 | 浙江爱旭太阳能科技有限公司 | Manufacturing method of battery electrode and solar battery |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109148615A (en) * | 2017-06-16 | 2019-01-04 | 福建金石能源有限公司 | A kind of production method of heterojunction solar battery electrode |
| CN110168750A (en) * | 2017-11-15 | 2019-08-23 | 君泰创新（北京）科技有限公司 | Heterojunction solar battery and preparation method thereof |
| CN111370504A (en) * | 2020-03-12 | 2020-07-03 | 中威新能源(成都)有限公司 | Main-gate-free silicon heterojunction SHJ solar cell and preparation method thereof |
| CN111370504B (en) * | 2020-03-12 | 2022-09-23 | 中威新能源(成都)有限公司 | Main-gate-free silicon heterojunction SHJ solar cell and preparation method thereof |
| CN114203839A (en) * | 2020-11-11 | 2022-03-18 | 福建金石能源有限公司 | Manufacturing method of heterojunction solar single-sided battery |
| CN115132856A (en) * | 2021-03-24 | 2022-09-30 | 浙江爱旭太阳能科技有限公司 | Manufacturing method of battery electrode and solar battery |
| CN115132856B (en) * | 2021-03-24 | 2024-02-13 | 浙江爱旭太阳能科技有限公司 | Manufacturing method of battery electrode and solar battery |
| WO2023124324A1 (en) * | 2021-12-27 | 2023-07-06 | 隆基绿能科技股份有限公司 | Solar cell and electrodes thereof |
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Application publication date: 20170609 |