CN106787652B - A kind of dynamic suitable for buck converter output DC maladjustment eliminates circuit - Google Patents
A kind of dynamic suitable for buck converter output DC maladjustment eliminates circuit Download PDFInfo
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- CN106787652B CN106787652B CN201710070538.3A CN201710070538A CN106787652B CN 106787652 B CN106787652 B CN 106787652B CN 201710070538 A CN201710070538 A CN 201710070538A CN 106787652 B CN106787652 B CN 106787652B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
A kind of dynamic suitable for buck converter output DC maladjustment eliminates circuit, belongs to electronic circuit technology field.Including ripple generation circuit and ripple supercircuit, the present invention directly samples upper power tube S by the way that duty cycle information is added in ripple generation circuit1With lower power tube S2Voltage at connecting node SW is superimposed upon feedback voltage V to simulate generation and the ripple of inductive current same-phaseFBAbove so that feedback voltage VFBWith preset reference voltage VREFIt is equal, to control the normal overturning of pulse width modulated comparator PWM, enhance system stability, avoid the too small resonance problems for leading to output voltage delayed phase and generating of equivalent series resistance by output capacitance, increase converter output voltage precision, contradiction of the valley detection pattern of traditional ripple control between system stability and accuracy is overcome, can accomplish the DC maladjustment amount for dynamically eliminating output voltage under different application condition, that is, different input voltages and output voltage.
Description
Technical field
The invention belongs to electronic circuit technology fields, and in particular to be suitable for constant-on-time and based on ripple to a kind of
The dynamic of the buck DC-DC converter output DC maladjustment of control eliminates circuit.
Background technology
With the extensive use of portable electronic device, demand of the market to power management integrated circuit constantly rises,
Middle voltage-dropping type (Buck) DC-DC converter is even more to be widely used in the fields such as communication, computer, industrial automation.Traditional
There are three types of control models, respectively current-mode, voltage-mode and sluggish control for buck DC-DC converter.Based on the constant of ripple
Opening time control program (Ripple-based Constant On-time Control) belongs to one kind of sluggish mould control,
And it is widely used due to the advantages that its control is simple, without external compensation, excellent load regulation and efficiency.
For traditional buck converter, there is certain compromise in system performance：Loop is superimposed upon PWM comparator forward ends
Ripple quantity it is too small may cause loop stability reduce, PWM comparator output jitters lead to false triggering.Ripple quantity mistake
It is big then can cause be located at half switching frequency at system q it is too low so that system response time is slack-off；And it is opened by constant
The DC maladjustment amount for opening time intrinsic valley detection pattern introducing is excessive, this is under the premise of buck convertor exports low pressure
Prodigious influence can be caused on system accuracy.
Invention content
In view of the deficiencies of the prior art, the present invention is directed to constant-on-time and the decompression transformation based on ripple control
Device detects mould under the application conditions of different input voltage vins and output voltage Vout, by the intrinsic valley of constant-on-time
The output imbalance that formula introduces provides a kind of dynamic elimination circuit, ensures that dynamically elimination output is straight in the case of different duty
It is lost in and adjusts.
The technical scheme is that：
A kind of dynamic suitable for buck converter output DC maladjustment eliminates circuit, including ripple generation circuit and ripple
Supercircuit,
The ripple supercircuit includes a trsanscondutance amplifier Gm, and the positive input of trsanscondutance amplifier Gm is as the line
The first input end of wave supercircuit, second input terminal of the negative input as the ripple supercircuit, the ripple
The output end output pulse signal of supercircuit, power tube is opened on control buck converter when the pulse signal is high level
Lower power tube shutdown；
It is characterized in that, the ripple generation circuit includes first resistor R1, second resistance R2,3rd resistor R3, the 4th
Resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the first capacitance C1, second
Capacitance C2, third capacitance C3, the 4th capacitance C4, the 5th capacitance C5, the 6th capacitance C6, the first NMOS tube MN1, the second NMOS tube
MN2, third NMOS tube MN3, the first PMOS tube MP1, the second PMOS tube MP2 and third buffer BUF,
One end of first resistor R1 inputs buck converter lower power tube as the input terminal of the ripple generation circuit
Voltage at node SW, the other end after the first capacitance C1 by being grounded；
Second resistance R2 and 3rd resistor R3 series connection, series connection point export triangle wave voltage VF1And connect the ripple superposition
The first input end of circuit, the tie point of another termination first resistor R1 and the first capacitance C1 of second resistance R2,3rd resistor
The other end of R3 is grounded；
4th resistance R4 and the second capacitance C2 series connection, the other end connection second resistance R2 and 3rd resistor of the 4th resistance R4
The series connection point of R3, the other end ground connection of the second capacitance C2；
5th resistance R5 and the C3 series connection of third capacitance, the positive input of series connection point connection third buffer BUF, the 5th
The series connection point of other end connection the 4th resistance R4 and the second capacitance C2 of resistance R5, the other end ground connection of third capacitance C3；
The negative input of third buffer BUF connects the source electrode of the first NMOS tube MN1 and is followed by by the 6th resistance R6
Ground, the grid of the first NMOS tube MN1 of output termination；
The source electrode of first PMOS tube MP1 and the second PMOS tube MP2 interconnect and connect supply voltage VCC, gate interconnection and company
Connect the drain electrode of the first PMOS tube MP1 and the first NMOS tube MN1；
The grid of second NMOS tube MN2 connects to be believed with the control of signal inversion at buck converter lower power tube node SW
Number, drain electrode connects the drain electrode of the second PMOS tube MP2 and third NMOS tube MN3, source electrode ground connection；
The grid of third NMOS tube MN3, which connects, to be believed with signal at buck converter lower power tube node SW with the control of phase
Number, source electrode is grounded after the parallel-connection structure by the 5th capacitance C5 and the 7th resistance R7；
8th resistance R8 and the 4th capacitance C4 series connection, the source electrode of another termination third NMOS tube MN3 of the 8th resistance R8, the
The other end of four capacitance C4 is grounded；
9th resistance R9 and the 6th capacitance C6 series connection, series connection point export DC voltage VSW_DCAnd connect the ripple superposition
Second input terminal of circuit, the series connection point of another termination the 8th the resistance R8 and the 4th capacitance C4 of the 9th resistance R9, the 6th capacitance
The other end of C6 is grounded.
Specifically, the ripple supercircuit further includes the first buffer BUF1, the second buffer BUF2, the tenth resistance
R10 and pulse width modulated comparator PWM,
The input terminal input feedback voltage V of first buffer BUF1FB, output end by after the tenth resistance R10 connect across
Lead the positive input of the output end and pulse width modulated comparator PWM of amplifier Gm；
The input terminal input reference voltage V of second buffer BUF2REF, output end connection pulse width modulated comparator PWM's
Negative input, the output end of the output end of pulse width modulated comparator PWM as the ripple supercircuit.
Beneficial effects of the present invention are：The present invention is in different application condition, that is, different input voltage vins and output voltage
Duty ratio letter is added in the DC maladjustment amount that can accomplish dynamically to eliminate output end voltage under Vout in ripple generation circuit
Breath so that the feedback voltage V proportional to output voltage VoutFBWith preset reference voltage VREFIt is equal, increase converter output electricity
Vout precision is pressed, contradiction of the valley detection pattern of traditional ripple control between system stability and accuracy is overcome；This
Ripple supercircuit in the piece used is invented, upper power tube S is directly sampled1With lower power tube S2Connecting node SW at voltage
It is superimposed upon feedback voltage V to simulate generation and the ripple of inductive current same-phaseFBAbove, to control pulse width modulated comparator PWM
Normal overturning, enhance system stability, avoid the equivalent series resistance R by output capacitanceCO is too small to lead to output voltage Vout
Delayed phase and the resonance problems generated；5th capacitance C5 filters the burr of square-wave signal on the 7th resistance R7 so that rear class is filtered
The average voltage that wave obtains is more accurate；Meanwhile the present invention also retains traditional constant on-time control based on ripple
Control possessed by mode is simple, without external compensation, electromagnetic interference EMI is functional, have preferable load regulation and
The advantages that light-load efficiency, optimizes the system performance of buck converter.
Description of the drawings
Fig. 1 is a kind of applicable voltage-dropping type variator loop control principle schematic diagram based on ripple control of the present invention.
Fig. 2 is the ripple that a kind of dynamic exporting DC maladjustment suitable for buck converter proposed by the present invention eliminates circuit
Generation circuit schematic diagram.
Fig. 3 is the ripple that a kind of dynamic exporting DC maladjustment suitable for buck converter proposed by the present invention eliminates circuit
Supercircuit and output DC maladjustment dynamic eliminate schematic diagram.
Fig. 4 is that output DC maladjustment dynamic eliminates schematic diagram.
Specific implementation mode
Below in conjunction with attached drawing, technical scheme of the present invention is specifically described：
A kind of dynamic suitable for buck converter output DC maladjustment proposed by the present invention eliminates circuit, by tradition
DC filter (DC value extractor) in be added duty cycle information, make it in different input voltage vins and output
Equal dynamic eliminates output DC offset voltage under the application conditions of voltage Vout, different duty ratios, becomes to improve decompression
The output accuracy of parallel operation；Ensure ripple quantity size simultaneously, does not influence system stability.
It is as shown in Figure 1 a kind of applicable voltage-dropping type variator principle schematic based on ripple control of the present invention, wherein
Circuit frame is by input voltage vin, inductance L, upper power tube S1, lower power tube S2, output capacitance Co and its equivalent series resistance
RCoIt is constituted with output loading Ro, wherein lower power tube S1And S2Node be SW, system output voltage Vout.Output voltage
Vout generates feedback voltage V by feedback factor βFB, with reference voltage VREFInput pulse width modulator (PWM) is compared together
And eventually by logic module Logic control lower power tubes S1And S2Switch.Upper power tube S1Open lower power tube S2Shutdown
Time be Ton, be constant；Upper power tube S1The lower power tube S of shutdown2The time of unlatching is Toff, the marking signal terminated
For the output signal of pulse width modulated comparator PWM, the signal is in feedback voltage VFBLess than setting reference voltage value VREFWhen generate.
The ratio that Ton occupies entire switch periods (Ton+Toff) is duty ratio D.Due to feedback voltage VFBIt is being sent into pulsewidth modulation ratio
Compared with device PWM and reference voltage VREFIt needs first to be superimposed the ripple voltage with inductive current with frequency with phase before comparing, therefore first resistor R1,
First capacitance C1, second resistance R2 and 3rd resistor R3 are used to generate the triangle wave voltage V with frequency with phase with inductive currentF1, with
It is poor that DC quantity after by DC filter and duty cycle information is added is made, that is, generates aforementioned and feedback voltage VFBNeeded for superposition
Ripple voltage.
And ripple supercircuit in the piece that the present invention uses, directly sample upper power tube S1With lower power tube S2Connection section
Voltage at point SW is superimposed upon feedback voltage V to simulate generation and the ripple of inductive current same-phaseFBAbove, to control pulsewidth tune
The normal overturning of comparator PWM processed enhances system stability, avoids the equivalent series resistance R by output capacitanceCoIt is too small cause it is defeated
Go out voltage VOUTDelayed phase and the resonance problems generated；Duty cycle information is added simultaneously, to ensure the dynamic under different application
Output DC maladjustment is eliminated, converter output voltage precision is increased.
Ripple generation circuit is as shown in Fig. 2, including first resistor R1, second resistance R2,3rd resistor R3, the 4th resistance
R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the first capacitance C1, the second capacitance
C2, third capacitance C3, the 4th capacitance C4, the 5th capacitance C5, the 6th capacitance C6, the first NMOS tube MN1, the second NMOS tube MN2,
Three NMOS tube MN3, the first PMOS tube MP1, the second PMOS tube MP2 and third buffer BUF, first resistor R1 one end as institute
The voltage at the input terminal input buck converter lower power tube node SW of ripple generation circuit is stated, the other end passes through first
It is grounded after capacitance C1；Second resistance R2 and 3rd resistor R3 series connection, series connection point export triangle wave voltage VF1And connect the line
The first input end of wave supercircuit, the tie point of another termination first resistor R1 and the first capacitance C1 of second resistance R2, the
The other end of three resistance R3 is grounded；4th resistance R4 and the second capacitance C2 series connection, the second electricity of other end connection of the 4th resistance R4
Hinder the series connection point of R2 and 3rd resistor R3, the other end ground connection of the second capacitance C2；5th resistance R5 and the C3 series connection of third capacitance,
Series connection point connects the positive input of third buffer BUF, and the other end of the 5th resistance R5 connects the electricity of the 4th resistance R4 and second
Hold the series connection point of C2, the other end ground connection of third capacitance C3；The negative input of third buffer BUF connects the first NMOS tube
The source electrode of MN1 and by being grounded after the 6th resistance R6, the grid of the first NMOS tube MN1 of output termination；First PMOS tube MP1 and
The source electrode of second PMOS tube MP2 interconnects and connects supply voltage VCC, gate interconnection simultaneously connect the first PMOS tube MP1 and first
The drain electrode of NMOS tube MN1；The grid of second NMOS tube MN2 connects and signal inversion at buck converter lower power tube node SW
Signal is controlled, drain electrode connects the drain electrode of the second PMOS tube MP2 and third NMOS tube MN3, source electrode ground connection；Third NMOS tube MN3
Grid connect the control signal with signal at buck converter lower power tube node SW with phase, source electrode passes through the 5th capacitance C5
It is grounded with after the parallel-connection structure of the 7th resistance R7；8th resistance R8 and the 4th capacitance C4 series connection, another termination of the 8th resistance R8
The source electrode of third NMOS tube MN3, the other end ground connection of the 4th capacitance C4；9th resistance R9 and the 6th capacitance C6 series connection, series connection
Point output DC voltage VSW_DCAnd connect the second input terminal of the ripple supercircuit, another termination the 8th of the 9th resistance R9
The series connection point of resistance R8 and the 4th capacitance C4, the other end ground connection of the 6th capacitance C6.
Ripple supercircuit as shown in figure 3, including trsanscondutance amplifier Gm, the first buffer BUF1, the second buffer BUF2,
The positive input of tenth resistance R10 and pulse width modulated comparator PWM, trsanscondutance amplifier Gm are as the ripple supercircuit
First input end, second input terminal of the negative input as the ripple supercircuit, the ripple supercircuit it is defeated
Outlet output pulse signal, power tube opens lower power tube shutdown on control buck converter when pulse signal is high level；The
The input terminal input feedback voltage V of one buffer BUF1FB, output end is by connecting trsanscondutance amplifier Gm after the tenth resistance R10
Output end and pulse width modulated comparator PWM positive input；The input terminal input reference voltage of second buffer BUF2
VREF, the negative input of output end connection pulse width modulated comparator PWM, the output end of pulse width modulated comparator PWM is as institute
State the output end of ripple supercircuit.
The specific folded course of work for being controlled pulse width modulated comparator PWM output switching activities of ripple is as follows：
As shown in Fig. 2, the input terminal of ripple generation circuit is buck convertor lower power tube node SW voltages, first
The RC network filter being made of first resistor R1, the first capacitance C1 and second resistance R2,3rd resistor R3 by one is triangular wave
Signal, i.e. triangle wave voltage VF1, the effect of second resistance R2,3rd resistor R3 herein is adjustment triangle wave voltage VF1Be averaged
Value size is to meet the common-mode input range of rear class trsanscondutance amplifier Gm.For triangle wave voltage VF1, ripple quantity size is：
Its average value size is：
Triangle wave voltage VF1Connection is made of the 4th resistance R4, the second capacitance C2 and the 5th resistance R5, third capacitance C3
Two stage filter network obtains its average value later, by a third buffer BUF by the voltage clamping at the 6th both ends resistance R6
In triangle wave voltage VF1Mean value.Therefore, it is by the electric current of the 6th resistance R6：
And the breadth length ratio of the current mirror of the first PMOS tube MP1 and the second PMOS tube MP2 compositions is 1:1, the 7th resistance R7's
The grid of resistance value of the resistance value equal to the 6th resistance R6, the second NMOS tube MN2 and third NMOS tube MN3 connect to be connect and upper and lower power respectively
With frequency with the control signal of phase at pipe node SW so that third NMOS tube MN3 is connected during Ton, the second NMOS tube MN2 shutdowns；
And the second NMOS tube MN2 conductings during Toff, the MN3 shutdowns of third NMOS tube.Pressure drop during Ton on the 7th resistance R7 as a result,
For triangle wave voltage VF1Average valueAnd the pressure drop during Toff on the 7th resistance R7 is 0.As shown in Fig. 2 dotted line frames,
The partial circuit is realized in triangle wave voltage VF1DC information in duty cycle information is added, for rear class export DC maladjustment
Dynamic eliminate.Therefore be a square-wave signal on the 7th resistance R7, average value is：
Wherein D is duty ratio.Here the 5th capacitance C5 act as filtering the 7th resistance R7 on square-wave signal burr with
So that the average voltage that rear class filtering obtains is more accurate, but it crosses conference and introduces big time constant, is unfavorable for square wave
It is formed.Under normal circumstances, the time constant of the 7th resistance R7 and the 5th capacitance C5 should be less than 0.1 times of switch periods.
The square-wave signal at the 7th both ends resistance R7 is by the 8th resistance R8, the 4th capacitance C4 and the 9th resistance R9, the 6th electricity
The current potential of its average value is obtained after holding the filter network of the large time constant of C6 compositions, i.e.,：
The triangle wave voltage V that the above ripple generation circuit is obtained againF1And DC voltage VSW_DCRear class mutual conductance is input to put
Big device generates ripple current I1, the DC voltage VSW_DCContaining duty cycle information, as shown in Figure 3.Enable trsanscondutance amplifier etc.
Effect mutual conductance is Gm, VF1And VSW_DCIt is separately input to positive-negative input end, triangle wave voltage VF1Average value beSo that mutual conductance is put
The output current I of big device Gm1It can be obtained by the following formula：
Wherein,Here IrippleFor contain ripple information and
With inductive current with frequency with the electric current of phase, DC component zero；Δ I is an information DC current containing duty ratio D, is used for
The dynamic of output voltage imbalance is eliminated.
As shown in figure 4, the electric current I after trsanscondutance amplifier Gm1Required ripple electricity is generated after flowing through the tenth resistance R10
Press the feedback voltage V proportional with down-converter output voltage Vout sampled to the first buffer BUF1 input terminalsFBSuperposition,
Positive input V as pulse width modulated comparator PWM1, i.e.,：
V1=VFB+R10·I1
=VFB+R10·(Iripple+ΔI)
And the negative input V of pulse width modulated comparator PWM2For by the reference voltage V of the second buffer BUF2REF。
I.e.：
V2=VREF
V1And V2Respectively as pulse width modulated comparator PWM positive-negative input end compare make it is poor, difference is：
V1-V2=VFB+R10·(Iripple+ΔI)-VREF
=(VFB+R10·Iripple)-(VREF-R10·ΔI)
Another feedback voltage VFBThe ripple voltage of upper superposition is Vripple=R10·Iripple, voltage peak-to-peak value is
Vripple(pp)；And reference voltage VREFTranslational movement be Δ V=R10Δ I, as arrow marks in Fig. 4.Due to constant-on-time
The intrinsic valley detection pattern of control mode, to make pulse width modulated comparator PWM overturnings generate open upper power tube S1, close
The pulse signal of disconnected lower power tube S2, needs containing feedback voltage VFBThe V of information1Signal is down in its valley and V2Voltage
Be worth it is equal, as shown in Figure 4.Another ripple current I1Peak-to-peak value size be Iripple(pp), then V1V is touched in valley2When electric current I1's
Ripple quantity size isI.e.：
Eliminate the DC maladjustment on the output voltage Vout of output end output so that feedback voltage VFBWith reference voltage
VREFSize is identical, i.e. VFB=VREF.In conjunction with above-mentioned roll over condition formula, must have：
Due to
And
It is calculated before substituting into, can obtain above formula the right and left is respectively：
It can offset, ensure in different input voltage vins and output as can be seen that above two formula contains duty cycle information
Output voltage DC maladjustment can be dynamically eliminated under the application conditions of voltage Vout (i.e. different duty D) so that the present invention exists
It is applicable in wide scope.And to make above-mentioned two formula equal, i.e.,：
2R1·C1·fsw(R2+R3)=R1+R2+R3
For determining the Buck buck converters of frequency application (fsw is constant, such as 700kHz), second resistance R2 and the need to be only adjusted
The resistance value size of three resistance R3, you can meet above-mentioned equation and set up.Meanwhile V is derived from by frontF1Ripple quantity size and the
The value of one resistance R1 and the first capacitance C1 are inversely proportional, as a result, can be by first resistor R1 and the first capacitance C1 in design
Reasonable set be superimposed upon feedback voltage V to adjustFBThe size of ripple quantity above should make it be no less than 30mV under normal conditions,
To ensure system stability.
The present invention can accomplish dynamically to disappear under different application condition, that is, different input voltage vins and output voltage Vout
In addition to the DC maladjustment amount of output end voltage so that the feedback voltage V proportional to output VoutFBWith preset reference voltage VREF
It is equal, overcome contradiction of the valley detection pattern of traditional ripple control between system stability and accuracy.Meanwhile this hair
It is bright to also retain traditional constant on-time control mode (Ripple-based Constant On-time based on ripple
Control control possessed by) is simple, it is functional to be not necessarily to external compensation, EMI, has preferable load regulation and underloading
The advantages that efficiency, optimizes the system performance of Buck converters well.
Those of ordinary skill in the art will understand that the embodiments described herein, which is to help reader, understands this hair
Bright principle, it should be understood that protection scope of the present invention is not limited to such specific embodiments and embodiments.This field
Those of ordinary skill can make according to the technical disclosures disclosed by the invention various does not depart from the other each of essence of the invention
The specific variations and combinations of kind, these variations and combinations are still within the scope of the present invention.
Claims (2)
1. a kind of dynamic suitable for buck converter output DC maladjustment eliminates circuit, including ripple generation circuit and ripple are folded
Road is powered up,
The ripple supercircuit includes a trsanscondutance amplifier (Gm), and the positive input of trsanscondutance amplifier (Gm) is as the line
The first input end of wave supercircuit, second input terminal of the negative input as the ripple supercircuit, the ripple
The output end output pulse signal of supercircuit, power tube is opened on control buck converter when the pulse signal is high level
Lower power tube shutdown；
It is characterized in that, the ripple generation circuit includes first resistor (R1), second resistance (R2), 3rd resistor (R3),
Four resistance (R4), the 5th resistance (R5), the 6th resistance (R6), the 7th resistance (R7), the 8th resistance (R8), the 9th resistance (R9),
First capacitance (C1), the second capacitance (C2), third capacitance (C3), the 4th capacitance (C4), the 5th capacitance (C5), the 6th capacitance
(C6), the first NMOS tube (MN1), the second NMOS tube (MN2), third NMOS tube (MN3), the first PMOS tube (MP1), the 2nd PMOS
(MP2) and third buffer (BUF) are managed,
One end of first resistor (R1) inputs buck converter lower power tube section as the input terminal of the ripple generation circuit
Voltage at point (SW), the other end are grounded afterwards by the first capacitance (C1)；
Second resistance (R2) and 3rd resistor (R3) series connection, series connection point export triangle wave voltage (VF1) and to connect the ripple folded
The first input end on power-up road, the tie point of another the termination first resistor (R1) and the first capacitance (C1) of second resistance (R2),
The other end of 3rd resistor (R3) is grounded；
4th resistance (R4) and the second capacitance (C2) series connection, the other end connection second resistance (R2) and third of the 4th resistance (R4)
The series connection point of resistance (R3), the other end ground connection of the second capacitance (C2)；
5th resistance (R5) and third capacitance (C3) series connection, series connection point connect the positive input of third buffer (BUF), the
The other end of five resistance (R5) connects the series connection point of the 4th resistance (R4) and the second capacitance (C2), the other end of third capacitance (C3)
Ground connection；
The negative input of third buffer (BUF) connect the source electrode of the first NMOS tube (MN1) and by the 6th resistance (R6) after
Ground connection, the grid of output the first NMOS tube of termination (MN1)；
The source electrode of first PMOS tube (MP1) and the second PMOS tube (MP2) interconnects and connects supply voltage (VCC), gate interconnection is simultaneously
Connect the drain electrode of the first PMOS tube (MP1) and the first NMOS tube (MN1)；
The grid of second NMOS tube (MN2) connects to be believed with the control of signal inversion at buck converter lower power tube node (SW)
Number, drain electrode connects the drain electrode of the second PMOS tube (MP2) and third NMOS tube (MN3), source electrode ground connection；
The grid of third NMOS tube (MN3), which connects, to be believed with signal at buck converter lower power tube node (SW) with the control of phase
Number, source electrode after the parallel-connection structure of the 5th capacitance (C5) and the 7th resistance (R7) by being grounded；
8th resistance (R8) and the series connection of the 4th capacitance (C4), the source of another termination third NMOS tube (MN3) of the 8th resistance (R8)
Pole, the other end ground connection of the 4th capacitance (C4)；
9th resistance (R9) and the series connection of the 6th capacitance (C6), series connection point export DC voltage (VSW_DC) and to connect the ripple folded
Second input terminal on power-up road, the series connection point of another termination the 8th resistance (R8) and the 4th capacitance (C4) of the 9th resistance (R9),
The other end of 6th capacitance (C6) is grounded.
2. the dynamic according to claim 1 suitable for buck converter output DC maladjustment eliminates circuit, feature exists
In the ripple supercircuit further includes the first buffer (BUF1), the second buffer (BUF2), the tenth resistance (R10) and arteries and veins
Width modulation comparator (PWM),
The input terminal input feedback voltage (V of first buffer (BUF1)FB), output end is connected afterwards by the tenth resistance (R10)
The positive input of the output end and pulse width modulated comparator (PWM) of trsanscondutance amplifier (Gm)；
The input terminal input reference voltage (V of second buffer (BUF2)REF), output end connects pulse width modulated comparator (PWM)
Negative input, the output end of the output end of pulse width modulated comparator (PWM) as the ripple supercircuit.
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| CN109742945B (en) * | 2019-01-04 | 2024-03-08 | 泉芯电子技术(深圳)有限公司 | Internal ripple compensation circuit based on COT control and control method thereof |
| CN112688542B (en) * | 2021-01-06 | 2022-04-29 | 矽力杰半导体技术(杭州)有限公司 | Control circuit and switching converter using same |
| CN112803736B (en) * | 2021-03-08 | 2022-06-21 | 江苏硅国微电子有限公司 | Circuit and method for reducing output ripple of DC-DC converter |
| CN113078817B (en) * | 2021-03-29 | 2022-03-25 | 浙江大学 | Interphase current balance control system suitable for hysteresis control high-frequency two-phase Buck converter |
| CN113607329B (en) * | 2021-07-13 | 2022-10-18 | 复旦大学 | Pressure sensor signal temperature compensation method and pressure sensor |
| CN114552990B (en) * | 2022-03-09 | 2023-04-25 | 电子科技大学 | Ripple control Buck converter based on switching current integrator |
| CN117175938B (en) * | 2023-11-02 | 2024-01-30 | 拓尔微电子股份有限公司 | DC-DC converter |
| CN117650701A (en) * | 2024-01-30 | 2024-03-05 | 芯昇科技有限公司 | Step-down circuit |
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| JP2009148157A (en) * | 2007-12-12 | 2009-07-02 | Micrel Inc | Voltage regulator for utilizing fixed on time with increased maximum duty cycle |
| CN103560668A (en) * | 2013-11-12 | 2014-02-05 | 东南大学 | Method for realizing secondary switch 100% duty ratio output in single-inductor dual-output converter |
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