CN106785891B - A kind of fast front and back of non-overshoot is along Multiple pulse superposition method and apparatus - Google Patents

A kind of fast front and back of non-overshoot is along Multiple pulse superposition method and apparatus Download PDF

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Publication number
CN106785891B
CN106785891B CN201611039250.1A CN201611039250A CN106785891B CN 106785891 B CN106785891 B CN 106785891B CN 201611039250 A CN201611039250 A CN 201611039250A CN 106785891 B CN106785891 B CN 106785891B
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pulse
superimposed
current
superposition
basis
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CN106785891A (en
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刘天强
邹岩
张赛
常治国
高鹏
吕劲松
王浩
石伟
张明冉
杨国杰
皇利杰
陈璐明
张省
冯进喜
袁攀
张公全
李鹏军
夏德印
李振国
胡建超
兰殿星
宁文斌
宋军伟
田勤
张淑敏
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State Grid Corp of China SGCC
Xuji Group Co Ltd
XJ Electric Co Ltd
Xuji Power Co Ltd
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State Grid Corp of China SGCC
Xuji Group Co Ltd
XJ Electric Co Ltd
Xuji Power Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/04Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042Electrical excitation ; Circuits therefor
    • H01S5/0427Electrical excitation ; Circuits therefor for applying modulation to the laser
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/04Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042Electrical excitation ; Circuits therefor
    • H01S5/0428Electrical excitation ; Circuits therefor for applying pulses to the laser

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Electronic Switches (AREA)

Abstract

The present invention relates to a kind of fast front and backs of non-overshoot along Multiple pulse superposition method and apparatus, and Multiple pulse superposition method therein includes: that control generates basis pulses;Chronologically control generates at least one superimposed pulse, and superimposed pulse is successively accumulated in basis pulses.This method, which exports single to obtain prospective current pulse and be converted into multiple current impulses and add up, obtains prospective current pulse, pass through the action sequence of control output superimposed pulse, the superposition for realizing the multiple-pulse on fast front and back edge efficiently solves the problems, such as that single generates expected pulse current and causes pulse current overshoot larger.

Description

A kind of fast front and back of non-overshoot is along Multiple pulse superposition method and apparatus
Technical field
The present invention relates to a kind of fast front and backs of non-overshoot along Multiple pulse superposition method and apparatus, belongs to semiconductor laser drive Dynamic source technology field.
Background technique
Semiconductor laser has the advantages such as small in size, power density is big, high-efficient and service life is long, recently as partly leading The decline of body laser manufacturing cost so that laser application field is quickly grown, such as communication, ranging, radar, weapon, Mark and medical treatment etc. using more and more extensive.Due to the electrical characteristic of its diode, current constant control mode is generallyd use, especially It is the control mode of pulse constant current, current constant control mode is capable of providing biggish peak power and consumes lesser mean power, It has a good application prospect.In some special applications, in scientific research, mark and medical treatment, Multiple pulse superposition can be realized specific Processing technology.
But driving current is the sensible factor of semiconductor laser, stability directly affects the spectrum matter of laser Amount and output power.So stable electric current flat-top and quick electric current rise and fall edge just can guarantee good spectral quality With efficient power output.However, the overshoot that quickly rising edge may cause may result in the damage of semiconductor laser, Cause serious economic loss.Although slower rising edge will not cause overshoot, seriously limit the effective pulsewidth of output and The promotion of repetition rate limits effective optical power output, does not have good application value.
Therefore, how to design it is a the driving current of high reliability can be provided for semiconductor laser, realize wide model The pulsewidth and frequency modulation(PFM) enclosed guarantee no current pulse overshoot, become with fast current rising edge and while failing edge Put a difficult task in field in face of numerous power supply producers.
Summary of the invention
The object of the present invention is to provide a kind of fast front and backs of non-overshoot along Multiple pulse superposition method and apparatus, existing for solving There is single in technology to lead to the problem of current impulse and cause current impulse overshoot larger.
In order to solve the above technical problems, the invention proposes a kind of fast front and backs of non-overshoot along Multiple pulse superposition method, packet Include following scheme:
Method scheme one: the following steps are included:
Step 1, control generates basis pulses;
Step 2, chronologically control generates at least one superimposed pulse, and the superimposed pulse is successively accumulated in the basis In pulse.
Method scheme two: it on the basis of method scheme one, is superimposed at least once up in the superimposed pulse Superimposed pulse flows through the fictitious load to match with driving load characteristic and carries out tune stream.
Method scheme three: on the basis of method scheme two, the fictitious load is in resistance, inductance, capacitor and diode Any one or combinations thereof.
The present invention also provides a kind of fast front and backs of non-overshoot along Multiple pulse superposition device, including following scheme:
Device scheme one: it is exported back including a basis pulses output loop being connected in parallel and at least one superimposed pulse Road;After basis pulses output loop conducting, the superimposed pulse output loop is chronologically sequentially turned on.
Device scheme two: on the basis of device scheme one, at least one of which is folded in the superimposed pulse output loop Two output ends of pluse output circuit are added to be connected with the fictitious load branch to match with driving load characteristic, superimposed pulse output Two output ends and the fictitious load branch of two output ends in circuit by gating circuit switch in the basis pulses output loop Switch connection between road.
Device scheme three: on the basis of device scheme two, the basis pulses output loop includes according to conducting in the same direction The concatenated basic adjustable DC power supply in direction, base power switching device and base current sensor;The superimposed pulse output Circuit includes according to the concatenated superposition adjustable DC power supply of conducting direction in the same direction, superposition device for power switching and superimposed current sensing Device;The gating circuit switch includes the first gated on power switching device and the second gated on power switching device, first choosing For logical power switching device series in the fictitious load branch, one end of the second gated on power switching device and the vacation are negative The one end for carrying branch is connected, and the other end of the second gated on power switching device is corresponding with the basis pulses output loop Output end is connected.
Device scheme four: on the basis of device scheme two or three, the fictitious load is resistance, inductance, capacitor and two poles In pipe any one or combinations thereof.
Device scheme five: on the basis of device scheme three, the device for power switching be triode, MOSFET or IGBT。
Device scheme six: on the basis of device scheme three, the basis adjustable DC power supply and superposition straight-adjustable galvanic electricity Source is adjustable direct voltage source.
The beneficial effects of the present invention are:
The fast front and back of non-overshoot is chronologically controlled along Multiple pulse superposition method generates multiple prospective current pulses, and will generate Multiple current impulses add up, by single export obtain prospective current pulse be converted into multiple prospective current pulse accumulations come Final prospective current pulse is obtained, prospective current pulse and practical generation electric current when effectively improving single output current impulse The larger situation of pulse error, to meet the non-overshoot requirement of acquired current impulse.
Further, by by superimposed pulse flow through with drive the fictitious load that matches of load characteristic to carry out tune stream, by Electric current cannot be mutated in the matching of load characteristic and fast handover procedures, realize single superimposed pulse non-overshoot.
The fast front and back of non-overshoot includes a basis pulses output loop being connected in parallel and extremely along Multiple pulse superposition device A few superimposed pulse output loop exports current impulse by chronologically controlling each pluse output circuit, and by each electric current arteries and veins It is cumulative to rush in row, single is exported to obtain prospective current pulse and be converted into multiple current impulses and is added up to obtain prospective current arteries and veins Punching, prospective current pulse and reality generate the larger situation of current impulse error when effectively improving single output current impulse, To meet the non-overshoot requirement of acquired current impulse.
Further, it is connected with by two output ends in superimposed pulse output loop and is matched with load characteristic is driven Fictitious load branch carries out tune stream according to the fictitious load branch, then passes through gating circuit switch for superimposed pulse by fictitious load branch Road is switched to two output ends of basis pulses output loop, realizes single superimposed pulse non-overshoot.
Detailed description of the invention
Fig. 1 is the structural block diagram of the fast rise time Multiple pulse superposition device of non-overshoot;
Major loop principle sketch when Fig. 2 is two superimposed pulses;
Desired output pulse current when Fig. 3 is two superimposed pulses, load branch electric current, MOSFET pipe driving signal with And the timing diagram of electric current;
The program flow diagram of signal period when Fig. 4 is two superimposed pulses;
The current controller principle sketch in basis pulses circuit when Fig. 5 is two superimposed pulses;
The current controller principle sketch in superimposed pulse circuit when Fig. 6 is two superimposed pulses;
The timing chart in signal period when Fig. 7 is two superimposed pulses;
The timing chart in multiple periods when Fig. 8 is two superimposed pulses.
Specific embodiment
The present invention is further described in detail with reference to the accompanying drawing.
Embodiment of the fast front and back of non-overshoot along Multiple pulse superposition method:
Method includes the following steps:
Step 1, control generates basis pulses;
Step 2, chronologically control generates at least one superimposed pulse, and superimposed pulse is successively accumulated in basis pulses.
By total superimposed pulse of above-mentioned steps all pulses obtained, the current impulse as to be obtained.This method Multiple prospective current pulses are generated by chronologically controlling, and multiple prospective current pulses of generation are added up, by single Output obtains prospective current pulse and is converted into multiple prospective current pulse accumulations to obtain final current impulse, effectively improves Single expected current impulse situation larger with the current impulse error actually generated when exporting current impulse, to realize most Current impulse non-overshoot acquired in end.
Wherein, in order to which the control precision for improving single superimposed pulse is folded at least once in generated superimposed pulse The superimposed pulse added up flows through the fictitious load to match with driving load characteristic and carries out tune stream, so that is obtained after adjusting stream is folded Add pulse current be expected single current pulse amplitude, by after the tune stream the single superimposed pulse for flowing through fictitious load and front Generated all current impulses are overlapped, and finally obtain total superimposed pulse.
Driving load in the present embodiment is semiconductor laser, is a kind of nonlinear load, has diode characteristic, false Load is made of resistance and Diode series.Certainly, when driving load variation, the characteristic according to driving load is needed, accordingly Matched fictitious load is chosen on ground, and under normal circumstances, fictitious load is taken as any in resistance, inductance, capacitor and diode One kind or combinations thereof.
Below by taking two superimposed pulses as an example, the control process of the superposition timing of basis pulses and superimposed pulse is as follows:
T1 moment, control generate basis pulses.
At the T2 moment, control generates the superimposed pulse electric current for flowing through fictitious load, and carries out tune stream to the superimposed pulse electric current, makes It is to need to be superimposed upon the current impulse of basis pulses that the superimposed pulse obtained after stream, which must be adjusted,.
At the T3 moment, superimposed pulse and basis pulses are overlapped.
By taking three superimposed pulses as an example, and the superimposed pulse of last time superposition up flows through and driving load characteristic phase The fictitious load matched carries out tune stream, then the control process of the superposition timing of basis pulses and two superimposed pulses are as follows:
T11 moment, control generate basis pulses.
T12 moment, control generate first superimposed pulse.
First superimposed pulse is overlapped by the T13 moment with basis pulses.
At the T14 moment, control generates second superimposed pulse for flowing through fictitious load, and carries out tune stream to the superimposed pulse, makes It is the current impulse for needing to be superimposed upon in basis pulses and first superimposed pulse that the superimposed pulse obtained after stream, which must be adjusted,.
Second superimposed pulse and first superimposed pulse and basis pulses are overlapped by the T15 moment.
Embodiment of the fast front and back of non-overshoot along Multiple pulse superposition device:
The fast front and back of the non-overshoot is to realize the fast front and back of above-mentioned non-overshoot along Multiple pulse superposition along Multiple pulse superposition device A kind of particular hardware equipment of method.
By taking two superimposed pulses as an example, the fast front and back of non-overshoot is as shown in Figure 1 along the structural block diagram of Multiple pulse superposition device. Generally, which includes major loop, sampling unit, control unit and driving unit.Major loop includes adjustable direct voltage source 1, adjustable direct voltage source 2, basis pulses output loop, the pre- constant current loop of superimposed pulse and superimposed pulse output loop, mainly Generation and two pulses for adjust for realizing basis pulses output, by fictitious load the superimposed pulse of stream are folded in load Add.Sampling unit includes two-way current sample, the i.e. current sample 1 of basis pulses output loop and superimposed pulse output loop Current sample 2 is adjusted according to the PID Closed-loop Constant-current of two-way current sample optimized integration pulse and superimposed pulse.Control unit packet The voltage of the unit of given value of current containing two-way, two-way PID control, two-way adjustable direct voltage source is given and pulse parameter is arranged. Wherein, two-way given value of current unit is respectively the given value of current of the i.e. given value of current of basis pulses and superimposed pulse;Two-way PID control System includes the electric current of the current control of the basis pulses of basis pulses output loop and the superimposed pulse of superimposed pulse output loop Control;Pulse parameter setting includes the repetition of basis pulses, superimposed pulse, basis pulses pulsewidth, superimposed pulse pulsewidth and pulse The setting of the parameters such as frequency.Driving unit includes driving unit 1, driving unit 2 and driving unit 3, mainly realizes control unit The power stage of the driving signal of output is amplified, and driving capability is increased.
Major loop principle letter of the fast front and back of non-overshoot along Multiple pulse superposition device when Fig. 2 gives two superimposed pulses Figure.Wherein, V1 is basic adjustable direct voltage source, and the mean power for providing basis pulses exports, and V2 is superposition straight-adjustable Galvanic electricity potential source, the mean power for providing superimposed pulse export.Certainly, DC voltage source V1 and V2 also can be replaced electric current Source.C1 and C2 is large capacity storage capacitor, and the power output of current impulse is answered for auxiliary phase.R1 and R2 is resistance, R1 conduct Base current sensor, for acquiring the pulse current of basis pulses output loop, R2 is as superimposed current sensor, for adopting Collect the pulse current of superimposed pulse output loop.Q1 is basic device for power switching, and Q2 is that base is superimposed device for power switching, and Q3 is First gated on power switching device, Q4 are the second gated on power switching device.Device for power switching Q1, Q2, Q3 and Q4 are MOSFET pipe is also chosen as other device for power switching such as IGBT or triode certainly, and D2 and D3 are isolating diode, can also It is transformed to triode, MOSET the or IGBT constant power switching device of switch state complementation.
Driving load in the present embodiment is semiconductor laser, is a kind of nonlinear load, has diode characteristic, It is replaced in 2 in figure with diode D1, while being made of the fictitious load to match with driving load D4 and R3.Certainly, when driving is negative When carrying variation, need correspondingly to choose matched fictitious load according to the characteristic of driving load, under normal circumstances, vacation is negative Carry any one being taken as in resistance, inductance, capacitor and diode or combinations thereof.
In Fig. 2, basic adjustable direct voltage source V1, MOSFET pipe Q1, resistance R1 and capacitor C1 constitute basis pulses Output loop.Superposition adjustable direct voltage source V2, MOSFET pipe Q2, resistance R2 and capacitor C2 constitute superimposed pulse and export back Road.First gated on power switching device Q3 and the second gated on power switching device Q4 constitute gating circuit switch, and Q3 is connected on In the fictitious load branch being made of D4 and R3, one end of Q4 is connected to one end i.e. Q3 of fictitious load branch far from the one of fictitious load End, the other end of Q4 are connected to the correspondence output end i.e. current input terminal of Q1 of basis pulses output loop, basis pulses output The selection principle of the correspondence output end in circuit is: when Q3 and Q4 are connected in turn, realizing that basis is flowed through in the selection of superimposed pulse electric current Two output ends of pluse output circuit and the fictitious load branch being made of D4 and R3.It is, when Q3 conducting and Q4 disconnection, by The superimposed pulse electric current of superimposed pulse output loop output flows through fictitious load branch, when Q3 is disconnected and Q4 is connected, by superposition arteries and veins The superimposed pulse electric current for rushing output loop output flows through branch where the i.e. diode D1 of two output ends of basis pulses output loop.
The specific mode of connection of the above-mentioned gating circuit switch being made of Q3 and Q4 is only a kind of tool of gating switch branch Body embodiment, with regard to the gating circuit switch that Q3 and Q4 is constituted, the branch switching string where realizing fictitious load branch and diode D1 In the case where being associated in superimposed pulse output loop this purpose, there are also various deformations for Q3 and the specific connection mode of Q4.In addition, gating Other devices also can be selected in switching circuit, and accordingly design specific connection mode.
It certainly, can be by two output ends of basis pulses output loop and superposition arteries and veins in the case where no fictitious load branch Rush output loop two are output terminal direct paralleled, the superposition of optimized integration pulse and superimposed pulse.
In pulse current additive process, Q1 work acquires the electric current IS1 of resistance R1, to basic arteries and veins in linear amplification region The given value of current value of punching carries out negative-feedback PID adjusting, controls DC voltage source V1, so that Q1 impedance adjustable, capacitor C1 compensates base Voltage landing when plinth pulse exports realizes the basis pulses of constant output current, guarantees the flat-top degree of output basis pulses.
Q2 work acquires the electric current IS2 of resistance R2 in linear amplification region, carries out to the given value of current value of superimposed pulse negative anti- It presents PID to adjust, controls DC voltage source V2, so that Q2 impedance adjustable, capacitor C2 compensates voltage landing when superimposed pulse output, It realizes the superimposed pulse of constant output current, guarantees the flat-top degree of output superimposed pulse.
Q3 and Q4 work is in switch state, when Q3 conducting and when Q4 is disconnected, the superposition that is exported by superimposed pulse output loop Pulse current flows through fictitious load branch, and the pulse current for flowing through fictitious load is the pulse current for needing to be superimposed upon in basis pulses Value.After superimposed pulse is stablized, into switching preparation state.When needing for superimposed pulse to be superimposed upon in basis pulses, Q4 is led While logical, Q3 is turned off rapidly therewith, and superimposed pulse electric current is transferred to where the i.e. diode D1 of driving load by fictitious load branch Branch.Since circuit is there are parasitic inductance, which will not mutate, and driving is input to after being superimposed with basis pulses Load.Since fictitious load has carried out impedance matching with driving load, it can greatly reduce and superimposed pulse electric current is transferred to driving Dynamic response when load branch, reduces pulse overshoot.
When two superimposed pulses, desired output electric current, non-overshoot fast rise time Multiple pulse superposition constant-current source in it is each The driving signal of MOSFET pipe and the timing diagram of electric current are as shown in Figure 3.
The t1 moment issues basis pulses given value of current value IG1, makes Q1 work in linear amplification region, Q1 by PID adjusting There is electric current to flow through, basis pulses output loop exports basis pulses electric current.Since basis pulses width is larger, can be rung by step Slow voltage loop is answered to realize the non-overshoot in forward position, but the leading-edge pulse time is longer.
The t2 moment issues superimposed pulse given value of current value IG2, opens Q3 driving, and Q3 conducting makes Q2 work by PID adjusting Work has electric current to flow through in linear amplification region, Q2 and Q3, and the fictitious load branch of superimposed pulse output loop exports desired superposition Pulse current realizes pre- constant current and reaches stable state.In this process, the time required in order to reduce Q3 conducting, voltage control The step response fast speed of loop processed can be rapidly achieved pre- perseverance although the current overshoot amount of fictitious load branch is relatively large The stable state of stream.
The t3 moment opens Q4 driving, and Q3 driving, Q3 cut-off are closed in Q4 conducting, and Q2 continues to operate in linear amplification region, Q2 There is electric current to flow through in Q4.Since superimposed pulse electric current cannot be mutated, the superimposed pulse electric current of superimposed pulse output loop output Driving load branch is switched to by fictitious load, is overlapped with basis pulses electric current, since fictitious load branch current has reached Stable state, and fictitious load and the impedance of Constant Current Load match, and load effect is basically unchanged in handoff procedure, to realize The non-overshoot of superimposed current, meanwhile, superimposed pulse current branch is switched fast by switch mosfet state, realizes superimposed pulse Fast rise time.
The t4 moment closes Q4 driving, Q4 cut-off, and basis pulses given value of current value returns 0, and superimposed pulse given value of current value returns 0, Current period pulse end of output.
The program flow diagram of signal period when two superimposed pulses is as shown in figure 4, operational process is as follows:
1) be arranged pulse output parameter, comprising basis pulses, superimposed pulse, basis pulses pulsewidth, superimposed pulse pulsewidth and The setting of the parameters such as the repetition rate of pulse.
2) basis pulses given value of current value IG1 is issued, the voltage of basic DC voltage source V1 is stepped up, until basic function The voltage at the both ends rate switching device Q1 reaches its on state threshold voltage, the electric current IS1 of resistance R1 can be detected at this time, according to electric current IS1 carries out PID adjusting, finely tunes the voltage of DC power supply V1, and control basis pulses output loop exports desired basis pulses electricity Stream.Wherein, the control process that PID is adjusted are as follows: using basis pulses given value of current value IG1 as the benchmark of basic pulse current control Value, using the electric current IS1 on the resistance R1 that the current sampling unit of basis pulses output loop is adopted as controlled device, passes through ratio Compared with the size of IG1 and IS1, the error amount of the two is obtained, the error amount is using a certain in ratio, integral and derivative controller Kind or combinations thereof, the grid level of finally obtained control output signal driving Q1 makes Q1 work in linear amplification region, compensates base Overvoltage on plinth DC voltage source V1, so that basis pulses output loop be made to export desired basis pulses electric current, basic arteries and veins Rush electric current constant output.
In the present embodiment, the constant-current controller of basis pulses output loop is as shown in Figure 5.Using high speed amplifier AD845AQ is 5.1k ohm as master controller amplifier, the input resistance of amplifier, obtains the inertia rings of controller by trial and error procedure The integrating capacitor of section is 220pF, differential capacitance 470pF, can meet the current impulse with particular semiconductor lesser load and ring Answer speed, and non-overshoot.Current error value between IG1 and IS1 is input to after master controller AD845AQ is amplified The push-pull circuit being made of Darlington transistor MJE172 and MJE182 carries out power amplification, finally obtains control output signal DRV1. The grid level that the base power switching device Q1 in Fig. 2 is driven using DRV1 makes Q1 work in linear amplification region, compensated foundation Overvoltage on adjustable direct voltage source V1, so that basis pulses output loop be made to export desired basis pulses electric current.
3) timing to superimposed pulse electric current output time subtracts the superimposed pulse in fictitious load and is superimposed the pre-adjusted time, beats Q3 driving is opened, superimposed pulse given value of current value IG2 is issued, is stepped up the voltage of DC voltage source V2, until superposition power is opened The voltage for closing the both ends device Q2 reaches its on state threshold voltage, the electric current IS2 of resistance R2 can be detected at this time, according to electric current IS2 PID adjusting is carried out, the voltage of DC power supply V2 is finely tuned, control superimposed pulse output loop exports desired superimposed pulse electric current. Wherein, the control process that PID is adjusted are as follows: using superimposed pulse given value of current value IG2 as a reference value of superimposed pulse current control, Using the electric current IS2 on the resistance R2 that the current sampling unit of superimposed pulse output loop is adopted as controlled device, by comparing The size of IG2 and IS2 obtains the error amount of the two, and the error amount is using a certain kind in ratio, integral and derivative controller Or combinations thereof, the grid level of finally obtained control output signal driving Q2 makes Q2 work in linear amplification region, compensation superposition Overvoltage on DC voltage source V2, so that the desired superimposed pulse for making the output of superimposed pulse output loop flow through fictitious load is electric Stream, before the conducting of Q4 gating switch, superimposed pulse electric current constant output.
In the present embodiment, the constant-current controller in superimposed pulse circuit is as shown in Figure 6.Made using high speed amplifier AD845AQ For master controller amplifier, the input resistance of amplifier is 5.1k ohm, and the integral of the inertial element of controller is obtained by trial and error procedure Capacitor is 100pF, differential capacitance 2200pF, can meet the current impulse response speed of the fictitious load after load characteristic matches Degree and overshoot.Current error value between IG2 and IS2 is input to after master controller AD845AQ is amplified by Darlington The push-pull circuit of pipe MJE172 and MJE182 composition, carries out power amplification, finally obtains control output signal DRV2.Using DRV2 The grid level for driving the superposition device for power switching Q2 in Fig. 2 makes Q2 work in linear amplification region, compensation superposition adjustable DC Overvoltage on voltage source V2, so that superimposed pulse output loop be made to export desired superimposed pulse electric current.
4) timing opens Q4 driving, closes Q3 driving, not due to superimposed pulse electric current to superimposed pulse electric current output time It can be mutated, the superimposed pulse electric current of superimposed pulse output loop output is switched to driving load branch by fictitious load branch, with base Plinth pulse current is overlapped.Since fictitious load branch current has reached stable state, and fictitious load and Constant Current Load Characteristic matches, and load effect is basically unchanged in handoff procedure, so that superimposed pulse electric current is superimposed to basis pulses electric current On obtained total superimposed current non-overshoot.
5) timing closes Q4 driving, basis pulses given value of current value and the superposition of superimposed pulse electric current to the end-of-pulsing moment Given value zero.
6) the timing toff time is reached, current period terminates.
After the above process needs several output periods to dozens of pulse, V1 and V2 voltage reaches controlling value, that is, can reach Stable state, and sustainable output.
Current detecting, repetition rate 400Hz are carried out using current Hall in the present embodiment, basis pulses pulsewidth is 300us, Current amplitude is taken as 10A, and superimposed pulse pulsewidth is 10us, and current amplitude is taken as 20A.When Fig. 7 gives two superimposed pulses The timing chart in multiple periods when timing chart in signal period, Fig. 8 give two superimposed pulses.
Certainly, above-mentioned is only a kind of specific sampling embodiment to resistance progress current sample, can be according to the actual situation To choose suitable sample mode, such as the sampling of resistance sampling, current transformer.

Claims (7)

1. a kind of fast front and back of non-overshoot is along Multiple pulse superposition method, which comprises the following steps:
Step 1, control generates basis pulses;
Step 2, chronologically control generates at least one superimposed pulse, and the superimposed pulse is successively accumulated in the basis pulses On;
The superimposed pulse being superimposed up at least once in the superimposed pulse flows through the vacation to match with driving load characteristic Load carries out tune stream.
2. the fast front and back of non-overshoot according to claim 1 is along Multiple pulse superposition method, which is characterized in that the fictitious load For in resistance, inductance, capacitor and diode any one or combinations thereof.
3. a kind of fast front and back of non-overshoot is along Multiple pulse superposition device, which is characterized in that a basic arteries and veins including being connected in parallel Rush output loop and at least one superimposed pulse output loop;After basis pulses output loop conducting, the superposition arteries and veins Output loop is rushed chronologically to sequentially turn on;
Two output ends of at least one of which superimposed pulse output loop are connected with and drive in the superimposed pulse output loop The fictitious load branch that load characteristic matches, two output ends of the superimposed pulse output loop are by gating circuit switch described Switch connection between two output ends of basis pulses output loop and the fictitious load branch.
4. the fast front and back of non-overshoot according to claim 3 is along Multiple pulse superposition device, which is characterized in that the basis arteries and veins Rushing output loop includes according to the concatenated basic adjustable DC power supply of conducting direction in the same direction, base power switching device and basis electricity Flow sensor;The superimposed pulse output loop includes according to the concatenated superposition adjustable DC power supply of conducting direction in the same direction, superposition Device for power switching and superimposed current sensor;The gating circuit switch includes the first gated on power switching device and the second choosing Logical device for power switching, the first gated on power switching device are connected in the fictitious load branch, the second gating function One end of rate switching device is connected with one end of the fictitious load branch, the other end of the second gated on power switching device with The correspondence output end of the basis pulses output loop is connected.
5. the fast front and back of non-overshoot according to claim 3 or 4 is along Multiple pulse superposition device, which is characterized in that the vacation Load is any one in resistance, inductance, capacitor and diode or combinations thereof.
6. the fast front and back of non-overshoot according to claim 4 is along Multiple pulse superposition device, which is characterized in that the basis function Rate switching device, superposition device for power switching, the first gated on power switching device and the second gated on power switching device are three Pole pipe, MOSFET or IGBT.
7. the fast front and back of non-overshoot according to claim 4 is along Multiple pulse superposition device, which is characterized in that the basis can Tuning DC power supply and superposition adjustable DC power supply are adjustable direct voltage source.
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