CN106785891A - A kind of non-overshoot it is fast before and after along Multiple pulse superposition method and apparatus - Google Patents
A kind of non-overshoot it is fast before and after along Multiple pulse superposition method and apparatus Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0427—Electrical excitation ; Circuits therefor for applying modulation to the laser
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0428—Electrical excitation ; Circuits therefor for applying pulses to the laser
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- General Physics & Mathematics (AREA)
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Abstract
The present invention relates to a kind of the fast front and rear along Multiple pulse superposition method and apparatus of non-overshoot, Multiple pulse superposition method therein includes：Control produces basis pulses；Chronologically control produces at least one superimposed pulse, and superimposed pulse is accumulated in basis pulses successively.Single output acquisition prospective current pulse is converted into multiple current impulses and adds up to obtain prospective current pulse by the method, by the action sequence of controlled output superimposed pulse, the superposition of the multiple-pulse on fast front and rear edge is realized, efficiently solves the problems, such as that single produces expected pulse current and causes pulse current overshoot larger.
Description
Technical field
The present invention relates to a kind of the fast front and rear along Multiple pulse superposition method and apparatus of non-overshoot, belong to semiconductor laser drive
Dynamic source technology field.
Background technology
Semiconductor laser has the advantages such as small volume, power density big, efficiency high and long lifespan, recently as partly leading
The decline of body laser manufacturing cost so that laser application field quickly grows, such as communication, range finding, radar, weapon,
The application of mark and medical treatment etc. is more and more extensive.Due to the electrical characteristic of its diode, current constant control mode is generally used, especially
It is the control mode of pulse constant current, current constant control mode can provide larger peak power and the less mean power of consumption,
Have a good application prospect.In some special applications, such as in scientific research, mark and medical treatment, Multiple pulse superposition can be realized specific
Processing technology.
But, driving current is the sensible factor of semiconductor laser, and its stability directly affects the spectrum matter of laser
Amount and power output.So, the electric current flat-top of stabilization and quick electric current rise and fall edge just can guarantee that good spectral quality
With efficient power output.However, overshoot may result in the damage of semiconductor laser caused by quickly rising edge is possible,
Cause serious economic loss.Although slower rising edge will not cause overshoot, it is serious limit the effective pulsewidth of output and
The lifting of repetition rate, limits effective luminous power output, without good application value.
Therefore, a driving current that high reliability can be provided for semiconductor laser how is designed, model wide is realized
The pulsewidth enclosed and frequency modulation(PFM), with fast current rising edge and while trailing edge, it is ensured that no current pulse overshoot, turn into
Put a difficult task in face of numerous power supply producers in field.
The content of the invention
It is existing for solving it is an object of the invention to provide a kind of the fast front and rear along Multiple pulse superposition method and apparatus of non-overshoot
Single produces current impulse and causes the larger problem of current impulse overshoot in having technology.
In order to solve the above technical problems, the present invention proposes a kind of the fast front and rear along Multiple pulse superposition method, bag of non-overshoot
Include following scheme：
Method scheme one：Comprise the following steps：
Step 1, control produces basis pulses；
Step 2, chronologically control produces at least one superimposed pulse, and the superimposed pulse is accumulated in into the basis successively
In pulse.
Method scheme two：On the basis of method scheme one, it is superimposed at least once up in described superimposed pulse
Superimposed pulse flows through the fictitious load matched with driving load characteristic and carries out tune stream.
Method scheme three：On the basis of method scheme two, the fictitious load is in resistance, inductance, electric capacity and diode
Any one or its combination.
Present invention also offers a kind of the fast front and rear along Multiple pulse superposition device, including following scheme of non-overshoot：
Device scheme one：Exported back including a basis pulses output loop being connected in parallel and at least one superimposed pulse
Road；After basis pulses output loop conducting, the superimposed pulse output loop is chronologically sequentially turned on.
Device scheme two：On the basis of device scheme one, at least one of which is folded in the superimposed pulse output loop
Plus two output ends of pluse output circuit are connected with the fictitious load branch road matched with driving load characteristic, superimposed pulse output
Two output ends in loop pass through two output ends and the fictitious load branch of the gating circuit switch in the basis pulses output loop
Switch connection between road.
Device scheme three：On the basis of device scheme two, the basis pulses output loop is included according to conducting in the same direction
Basic adjustable DC power supply, base power switching device and base current sensor that direction is connected；The superimposed pulse output
Loop includes that the superposition adjustable DC power supply connected according to conducting direction in the same direction, superposition device for power switching and superimposed current are sensed
Device；The gating circuit switch includes the first gated on power switching device and the second gated on power switching device, first choosing
Logical power switching device series are in the fictitious load branch road, and one end of the second gated on power switching device is false negative with described
The one end for carrying branch road is connected, and the other end of the second gated on power switching device is corresponding with the basis pulses output loop
Output end is connected.
Device scheme four：On the basis of device scheme two or three, the fictitious load is resistance, inductance, electric capacity and two poles
Any one in pipe or its combination.
Device scheme five：On the basis of device scheme three, the device for power switching be triode, MOSFET or
IGBT。
Device scheme six：On the basis of device scheme three, the basic adjustable DC power supply and superposition adjustable DC are electric
Source is adjustable direct voltage source.
The beneficial effects of the invention are as follows：
The fast front and rear of non-overshoot chronologically controls to produce multiple prospective current pulses along Multiple pulse superposition method, and will produce
Multiple current impulses added up, by single output obtain prospective current pulse be converted into multiple prospective current pulse accumulations come
Final prospective current pulse is obtained, prospective current pulse produces electric current with actual when effectively improving single output current pulse
The larger situation of pulse error, so as to meet the non-overshoot requirement of acquired current impulse.
Further, the fictitious load matched with driving load characteristic is flowed through to carry out tune stream by by superimposed pulse, by
Electric current can not be mutated in the matching of load characteristic and fast handover procedures, realize single superimposed pulse non-overshoot.
Non-overshoot it is fast before and after include a basis pulses output loop being connected in parallel and extremely along Multiple pulse superposition device
A few superimposed pulse output loop, by chronologically controlling each pluse output circuit output current pulse, and by each electric current arteries and veins
Rush in row cumulative, single output acquisition prospective current pulse is converted into multiple current impulses adds up to obtain prospective current arteries and veins
Punching, prospective current pulse and the actual situation for producing current impulse error larger when effectively improving single output current pulse,
So as to meet the non-overshoot requirement of acquired current impulse.
Further, matched with driving load characteristic by being connected with two output ends of superimposed pulse output loop
Fictitious load branch road, tune stream is carried out according to the fictitious load branch road, then by gating circuit switch by superimposed pulse by fictitious load branch
Road is switched to two output ends of basis pulses output loop, realizes single superimposed pulse non-overshoot.
Brief description of the drawings
Fig. 1 is the structured flowchart of the fast rise time Multiple pulse superposition device of non-overshoot；
Major loop principle sketch when Fig. 2 is two superimposed pulses；
Desired output pulse current when Fig. 3 is two superimposed pulses, load branch electric current, MOSFET pipes drive signal with
And the timing diagram of electric current；
The program flow diagram of signal period when Fig. 4 is two superimposed pulses；
The current controller principle sketch in basis pulses loop when Fig. 5 is two superimposed pulses；
The current controller principle sketch in superimposed pulse loop when Fig. 6 is two superimposed pulses；
The timing chart in signal period when Fig. 7 is two superimposed pulses；
The timing chart in multiple cycles when Fig. 8 is two superimposed pulses.
Specific embodiment
The present invention is further described in detail below in conjunction with the accompanying drawings.
The fast front and rear embodiment along Multiple pulse superposition method of non-overshoot：
The method is comprised the following steps：
Step 1, control produces basis pulses；
Step 2, chronologically control produces at least one superimposed pulse, and superimposed pulse is accumulated in basis pulses successively.
Total superimposed pulse of all pulses obtained by above-mentioned steps, the current impulse as to be obtained.This method
By chronologically controlling to produce multiple prospective current pulses, and the multiple prospective current pulses for producing are added up, by single
Output obtains prospective current pulse and is converted into multiple prospective current pulse accumulations to obtain final current impulse, effectively improves
The expected current impulse situation larger with the actual current impulse error for producing during single output current pulse, so as to realize most
Current impulse non-overshoot acquired in end.
Wherein, in order to improve the control accuracy of single superimposed pulse, in produced superimposed pulse, fold at least once
The superimposed pulse added up flows through the fictitious load matched with driving load characteristic and carries out tune stream so that what is obtained after adjusting stream is folded
Plus pulse current is expected single current pulse amplitude, by the tune stream after the single superimposed pulse for flowing through fictitious load with above
Produced all current impulses are overlapped, and finally obtain total superimposed pulse.
Driving load in the present embodiment is semiconductor laser, is a kind of nonlinear load, false with diode characteristic
Load is made up of resistance and Diode series.Certainly, when driving load changes, it is necessary to according to the characteristic of driving load, accordingly
Matched fictitious load is chosen on ground, and generally, fictitious load is taken as any in resistance, inductance, electric capacity and diode
A kind of or its combination.
Below by taking two superimposed pulses as an example, the control process of the superposition sequential of basis pulses and superimposed pulse is as follows：
T1 moment, control produces basis pulses.
T2 moment, control produces the superimposed pulse electric current for flowing through fictitious load, and carries out tune stream to the superimposed pulse electric current, makes
It is to need to be superimposed upon the current impulse of basis pulses that the superimposed pulse obtained after stream must be adjusted.
At the T3 moment, superimposed pulse is overlapped with basis pulses.
By taking three superimposed pulses as an example, and last time superposition superimposed pulse up is flowed through and driving load characteristic phase
The fictitious load matched somebody with somebody carries out tune stream, then the control process of basis pulses and two superposition sequential of superimposed pulse is：
T11 moment, control produces basis pulses.
T12 moment, control produces first superimposed pulse.
At the T13 moment, first superimposed pulse is overlapped with basis pulses.
T14 moment, control produces second superimposed pulse for flowing through fictitious load, and carries out tune stream to the superimposed pulse, makes
It is the current impulse for needing to be superimposed upon in basis pulses and first superimposed pulse that the superimposed pulse obtained after stream must be adjusted.
At the T15 moment, second superimposed pulse is overlapped with first superimposed pulse and basis pulses.
The fast front and rear embodiment along Multiple pulse superposition device of non-overshoot：
The non-overshoot it is fast before and after along Multiple pulse superposition device be realize above-mentioned non-overshoot it is fast before and after along Multiple pulse superposition
A kind of particular hardware equipment of method.
By taking two superimposed pulses as an example, non-overshoot it is fast before and after it is as shown in Figure 1 along the structured flowchart of Multiple pulse superposition device.
Generally, the device includes major loop, sampling unit, control unit and driver element.Major loop includes adjustable direct voltage source
1st, adjustable direct voltage source 2, basis pulses output loop, the pre- constant current loop of superimposed pulse and superimposed pulse output loop, mainly
The generation and two pulses for for optimized integration pulse output, by fictitious load adjust the superimposed pulse of stream are folded in load
Plus.Current sample 1 and superimposed pulse output loop of the sampling unit comprising two-way current sample, i.e. basis pulses output loop
Current sample 2, the PID Closed-loop Constant-currents regulation according to two-way current sample optimized integration pulse and superimposed pulse.Control unit bag
The unit of given value of current containing two-way, two-way PID control, the voltage of two-way adjustable direct voltage source is given and pulse parameter is set.
Wherein, two-way given value of current unit is respectively the given value of current of the i.e. given value of current of basis pulses and superimposed pulse；Two-way PID is controlled
System includes the electric current of the current control of the basis pulses of basis pulses output loop and the superimposed pulse of superimposed pulse output loop
Control；Pulse parameter sets the repetition comprising basis pulses, superimposed pulse, basis pulses pulsewidth, superimposed pulse pulsewidth and pulse
The isoparametric setting of frequency.Driver element includes driver element 1, driver element 2 and driver element 3, mainly realizes control unit
The power stage of the drive signal of output is amplified, and increases driving force.
The fast front and rear major loop principle letter along Multiple pulse superposition device of non-overshoot when Fig. 2 gives two superimposed pulses
Figure.Wherein, adjustable direct voltage source based on V1, the mean power for providing basis pulses is exported, and V2 is superposition straight-adjustable
Stream voltage source, the mean power for providing superimposed pulse is exported.Certainly, direct voltage source V1 and V2 also can be replaced electric current
Source.C1 and C2 is Large Copacity storage capacitor, for the power output of auxiliary phase induced current pulse.R1 and R2 is resistance, R1 conducts
Base current sensor, the pulse current for gathering basis pulses output loop, R2 as superimposed current sensor, for adopting
Collect the pulse current of superimposed pulse output loop.Device for power switching based on Q1, Q2 is that base is superimposed device for power switching, and Q3 is
First gated on power switching device, Q4 is the second gated on power switching device.Device for power switching Q1, Q2, Q3 and Q4 are
MOSFET is managed, and other device for power switching such as IGBT or triode are also chosen as certainly, and D2 and D3 is isolating diode, also may be used
It is transformed on off state complementary triode, MOSET or IGBT constant power switching devices.
Driving load in the present embodiment is semiconductor laser, is a kind of nonlinear load, with diode characteristic,
Replaced with diode D1 in 2 in figure, while constituting the fictitious load matched with driving load by D4 and R3.Certainly, it is negative when driving
, it is necessary to according to the characteristic of driving load, correspondingly choose matched fictitious load when carrying change, generally, vacation is negative
Load is taken as any one or its combination in resistance, inductance, electric capacity and diode.
In fig. 2, basic adjustable direct voltage source V1, MOSFET pipe Q1, resistance R1 and electric capacity C1 constitute basis pulses
Output loop.Superposition adjustable direct voltage source V2, MOSFET pipe Q2, resistance R2 and electric capacity C2 constitute superimposed pulse and export back
Road.First gated on power switching device Q3 and the second gated on power switching device Q4 constitute gating circuit switch, and Q3 is connected on
In the fictitious load branch road be made up of D4 and R3, one end of Q4 is connected to one end i.e. Q3 of fictitious load branch road away from the one of fictitious load
End, the other end of Q4 is connected to the corresponding output end i.e. current input terminal of Q1 of basis pulses output loop, basis pulses output
The selection principle of the corresponding output end in loop is：When Q3 and Q4 are turned in turn, realize that basis is flowed through in the selection of superimposed pulse electric current
Two output ends of pluse output circuit and the fictitious load branch road being made up of D4 and R3.It is, when Q3 conductings and Q4 disconnections, by
The superimposed pulse electric current of superimposed pulse output loop output flows through fictitious load branch road, when Q3 disconnects and Q4 is turned on, by superposition arteries and veins
The superimposed pulse electric current for rushing output loop output flows through the two output ends i.e. diode D1 places branch road of basis pulses output loop.
A kind of tool of the specific mode of connection of the above-mentioned gating circuit switch being made up of Q3 and Q4 only gating switch branch road
Body embodiment, with regard to the gating circuit switch that Q3 and Q4 is constituted, the branch road switching string where fictitious load branch road and diode D1 is realized
In the case of being associated in superimposed pulse output loop this purpose, the specific connection modes of Q3 and Q4 also have various deformation.In addition, gating
On-off circuit also can select other devices, and the specific connection mode of respective design.
Certainly, in the case of no fictitious load branch road, can be by two output ends of basis pulses output loop and superposition arteries and veins
Rush output loop two are output terminal direct paralleled, optimized integration pulse and the superposition of superimposed pulse.
In pulse current additive process, Q1 is operated in linear amplification region, the electric current IS1 of collection resistance R1, to basic arteries and veins
The given value of current value of punching carries out negative-feedback PID regulations, control direct voltage source V1 so that Q1 impedance adjustables, electric capacity C1 compensation base
Voltage landing when plinth pulse is exported, realizes the basis pulses of constant output current, it is ensured that the flat-top degree of output basis pulses.
Q2 is operated in linear amplification region, and the electric current IS2 of collection resistance R2, the given value of current value to superimposed pulse bear instead
Feedback PID regulations, voltage landing when control direct voltage source V2 so that Q2 impedance adjustables, electric capacity C2 compensation superimposed pulse are exported,
Realize the superimposed pulse of constant output current, it is ensured that the flat-top degree of output superimposed pulse.
Q3 and Q4 are operated on off state, when Q3 conductings and Q4 disconnections, the superposition exported by superimposed pulse output loop
Pulse current flows through fictitious load branch road, and it is to need to be superimposed upon the pulse current in basis pulses to flow through the pulse current of fictitious load
Value.After superimposed pulse stabilization, into switching SBR.When needing to be superimposed upon superimposed pulse in basis pulses, Q4 leads
While logical, Q3 is turned off rapidly therewith, and superimposed pulse electric current is transferred to where the i.e. diode D1 of driving load by fictitious load branch road
Branch road.Because circuit has stray inductance, the superimposed pulse will not undergo mutation, and be input to driving after being superimposed with basis pulses
Load.Because fictitious load has carried out impedance matching with driving load, can greatly reduce and superimposed pulse electric current is transferred to driving
Dynamic response during load branch, reduces pulse overshoot.
During two superimposed pulses, in desired output electric current, the fast rise time Multiple pulse superposition constant-current source of non-overshoot each
The drive signal of MOSFET pipes and the timing diagram of electric current are as shown in Figure 3.
At the t1 moment, basis pulses given value of current value IG1 is issued, being adjusted by PID makes Q1 be operated in linear amplification region, in Q1
There is electric current to flow through, basis pulses output loop output basis pulses electric current.Because basis pulses width is larger, can be rung by step
Slow voltage loop is answered to realize the non-overshoot in forward position, but the leading-edge pulse time is more long.
At the t2 moment, superimposed pulse given value of current value IG2 is issued, open Q3 and drive, Q3 conductings, being adjusted by PID makes Q2 works
Work has electric current to flow through in linear amplification region, Q2 and Q3, and the fictitious load branch road of superimposed pulse output loop exports desired superposition
Pulse current, realizes pre- constant current and reaches stable state.In this process, the time required in order to reduce Q3 conductings, voltage control
The step response speed of loop processed, although the current overshoot amount of fictitious load branch road is relatively large, but can be rapidly achieved pre- perseverance
The stable state of stream.
At the t3 moment, open Q4 and drive, Q4 conductings are closed Q3 and driven, and Q3 cut-offs, Q2 continues to operate in linear amplification region, Q2
With there is electric current to flow through in Q4.Because superimposed pulse electric current can not be mutated, the superimposed pulse electric current of superimposed pulse output loop output
Driving load branch road is switched to by fictitious load, is overlapped with basis pulses electric current, because fictitious load branch current has reached
Stable state, and fictitious load and Constant Current Load matches impedances, load effect is basically unchanged in handoff procedure, so as to realize
The non-overshoot of superimposed current, meanwhile, superimposed pulse current branch is switched fast by switch mosfet state, realizes superimposed pulse
Fast rise time.
At the t4 moment, close Q4 and drive, Q4 cut-offs, basis pulses given value of current value returns 0, and superimposed pulse given value of current value returns 0,
Current period pulse end of output.
The program flow diagram of signal period during two superimposed pulses is as shown in figure 4, running is as follows：
1) set pulse output parameter, comprising basis pulses, superimposed pulse, basis pulses pulsewidth, superimposed pulse pulsewidth and
The isoparametric setting of repetition rate of pulse.
2) basis pulses given value of current value IG1 is issued, the voltage of basic direct voltage source V1 is stepped up, until basic work(
The voltage at rate switching device Q1 two ends reaches its on state threshold voltage, the electric current IS1 of resistance R1 is now can detect, according to electric current
IS1 carries out PID regulations, the voltage of fine setting dc source V1, and control basis pulses output loop exports desired basis pulses electricity
Stream.Wherein, the control process of PID regulations is：By the benchmark of pulse current control based on basis pulses given value of current value IG1
Value, the electric current IS1 on resistance R1 that the current sampling unit of basis pulses output loop is adopted as controlled device, by than
Compared with the size of IG1 and IS1, both error amounts are obtained, the error amount is again by a certain in ratio, integration and derivative controller
Plant or its combination, the controlled output signal for finally giving drives the grid level of Q1, Q1 is operated in linear amplification region, compensates base
Overvoltage on plinth direct voltage source V1, so that basis pulses output loop exports desired basis pulses electric current, basic arteries and veins
Rush electric current constant output.
In the present embodiment, the constant-current controller of basis pulses output loop is as shown in Figure 5.Using high speed amplifier
Used as master controller amplifier, the input resistance of amplifier is 5.1k ohm to AD845AQ, and the inertia rings of controller are obtained by trial and error procedure
The integrating capacitor of section is 220pF, and differential capacitance is 470pF, can meet the current impulse with particular semiconductor lesser load and ring
Answer speed, and non-overshoot.Current error value between IG1 and IS1 is input to after master controller AD845AQ is amplified
The push-pull circuit being made up of Darlington transistor MJE172 and MJE182, carries out power amplification, finally gives controlled output signal DRV1.
The grid level of the base power switching device Q1 in Fig. 2 is driven using DRV1, Q1 is operated in linear amplification region, compensated foundation
Overvoltage on adjustable direct voltage source V1, so that basis pulses output loop exports desired basis pulses electric current.
3) superimposed pulse that timing to superimposed pulse electric current output time is subtracted in fictitious load is superimposed the preregulated time, beats
Q3 drivings are opened, superimposed pulse given value of current value IG2 is issued, the voltage of direct voltage source V2 is stepped up, until superposition power is opened
The voltage for closing device Q2 two ends reaches its on state threshold voltage, the electric current IS2 of resistance R2 is now can detect, according to electric current IS2
PID regulations are carried out, the voltage of fine setting dc source V2, control superimposed pulse output loop exports desired superimposed pulse electric current.
Wherein, the control process of PID regulations is：Using superimposed pulse given value of current value IG2 as superimposed pulse current control a reference value,
The electric current IS2 on resistance R2 that the current sampling unit of superimposed pulse output loop is adopted as controlled device, by comparing
The size of IG2 and IS2, obtains both error amounts, and the error amount is again by a certain kind in ratio, integration and derivative controller
Or its combination, the grid level of the controlled output signal driving Q2 for finally giving, Q2 is operated in linear amplification region, compensation superposition
Overvoltage on direct voltage source V2, so that the output of superimposed pulse output loop flows through the desired superimposed pulse electricity of fictitious load
Stream, before the conducting of Q4 gating switches, superimposed pulse electric current constant output.
In the present embodiment, the constant-current controller in superimposed pulse loop is as shown in Figure 6.Made using high speed amplifier AD845AQ
It is master controller amplifier, the input resistance of amplifier is 5.1k ohm, and the integration of the inertial element of controller is obtained by trial and error procedure
Electric capacity is 100pF, and differential capacitance is 2200pF, can meet and respond speed by the current impulse of the fictitious load after load characteristic matching
Degree and overshoot.Current error value between IG2 and IS2 is input to by Darlington after master controller AD845AQ is amplified
The push-pull circuit of pipe MJE172 and MJE182 composition, carries out power amplification, finally gives controlled output signal DRV2.Using DRV2
The grid level of the superposition device for power switching Q2 in Fig. 2 is driven, Q2 is operated in linear amplification region, compensation superposition adjustable DC
Overvoltage on voltage source V2, so that superimposed pulse output loop exports desired superimposed pulse electric current.
4) timing is opened Q4 and is driven to superimposed pulse electric current output time, is closed Q3 and is driven, due to superimposed pulse electric current not
Can be mutated, the superimposed pulse electric current of superimposed pulse output loop output is switched to driving load branch road by fictitious load branch road, with base
Plinth pulse current is overlapped.Because fictitious load branch current has reached stable state, and fictitious load and Constant Current Load
Characteristic matches, and load effect is basically unchanged in handoff procedure, so that superimposed pulse electric current is superimposed to basis pulses electric current
On total superimposed current non-overshoot for obtaining.
5) timing is closed Q4 and is driven to the end-of-pulsing moment, and basis pulses given value of current value and superimposed pulse electric current are superimposed
Set-point is zeroed.
6) the timing toff times are reached, current period terminates.
After said process needs several pulse output cycles to dozens of, V1 and V2 voltages reach controlling value, you can reach
Stable state, and sustainable output.
Current detecting, repetition rate 400Hz are carried out using current Hall in the present embodiment, basis pulses pulsewidth is 300us,
Current amplitude is taken as 10A, and superimposed pulse pulsewidth is 10us, and current amplitude is taken as 20A.When Fig. 7 gives two superimposed pulses
Timing chart in signal period, the timing chart in multiple cycles when Fig. 8 gives two superimposed pulses.
Certainly, the above-mentioned current sample that carried out to resistance is only a kind of specific sampling embodiment, can be according to actual conditions
To choose suitable sample mode, such as resistance sampling, current transformer sampling.
Claims (9)
1. a kind of non-overshoot is fast front and rear along Multiple pulse superposition method, it is characterised in that comprise the following steps：
Step 1, control produces basis pulses；
Step 2, chronologically control produces at least one superimposed pulse, and the superimposed pulse is accumulated in into the basis pulses successively
On.
2. non-overshoot according to claim 1 is fast front and rear along Multiple pulse superposition method, it is characterised in that described superposition
The superimposed pulse being superimposed up at least once in pulse flows through the fictitious load matched with driving load characteristic and carries out tune stream.
3. non-overshoot according to claim 2 is fast front and rear along Multiple pulse superposition method, it is characterised in that the fictitious load
It is any one in resistance, inductance, electric capacity and diode or its combination.
4. a kind of non-overshoot is fast front and rear along Multiple pulse superposition device, it is characterised in that a basic arteries and veins including being connected in parallel
Rush output loop and at least one superimposed pulse output loop；After basis pulses output loop conducting, the superposition arteries and veins
Output loop is rushed chronologically to sequentially turn on.
5. non-overshoot according to claim 4 is fast front and rear along Multiple pulse superposition device, it is characterised in that the superposition arteries and veins
Two output ends for rushing at least one of which superimposed pulse output loop in output loop are connected with and match with driving load characteristic
Fictitious load branch road, two output ends of the superimposed pulse output loop are exported back by gating circuit switch in the basis pulses
Switch connection between two output ends on road and the fictitious load branch road.
6. non-overshoot according to claim 5 is fast front and rear along Multiple pulse superposition device, it is characterised in that the basic arteries and veins
Rushing output loop includes basic adjustable DC power supply, base power switching device and the basis electricity connected according to conducting direction in the same direction
Flow sensor；The superimposed pulse output loop includes superposition adjustable DC power supply, the superposition connected according to conducting direction in the same direction
Device for power switching and superimposed current sensor；The gating circuit switch includes the first gated on power switching device and the second choosing
Logical device for power switching, the first gated on power switching device is connected in the fictitious load branch road, the second gating work(
One end of rate switching device is connected with one end of the fictitious load branch road, the other end of the second gated on power switching device with
The corresponding output end of the basis pulses output loop is connected.
7. the non-overshoot according to claim 5 or 6 is fast front and rear along Multiple pulse superposition device, it is characterised in that the vacation
Load is any one in resistance, inductance, electric capacity and diode or its combination.
8. non-overshoot according to claim 6 is fast front and rear along Multiple pulse superposition device, it is characterised in that the power is opened
Pass device is triode, MOSFET or IGBT.
9. non-overshoot according to claim 6 is fast front and rear along Multiple pulse superposition device, it is characterised in that the basis can
Tuning DC power supply and superposition adjustable DC power supply are adjustable direct voltage source.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201611039250.1A CN106785891B (en) | 2016-11-21 | 2016-11-21 | A kind of fast front and back of non-overshoot is along Multiple pulse superposition method and apparatus |
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| CN201611039250.1A CN106785891B (en) | 2016-11-21 | 2016-11-21 | A kind of fast front and back of non-overshoot is along Multiple pulse superposition method and apparatus |
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| CN106785891B CN106785891B (en) | 2019-03-22 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109061248A (en) * | 2018-06-13 | 2018-12-21 | 西安石油大学 | It is a kind of can Spline smoothing DC test power supply implementation method and circuit |
| US20210296855A1 (en) * | 2020-03-23 | 2021-09-23 | Lumentum Operations Llc | Reconfigurable laser pulse generating circuit |
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| JP2003188465A (en) * | 2001-10-11 | 2003-07-04 | Hamamatsu Photonics Kk | Light emitting element driving circuit |
| CN102646917A (en) * | 2012-05-11 | 2012-08-22 | 中国科学院半导体研究所 | Drive circuit of laser source of laser projector |
| CN103457154A (en) * | 2013-08-29 | 2013-12-18 | 烽火通信科技股份有限公司 | Integrated optical communication laser driver with pre-emphasis |
| CN105870778A (en) * | 2016-06-21 | 2016-08-17 | 中国工程物理研究院应用电子学研究所 | Large-power laser fuze pulse driving source |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003188465A (en) * | 2001-10-11 | 2003-07-04 | Hamamatsu Photonics Kk | Light emitting element driving circuit |
| CN102646917A (en) * | 2012-05-11 | 2012-08-22 | 中国科学院半导体研究所 | Drive circuit of laser source of laser projector |
| CN103457154A (en) * | 2013-08-29 | 2013-12-18 | 烽火通信科技股份有限公司 | Integrated optical communication laser driver with pre-emphasis |
| CN105870778A (en) * | 2016-06-21 | 2016-08-17 | 中国工程物理研究院应用电子学研究所 | Large-power laser fuze pulse driving source |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109061248A (en) * | 2018-06-13 | 2018-12-21 | 西安石油大学 | It is a kind of can Spline smoothing DC test power supply implementation method and circuit |
| US20210296855A1 (en) * | 2020-03-23 | 2021-09-23 | Lumentum Operations Llc | Reconfigurable laser pulse generating circuit |
| US11870215B2 (en) * | 2020-03-23 | 2024-01-09 | Lumentum Operations Llc | Reconfigurable laser pulse generating circuit |
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| CN106785891B (en) | 2019-03-22 |
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