CN106783844A

CN106783844A - One-way low-capacitance TVS device and its manufacture method

Info

Publication number: CN106783844A
Application number: CN201710061268.XA
Authority: CN
Inventors: 张常军; 邓晓虎
Original assignee: Hangzhou Silan Integrated Circuit Co Ltd
Current assignee: Hangzhou Silan Integrated Circuit Co Ltd
Priority date: 2017-01-25
Filing date: 2017-01-25
Publication date: 2017-05-31
Anticipated expiration: 2037-01-25
Also published as: CN106783844B

Abstract

The present invention provides a kind of one-way low-capacitance TVS device and its manufacture method, forms one-way low-capacitance TVS device by semiconductor integrated technique it is possible thereby to improve the reliability of one-way low-capacitance TVS device, reduces the volume of one-way low-capacitance TVS device.Further, the first general-purpose diode, the second general-purpose diode, the 3rd general-purpose diode and voltage-regulator diode are formd in one-way low-capacitance TVS device, wherein, the series connection of first general-purpose diode, second general-purpose diode and the voltage-regulator diode is simultaneously in parallel with the 3rd general-purpose diode, thus, reduction electric capacity that can be larger compared to the one-way low-capacitance TVS device of prior art, is generally possible to be reduced to 3/4ths of existing electric capacity.

Description

One-way low-capacitance TVS device and its manufacture method

Technical field

The present invention relates to technical field of manufacturing semiconductors, more particularly to a kind of one-way low-capacitance TVS device and its manufacturer Method.

Background technology

The circuit of 0.3pF (containing) above one-way low-capacitance TVS chips is typically a general-purpose diode in the market (being typically chosen the general-purpose diode of low electric capacity) connects with a traditional voltage regulation type TVS diode, then with another common two Pole pipe (being typically chosen the general-purpose diode of low electric capacity) parallel combination is formed (see Fig. 1), from the I-V curve of power Vcc GND over the ground From the point of view of, forward and reverse characteristic is still equivalent to a general-purpose diode, but the corresponding electric capacity of equivalent circuit is well below identical electricity The single general T VS diodes of pressure.

The low-capacitance TVS device for combining, the capacitance C of its power Vcc GND over the ground_TCan be expressed as：

Here C_D1And C_D2It is all smaller, C_Z1It is more order of magnitude greater than the above two, so diode D1 and diode Z1 series connection Afterwards, total series capacitance is essentially identical to the electric capacity of diode D1.

When power Vcc plus positive potential, when ground GND adds negative potential：Because diode D2 breakdown voltages are higher, diode Z1 hits Wear voltage relatively low, so diode Z1 takes the lead in puncturing, the breakdown reverse voltage of power Vcc GND over the ground can be expressed as：

V_BR=Vf_D1+V_Z1

Wherein, Vf_D1It is the forward voltage drop of diode D1.

When power Vcc plus negative potential, when ground GND adds positive potential：Because diode D1 breakdown voltages are higher, electric current is preferentially passed through Cross the forward direction of diode D2, the forward voltage drop of power Vcc GND over the ground can be expressed as：

Vf=Vf_D2

It can be seen that the forward and reverse characteristic of one-way low-capacitance TVS device for combining substantially corresponds to a general-purpose diode, its Breakdown reverse voltage is mainly controlled by the breakdown voltage of diode Z1；Electric capacity mainly receives C_D1And C_D2Control, so low in order to realize Electric capacity, is exactly actually to reduce C_D1And C_D2；It is also equivalent respectively that the positive and negative direction ESD abilities of power Vcc GND over the ground are actual simultaneously In two diodes of D1, D2 positive ESD abilities (breakdown reverse voltage of diode Z1 is relatively low, typically between 3.3-7.0V, Its reverse ESD ability is very high, can not consider).So being exactly actually to improve D1, D2 two two to realize ESD abilities high The positive ESD abilities of pole pipe.

The electric capacity of one-way low-capacitance TVS chips in the market is still higher, therefore, how electric capacity is further reduced, Such as less than 0.3pF, even 0.2pF are, it is necessary to the continuous effort of those skilled in the art.

The content of the invention

It is an object of the invention to provide a kind of one-way low-capacitance TVS device and its manufacture method, further to reduce single To the electric capacity of low-capacitance TVS chip.

Therefore, the present invention provides a kind of one-way low-capacitance TVS device, the one-way low-capacitance TVS device includes：

First conductivity type substrate；

First conductive type epitaxial layer, first conductive type epitaxial layer is formed at first conductivity type substrate On；

Second conduction type buried regions, the second conduction type buried regions is formed in first conductive type epitaxial layer；

Second conductive type epitaxial layer, second conductive type epitaxial layer is formed at first conductive type epitaxial layer On；

Multiple isolation structures, the multiple isolation structure runs through second conductive type epitaxial layer, the multiple isolation Second conductive type epitaxial layer is divided into multiple regions by structure, and the multiple region includes：First area, second area, 3rd region and the 4th region；

First conduction type is isolated, and the first conduction type isolation is formed in the first area, and described first leads Electric type of isolation extends to first conductive type epitaxial layer；

Second conductivity type implanted region, second conductivity type implanted region be formed at the first area, second area, In 3rd region and the 4th region；

First conductivity type implanted region, first conductivity type implanted region is formed in second area and the 3rd region.

Optionally, in described one-way low-capacitance TVS device, the one-way low-capacitance TVS device also includes：First gold medal Category line, first metal wire connects the in the second conductivity type implanted region and the second area in the first area Two conductivity type implanted regions；Second metal wire, second metal wire connects the first conduction type note in the second area Enter the second conductivity type implanted region in area and the 3rd region；3rd metal wire, the 3rd metal wire connection described the The second conductivity type implanted region in the first conductivity type implanted region and the 4th region in three regions；Wherein, described Three metal wires are connected with the first power supply, and first conductivity type substrate is connected to ground.

Optionally, in described one-way low-capacitance TVS device, the multiple region also includes the 5th region, described the Two conductivity type implanted regions are also formed into the 5th region, and first conductivity type implanted region is also formed into the described 5th In region；Second metal wire is connected in the first conductivity type implanted region and the 5th region in the second area Second conductivity type implanted region, and second metal wire connect the first conductivity type implanted region in the 5th region and The second conductivity type implanted region in 3rd region.

Optionally, in described one-way low-capacitance TVS device, the multiple region also includes the 6th region, SECTOR-SEVEN Domain and Section Eight domain；

Second conductivity type implanted region is also formed into the 6th region, SECTOR-SEVEN domain and Section Eight domain；

First conductivity type implanted region is also formed into the 6th region and the SECTOR-SEVEN domain；

4th metal wire, the 4th metal wire connects the second conductivity type implanted region in the first area and described The second conductivity type implanted region in 6th region；Fifth metal line, the fifth metal line is connected in the 6th region The second conductivity type implanted region in first conductivity type implanted region and the SECTOR-SEVEN domain；6th metal wire, the 6th gold medal Category line connects the second conduction type injection in the first conductivity type implanted region and the Section Eight domain in the SECTOR-SEVEN domain Area；Wherein, the 6th metal wire is connected with second source.

Optionally, in described one-way low-capacitance TVS device, first conduction type is p-type, and described second is conductive Type is N-type；Or, first conduction type is N-type, and second conduction type is p-type.

Optionally, in described one-way low-capacitance TVS device, first conductivity type substrate is attached most importance to doped structure, First conductive type epitaxial layer is light-dope structure, and the second conduction type buried regions is attached most importance to doped structure, described second Conductive type epitaxial layer is light-dope structure, and first conduction type is isolated into heavy doping structure, second conduction type Injection region is attached most importance to doped structure, and first conductivity type implanted region is attached most importance to doped structure.

Optionally, in described one-way low-capacitance TVS device, the resistivity of first conductivity type substrate is 0.005 Ω .cm~0.008 Ω .cm.

Optionally, in described one-way low-capacitance TVS device, the resistivity of first conductive type epitaxial layer is 2.0 Ω .cm~4.0 Ω .cm.

Optionally, in described one-way low-capacitance TVS device, the resistivity of second conductive type epitaxial layer is 25 Ω .cm~35 Ω .cm.

Optionally, in described one-way low-capacitance TVS device, the second conductivity type implanted region in the first area Isolate composition voltage-regulator diode with first conduction type；First conductivity type implanted region of the second area and described Second conductive type epitaxial layer in two regions constitutes the second general-purpose diode；The first conduction type injection in the 3rd region Area constitutes the first general-purpose diode with second conductive type epitaxial layer in the 3rd region；The four-range second is led Electric type epitaxial layer constitutes the 3rd general-purpose diode with first conductive type epitaxial layer.

Optionally, it is describedly plus negative when first power supply adds positive potential in described one-way low-capacitance TVS device During current potential, first power supply is to the breakdown reverse voltage on the ground：V_BR=2*Vf₁₀+V₁₃, wherein, V_BRIt is the described first electricity Source to it is described ground breakdown reverse voltage, Vf₁₀It is the pressure drop of first general-purpose diode, V₁₃It is the voltage-regulator diode Voltage.

Optionally, in described one-way low-capacitance TVS device, when first power supply adds negative potential, describedly plus just During current potential, first power supply is to the forward voltage drop on the ground：Vf=Vf₁₂, wherein, Vf is first power supply to described Forward voltage drop, Vf₁₂It is the pressure drop of the 3rd general-purpose diode.

Optionally, in described one-way low-capacitance TVS device, first general-purpose diode and described second common two The junction depth of pole pipe is 0.5 μm~1.0 μm；The capacitance of first general-purpose diode and second general-purpose diode is respectively less than 0.5pF。

Optionally, in described one-way low-capacitance TVS device, the breakdown voltage of the voltage-regulator diode for 3.3V~ 7.0V。

Optionally, in described one-way low-capacitance TVS device, first conductivity type implanted region in the 5th region with Second conductive type epitaxial layer in the 5th region constitutes the 4th general-purpose diode.

Optionally, in described one-way low-capacitance TVS device, first conductivity type implanted region in the 6th region with Second conductive type epitaxial layer in the 6th region constitutes the 6th general-purpose diode；First conductive-type in the SECTOR-SEVEN domain Type injection region constitutes the 5th general-purpose diode with second conductive type epitaxial layer in the SECTOR-SEVEN domain；The Section Eight domain Second conductive type epitaxial layer constitutes the 7th general-purpose diode with first conductive type epitaxial layer.

Optionally, in described one-way low-capacitance TVS device, the 5th general-purpose diode and the described 6th common two The junction depth of pole pipe is 0.5 μm~1.0 μm；The capacitance of the 5th general-purpose diode and the 6th general-purpose diode is respectively less than 0.5pF。

Optionally, in described one-way low-capacitance TVS device, in the one-way low-capacitance TVS device, power supply is over the ground Electric capacity be 0.15pF~0.25pF, power supply positive ESD over the ground and reverse ESD are 8kV~9kV.

The present invention also provides a kind of manufacture method of one-way low-capacitance TVS device, the system of the one-way low-capacitance TVS device The method of making includes：

First conductivity type substrate is provided；

The first conductive type epitaxial layer is formed, first conductive type epitaxial layer is located at first conductivity type substrate On；

The second conduction type buried regions is formed, the second conduction type buried regions is located at first conductive type epitaxial layer In；

The second conductive type epitaxial layer is formed, second conductive type epitaxial layer is located at the first conduction type extension On layer；

Multiple isolation structures are formed, the multiple isolation structure runs through second conductive type epitaxial layer, the multiple Second conductive type epitaxial layer is divided into multiple regions by isolation structure, and the multiple region includes：First area, the secondth area Domain, the 3rd region and the 4th region；

Formed the first conduction type isolation, the first conduction type isolated bit in the first area, described first Conduction type isolation extends to first conductive type epitaxial layer；

The second conductivity type implanted region is formed, second conductivity type implanted region is located at the first area, the secondth area In domain, the 3rd region and the 4th region；

The first conductivity type implanted region is formed, first conductivity type implanted region is located at the second area and the 3rd area In domain.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, the one-way low-capacitance TVS device Manufacture method also includes：

The first metal wire, the second metal wire and the 3rd metal wire are formed, first metal wire connects the first area In the second conductivity type implanted region and the second area in the second conductivity type implanted region；The second metal wire connection The second conductivity type implanted region in the first conductivity type implanted region and the 3rd region in the second area；Described Three metal wires connect the second conduction type in the first conductivity type implanted region and the 4th region in the 3rd region Injection region；

3rd metal wire is connected with the first power supply, first conductivity type substrate is connected to ground.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, the multiple region also includes the 5th area Domain, second conductivity type implanted region is also formed into the 5th region, and first conductivity type implanted region is also formed In the 5th region；Second metal wire connects the first conductivity type implanted region in the second area and described the The second conductivity type implanted region in five regions, and second metal wire connects the first conductive-type in the 5th region The second conductivity type implanted region in type injection region and the 3rd region.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, the multiple region also includes the 6th area Domain, SECTOR-SEVEN domain and Section Eight domain；

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first conduction type is p-type, institute The second conduction type is stated for N-type；Or, first conduction type is N-type, and second conduction type is p-type.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first conductivity type substrate is attached most importance to Doped structure, first conductive type epitaxial layer is light-dope structure, and the second conduction type buried regions is attached most importance to doped structure, Second conductive type epitaxial layer is light-dope structure, and first conduction type is isolated into heavy doping structure, described second Conductivity type implanted region is attached most importance to doped structure, and first conductivity type implanted region is attached most importance to doped structure.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, the electricity of first conductivity type substrate Resistance rate is 0.005 Ω .cm~0.008 Ω .cm.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first conductive type epitaxial layer Resistivity is 2.0 Ω .cm~4.0 Ω .cm.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, second is formed by the following method conductive Type buried regions：

The second conductive type ion is injected in first conductive type epitaxial layer, second conductive type ion Implantation dosage is 2.0E15~6.0E15；

Annealing process is performed to second conductive type ion, the temperature of the annealing process is 1200 DEG C~1250 ℃；The time of the annealing process is 2.0h~6.0h.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, second conductive type epitaxial layer Resistivity is 25 Ω .cm~35 Ω .cm.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, multiple isolation are formed by the following method Structure：

Form multiple grooves, the multiple groove runs through second conductive type epitaxial layer, the multiple groove is by institute State the second conductive type epitaxial layer and be divided into multiple regions, the multiple region includes：First area, second area, the 3rd region And the 4th region；

Polysilicon is filled in each trench.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first is formed by the following method conductive Type of isolation：

The first conductive type ion is injected in the first area, the implantation dosage of first conductive type ion is 4.5E15-2.0E14；

Annealing process is performed to first conductive type ion, the temperature of the annealing process is 1200 DEG C~1250 ℃；The time of the annealing process is 2.0h~6.0h.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, second is formed by the following method conductive Type implanted region：

The second conductive type ion is injected in the first area, second area, the 3rd region and the 4th region, it is described The implantation dosage of the second conductive type ion is 1.0E15~1.0E16；

First time annealing process is performed to second conductive type ion, the temperature of the first time annealing process is 1100 DEG C~1200 DEG C；The time of the first time annealing process is 10s~20s；

Second annealing process is performed to second conductive type ion, the temperature of second annealing process is 800 DEG C~900 DEG C；The time of second annealing process is 30min~60min.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first is formed by the following method conductive Type implanted region：

The first conductive type ion is injected in the second area and the 3rd region, first conductive type ion Implantation dosage is 1.0E15~1.0E16；

First time annealing process is performed to first conductive type ion, the temperature of the first time annealing process is 1100 DEG C~1200 DEG C；The time of the first time annealing process is 10s~20s；

Second annealing process is performed to first conductive type ion, the temperature of second annealing process is 800 DEG C~900 DEG C；The time of second annealing process is 30min~60min.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, second in the first area is conductive Type implanted region isolates composition voltage-regulator diode with first conduction type；The first conduction type injection of the second area Area constitutes the second general-purpose diode with the second conductive type epitaxial layer of the second area；The first of 3rd region is led Electric type implanted region constitutes the first general-purpose diode with second conductive type epitaxial layer in the 3rd region；4th area Second conductive type epitaxial layer in domain constitutes the 3rd general-purpose diode with first conductive type epitaxial layer.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, when first power supply adds positive potential, When adding negative potential describedly, first power supply is to the breakdown reverse voltage on the ground：V_BR=2*Vf₁₀+V₁₃, wherein, V_BRFor First power supply to it is described ground breakdown reverse voltage, Vf₁₀It is the pressure drop of first general-purpose diode, V₁₃For described steady Press the voltage of diode.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, when first power supply adds negative potential, When adding positive potential describedly, first power supply is to the forward voltage drop on the ground：Vf=Vf₁₂, wherein, Vf is the described first electricity Source to it is described ground forward voltage drop, Vf₁₂It is the pressure drop of the 3rd general-purpose diode.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first general-purpose diode and described The junction depth of the second general-purpose diode is 0.5 μm~1.0 μm；The electricity of first general-purpose diode and second general-purpose diode Capacitance is respectively less than 0.5pF.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, the breakdown voltage of the voltage-regulator diode It is 3.3V~7.0V.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first conductive-type in the 5th region Type injection region constitutes the 4th general-purpose diode with second conductive type epitaxial layer in the 5th region.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, first conductive-type in the 6th region Type injection region constitutes the 6th general-purpose diode with second conductive type epitaxial layer in the 6th region；The SECTOR-SEVEN domain First conductivity type implanted region constitutes the 5th general-purpose diode with second conductive type epitaxial layer in the SECTOR-SEVEN domain；It is described Second conductive type epitaxial layer in Section Eight domain constitutes the 7th general-purpose diode with first conductive type epitaxial layer.

Optionally, in the manufacture method of described one-way low-capacitance TVS device, the 5th general-purpose diode and described The junction depth of the 6th general-purpose diode is 0.5 μm~1.0 μm；The electricity of the 5th general-purpose diode and the 6th general-purpose diode Capacitance is respectively less than 0.5pF.

In the one-way low-capacitance TVS device and its manufacture method that the present invention is provided, formed by semiconductor integrated technique One-way low-capacitance TVS device reduces one-way low-capacitance TVS device it is possible thereby to improve the reliability of one-way low-capacitance TVS device Volume.Further, the first general-purpose diode, the second general-purpose diode, the 3rd are formd in one-way low-capacitance TVS device General-purpose diode and voltage-regulator diode, wherein, first general-purpose diode, second general-purpose diode and the voltage stabilizing two Pole pipe is connected and in parallel with the 3rd general-purpose diode, and thus, the one-way low-capacitance TVS device compared to prior art can Larger reduction electric capacity, is generally possible to be reduced to 3/4ths of existing electric capacity.

Brief description of the drawings

Fig. 1 is the circuit diagram of existing one-way low-capacitance TVS device；

Fig. 2 is the circuit diagram of the one-way low-capacitance TVS device of one embodiment of the invention；

Fig. 3 to Figure 13 is the structure that is formed of manufacture method of the one-way low-capacitance TVS device of one embodiment of the invention Generalized section；

Figure 14 is the circuit diagram of the one-way low-capacitance TVS device of another embodiment of the present invention；

Figure 15 is the semiconductor structure schematic diagram of the one-way low-capacitance TVS device shown in Figure 14；

Figure 16 is the circuit diagram of the one-way low-capacitance TVS device of another embodiment of the present invention；

Figure 17 is the semiconductor structure schematic diagram of the one-way low-capacitance TVS device shown in Figure 16.

Specific embodiment

One-way low-capacitance TVS device proposed by the present invention and its manufacture method are made below in conjunction with the drawings and specific embodiments Further describe.According to following explanation and claims, advantages and features of the invention will become apparent from.Should be noted It is that accompanying drawing in the form of simplifying very much and uses non-accurately ratio, is only used to convenience, lucidly aids in illustrating this hair The purpose of bright embodiment.

First, Fig. 2 is refer to, it is the circuit diagram of the one-way low-capacitance TVS device of one embodiment of the invention.As schemed Shown in 2, in the embodiment of the present application, the one-way low-capacitance TVS device 1 includes：First general-purpose diode 10, second common two Pole pipe 11, the 3rd general-purpose diode 12 and voltage-regulator diode 13, wherein, it is first general-purpose diode 10, described second common Diode 11 and the series connection of the voltage-regulator diode 13 form tie point, the tie point and the 3rd general-purpose diode 12 Parallel connection, the positive pole of first general-purpose diode 10 is connected with power Vcc, the negative pole of first general-purpose diode 10 with it is described The positive pole connection of the second general-purpose diode 11, the negative pole of second general-purpose diode 11 and the negative pole of the voltage-regulator diode 13 Connection, the positive pole of the voltage-regulator diode 13 is connected with ground GND, the negative pole and the first power supply of the 3rd general-purpose diode 12 Vcc is connected, and the positive pole of the 3rd general-purpose diode 12 is connected with ground GND.

Here, being connected by the first general-purpose diode 10, the second general-purpose diode 11 and voltage-regulator diode 13 forms first Branch road, the tie point is in parallel with the 3rd general-purpose diode 12, thus, compared to the one-way low-capacitance TVS devices of prior art Part can be larger reduction electric capacity, be generally possible to be reduced to 3/4ths of existing electric capacity.

Specifically, the capacitance C of the first power Vcc GND over the ground_TC can be expressed as_T≈0.5*C₁₀+C₁₂, it is assumed herein that institute The capacitance for stating the first general-purpose diode 10 is identical with the capacitance of second general-purpose diode 11, meanwhile, if C₁₀(first The capacitance of general-purpose diode 10) and C₁₂(capacitance of the 3rd general-purpose diode 12) is identical, then the electric capacity of Fig. 2 only has Fig. 1's 3/4ths of electric capacity.Therefore, when the electric capacity of Fig. 1 accomplishes 0.3pF, the electric capacity of Fig. 2 can accomplish 0.2pF or so.

When the first power Vcc adds positive potential, and ground GND adds negative potential：V_BR=2*Vf₁₀+V₁₃, i.e. the first power Vcc is over the ground The breakdown reverse voltage of GND can be expressed as the first general-purpose diode 10 of twice pressure drop and zener diode voltage it With.

When the first power Vcc adds negative potential, and ground GND adds positive potential：Vf=Vf₁₂, i.e. the first power Vcc GND over the ground Forward voltage drop can be expressed as the pressure drop of the 3rd general-purpose diode 12.

Subsequently, Fig. 3 to Figure 13 is refer to, it is the manufacture method of the one-way low-capacitance TVS device of the embodiment of the present invention The generalized section of the structure for being formed.More specifically, Fig. 3 to Figure 13 describes the one-way low-capacitance TVS device of integrated-type Forming method.

In the embodiment of the present application, the manufacture method of the one-way low-capacitance TVS device of integrated-type comprises the following steps：

Step S10：First conductivity type substrate is provided；

Step S12：The first conductive type epitaxial layer is formed, it is conductive that first conductive type epitaxial layer is located at described first In type substrates；

Step S14：The second conduction type buried regions is formed, the second conduction type buried regions is located at first conduction type In epitaxial layer；

Step S16：The second conductive type epitaxial layer is formed, it is conductive that second conductive type epitaxial layer is located at described first On type epitaxial layer；

Step S18：Multiple isolation structures are formed, the multiple isolation structure runs through second conductive type epitaxial layer, Second conductive type epitaxial layer is divided into multiple regions by the multiple isolation structure, and the multiple region includes：Firstth area Domain, second area, the 3rd region and the 4th region；

Step S20：Formed the first conduction type isolation, the first conduction type isolated bit in the first area, The first conduction type isolation extends to first conductive type epitaxial layer；

Step S22：The second conductivity type implanted region is formed, second conductivity type implanted region is located at firstth area In domain, second area, the 3rd region and the 4th region；

Step S24：The first conductivity type implanted region is formed, first conductivity type implanted region is located at the second area And the 3rd in region.

Further, the manufacture method of the one-way low-capacitance TVS device of integrated-type also comprises the following steps：

Step S26：The first metal wire, the second metal wire and the 3rd metal wire are formed, the first metal wire connection is described The second conductivity type implanted region in the second conductivity type implanted region and the second area in first area；Second gold medal Category line connects the second conduction type injection in the first conductivity type implanted region and the 3rd region in the second area Area；In 3rd metal wire connection the 3rd region in the first conductivity type implanted region and the 4th region second Conductivity type implanted region；

Step S28：3rd metal wire is connected with power supply, first conductivity type substrate is connected to ground.

Thus, voltage-regulator diode will be formed in the first area, second common two will be formed in the second area Pole pipe, the first general-purpose diode is formed in the 3rd region, and the 3rd general-purpose diode is formed in the 4th region.Tool Body, the second conductivity type implanted region in the first area isolates composition voltage-regulator diode with first conduction type； First conductivity type implanted region of the second area constitutes second with the second conductive type epitaxial layer of the second area General-purpose diode；First conductivity type implanted region in the 3rd region and second conductive type epitaxial layer in the 3rd region Constitute the first general-purpose diode；The conductive type epitaxial layer of four-range second and first conductive type epitaxial layer Constitute the 3rd general-purpose diode.

Wherein, first conduction type can be p-type, and second conduction type is N-type；Or, described first leads Electric type can be N-type, and second conduction type is p-type.In the embodiment of the present application, with first conduction type as P Type, second conduction type is further described for N-type.Wherein, the P-type conduction type can by adulterate boron ion or Person's gallium ion etc. realizes that the N-type conduction type can be realized by adulterate phosphonium ion or antimony ion etc..

First, as shown in Figure 3, there is provided the first conductivity type substrate 20, here, namely first conductivity type substrate 20 It is P type substrate.In the other embodiment of the application, first conductivity type substrate 20 can also be N-type substrate.It is preferred that , the resistivity of first conductivity type substrate 20 is 0.005 Ω .cm~0.008 Ω .cm.Preferably, described first is conductive Type substrates 20 are attached most importance to doped structure, it is possible thereby to by first conductivity type substrate 20 directly as ground connection GND electrode, Without drawing ground connection GND electrodes from front, the size of chip so can be not only reduced, meet the encapsulation of smaller volume, And thus the multichannel product of structure extension can also be adapted to a variety of packing forms, first leads described in when encapsulating in addition Electric type substrates 20 are drawn directly as ground connection GND electrodes, can avoid the routing being grounded during encapsulation, reduce packaging cost.

Then, as shown in figure 4, forming the first conductive type epitaxial layer 22, institute in first conductivity type substrate 20 It is p-type epitaxial layer to state the first conductive type epitaxial layer 22, and it can be generated by chemical vapor deposition method.In the embodiment of the present application In, first conductive type epitaxial layer 22 is light-dope structure, i.e., the doping concentration of described first conductive type epitaxial layer 22 Doping concentration than first conductivity type substrate 20 is low.Preferably, the resistivity of first conductive type epitaxial layer 22 It is 2.0 Ω .cm~4.0 Ω .cm.

As shown in figure 5, forming the second conduction type buried regions 24, described second in first conductive type epitaxial layer 22 Conduction type buried regions 24 is n type buried layer.In the embodiment of the present application, the second conduction type buried regions 24 is attached most importance to doped structure. Specifically, the second conduction type buried regions 24 can be formed by following technique：In first conductive type epitaxial layer 24 The second conductive type ion is injected, is herein antimony ion, the implantation dosage of the antimony ion is 2.0E15~6.0E15；To described Antimony ion performs annealing process, and the temperature of the annealing process is 1200 DEG C~1250 DEG C；The time of the annealing process is 2.0h~6.0h.

As shown in fig. 6, the second conductive type epitaxial layer 26 is formed on first conductive type epitaxial layer 22, described Two conductive type epitaxial layers 26 are N-type epitaxy layer, and it can be generated by chemical vapor deposition method.In the embodiment of the present application, Second conductive type epitaxial layer 26 is light-dope structure, i.e., the doping concentration of described second conductive type epitaxial layer 26 compares institute The doping concentration for stating the second conduction type buried regions 24 is low.Preferably, the resistivity of second conductive type epitaxial layer 26 is 25 Ω .cm~35 Ω .cm.

Then, as shown in figure 8, forming multiple isolation structures 30, the multiple isolation structure 30 is conductive through described second Type epitaxial layer 26,26 points by second conductive type epitaxial layer of the multiple isolation structure 30 is multiple regions, described many Individual region includes：First area 26a, second area 26b, the 3rd region 26c and the 4th region 26d, wherein, the 4th region Second conductive type epitaxial layer of 26d constitutes the 3rd general-purpose diode with first conductive type epitaxial layer 22.Here, described The concentration of second conductive type epitaxial layer of the 4th region 26d and first conductive type epitaxial layer 22 is all very light, as long as right The 3rd general-purpose diode area does certain selection, you can ensure the ultra-low capacitance of the 3rd general-purpose diode.Preferably, The electric capacity of the 3rd general-purpose diode is less than 0.5pF.

In the embodiment of the present application, forming multiple isolation structures 30 includes：Forming multiple grooves 28 (can accordingly with reference to figure 7), the multiple groove 28 runs through second conductive type epitaxial layer 26 (here, the multiple groove 28 also extends to first In conductive type epitaxial layer 22), the multiple groove 28 by 26 points of second conductive type epitaxial layer be first area 26a, Second area 26b, the 3rd region 26c and the 4th region 26d；Polysilicon is filled in each trench, you can obtain multiple isolation Structure 30.Preferably, the depth of the groove 28 be 10 μm~20 μm, width be 1.5 μm~3.0 μm.In the present embodiment, adopt Isolated with groove, not only process is simple, also can ensure that between each diode being subsequently formed there is no ghost effect, especially The structure of multichannel, so as to improve the reliability of formed integrated form one-way low-capacitance TVS device.

Then, as shown in figure 9, forming the first conduction type isolation 32 in the first area 26a, described first is conductive Type of isolation 32 is isolated for p-type, here, first conduction type isolation 32 extends to first conductive type epitaxial layer 24 In.In the embodiment of the present application, first conduction type isolation 32 is attached most importance to doped structure.Specifically, can be by following technique Form the first conduction type isolation 32：Inject the first conductive type ion in the first area 26a, herein for boron from Son, the implantation dosage of the boron ion is 4.5E15-2.0E14；Annealing process, the annealing process are performed to the boron ion Temperature be 1200 DEG C~1250 DEG C；The time of the annealing process is 2.0h~6.0h.

As shown in Figure 10, the shape in the first area 26a, second area 26b, the 3rd region 26c and the 4th region 26d Into the second conductivity type implanted region, here, the second conductivity type implanted region 34a in respectively first area 26a, second area The second conductivity type implanted region 34b in 26b, the second conductivity type implanted region 34c in the 3rd region 26c, the 4th region 26d In the second conductivity type implanted region 34d, the second conductivity type implanted region 34a and described first in the first area 26a Conduction type isolation 32 constitutes voltage-regulator diode.In the embodiment of the present application, the second conductivity type implanted region (i.e. firstth area The second conductivity type implanted region 34b, the 3rd region in the second conductivity type implanted region 34a, second area 26b in the 26a of domain The second conductivity type implanted region 34d in the second conductivity type implanted region 34c and the 4th region 26d in 26c) it is heavy doping knot Structure.

Specifically, is formed in the first area, second area, the 3rd region and the 4th region by the following method Two conductivity type implanted regions：Injected in the first area 26a, second area 26b, the 3rd region 26c and the 4th region 26d Second conductive type ion, is herein phosphonium ion, and the implantation dosage of the phosphonium ion is 1.0E15~1.0E16；To the phosphorus from Son performs first time annealing process, and the temperature of the first time annealing process is 1100 DEG C~1200 DEG C；The first time annealing The time of technique is 10s~20s；Second annealing process, the temperature of second annealing process are performed to the phosphonium ion It is 800 DEG C~900 DEG C；The time of second annealing process is 30min~60min.By above-mentioned technique formed it is steady Pressure diode is the low pressure diode of 3.3V~7.0V.Wherein, first time annealing process is referred to as high temperature rapid thermal annealing work Skill, the phosphorus impurities the purpose is to activate all injections, it is ensured that while forming good ohmic contact, also reduce voltage-regulator diode Reverse leakage current；Second annealing process is referred to as low temperature furnace anneal process, the purpose is to control voltage-regulator diode Junction depth and breakdown voltage, it is ensured that breakdown voltage is in 3.3V-7.0V or so.

Then, as shown in figure 11, the injection of the first conduction type is formed in the second area 26b and the 3rd region 26c Area, here, the first conductivity type implanted region 36a in respectively second area 26b, the first conductive-type in the 3rd region 26c The second of the first conductivity type implanted region 36a and the second area 26b of type injection region 36b, the second area 26b is conductive Type epitaxial layer constitutes the second general-purpose diode, the first conductivity type implanted region 36b of the 3rd region 26c and described Second conductive type epitaxial layer of three region 26c constitutes the first general-purpose diode.

Specifically, forming the first conductivity type implanted region in the second area and the 3rd region by the following method： The first conductive type ion is injected in the second area 26b and the 3rd region 26c, is herein boron ion, the boron ion Implantation dosage be 1.0E15~1.0E16；First time annealing process, the first time annealing process are performed to the boron ion Temperature be 1100 DEG C~1200 DEG C；The time of the first time annealing process is 10s~20s；The is performed to the boron ion Double annealing technique, the temperature of second annealing process is 800 DEG C~900 DEG C；The time of second annealing process It is 30min~60min.Wherein, first time annealing process is referred to as high temperature rapid thermal annealing technique, all the purpose is to activate The boron impurity of injection, it is ensured that form good Ohmic contact；Second annealing process is referred to as low temperature furnace anneal process, Junction depth the purpose is to control the first general-purpose diode and the second general-purpose diode, it is ensured that junction depth is at 0.5 μm -1.0 μm or so.

In the embodiment of the present application, the first conductivity type implanted region (i.e. first conduction type in second area 26b The first conductivity type implanted region 36b in injection region 36a and the 3rd region 26c) doped structure of attaching most importance to.Here, leading due to first Electric type implanted region and the concentration of the second conductive type epitaxial layer 26 are all very light, as long as general to first general-purpose diode and second The area of logical diode does certain selection, you can ensure the ultralow electricity of first general-purpose diode and the second general-purpose diode Hold.Preferably, the capacitance of first general-purpose diode and the second general-purpose diode is less than 0.5pF.

Then, as shown in figure 13, the first metal wire 40a, the second metal wire 40b and the 3rd metal wire 40c, described the are formed One metal wire 40a connects the voltage-regulator diode and the second general-purpose diode, and the second metal wire 40b connections described second are general Logical diode and the first general-purpose diode, the 3rd metal wire 40c connect first general-purpose diode and the 3rd common two Pole pipe.Specifically, referring to Figure 12, dielectric layer 38, the dielectric layer 38 are formed on second conductive type epitaxial layer 26 Expose the positive pole and negative pole of the voltage-regulator diode, the second general-purpose diode and the first general-purpose diode；Then, figure is referred to 13, by evaporation or splash-proofing sputtering metal layer, form the first metal wire 40a, the second metal wire 40b and the 3rd metal wire 40c.Generally , the material of the metal level is aluminium, and its thickness can be 2.0 μm or so.

In the present embodiment, the 3rd metal wire 40c is connected with power Vcc, first conductivity type substrate 20 It is connected with ground GND.That is the first conductivity type substrate 20 is grounded GND electricity directly as the electrode of ground connection GND without drawing Pole, so can not only reduce the size of chip, meet the encapsulation of smaller volume, the first conductivity type substrate 20 when encapsulating in addition Drawn directly as GND electrodes, it is possible to reduce 1 wires, greatly reduce packaging cost.Preferably, power Vcc GND over the ground Electric capacity be 0.15pF~0.25pF, the positive ESD and reverse ESD of power Vcc GND over the ground are 8kV~9kV.

Further, passivation layer (not shown in Figure 13) can be also formed, the passivation layer covers second conduction type Epitaxial layer 26.Structure in one-way low-capacitance TVS device is protected by the passivation layer, so as to improve the one-way low-capacitance The quality and reliability of TVS device.Common, the material of the passivation layer is silicon nitride, and its thickness can be 1.0 μm or so.

Please continue to refer to Figure 13, formd such as next part by the manufacture method of above-mentioned integrated form one-way low-capacitance TVS device Accepted way of doing sth one-way low-capacitance TVS device, specifically includes：

First conductivity type substrate 20；

First conductive type epitaxial layer 22, first conductive type epitaxial layer 22 is formed at the first conduction type lining On bottom 20；

Second conduction type buried regions 24, the second conduction type buried regions 24 is formed at first conductive type epitaxial layer In 22；

Second conductive type epitaxial layer 26, second conductive type epitaxial layer 26 is formed at outside first conduction type Prolong on layer 22；

Multiple isolation structures 30, the multiple isolation structure 30 runs through second conductive type epitaxial layer 26, described many 26 points by second conductive type epitaxial layer of individual isolation structure 30 is multiple regions, and the multiple region includes：First area 26a, second area 26b, the 3rd region 26c and the 4th region 26d, wherein, outside second conduction type of the 4th region 26d Prolong layer and constitute the 3rd general-purpose diode with first conductive type epitaxial layer 22；

First conduction type isolation 32, the first conduction type isolation 32 is formed in the first area 26a, described First conduction type isolation 32 extends to first conductive type epitaxial layer 22；

Second conductivity type implanted region, second conductivity type implanted region is formed at the first area 26a, the secondth area In domain 26b, the 3rd region 26c and the 4th region 26d (the second conduction being formed in the first area 26a is respectively herein Type implanted region 34a, the second conductivity type implanted region 34b being formed in the second area 26b, it is formed at the 3rd area The second conductivity type implanted region 34c in the 26c of domain, the second conductivity type implanted region being formed in the 4th region 26d 34d), the second conductivity type implanted region 34a in the first area 26a isolates 32 composition voltage stabilizings with first conduction type Diode；

First conductivity type implanted region, first conductivity type implanted region is formed at the second area 26b and the 3rd In the 26c of region (be respectively herein be formed in the second area 26b the first conductivity type implanted region 36a, be formed at it is described The first conductivity type implanted region 36b in 3rd region 26c), the first conductivity type implanted region 36a of the second area 26b The second general-purpose diode, the of the 3rd region 26c are constituted with second conductive type epitaxial layer of the second area 26b One conductivity type implanted region 36b constitutes the first general-purpose diode with second conductive type epitaxial layer of the 3rd region 26c； And

First metal wire 40a, the first metal wire 40a connects the second conduction type note in the first area 26a Enter the second conductivity type implanted region 34b in area 34a and the second area 26b；Second metal wire 40b, second metal In the line 40b connections second area 26b in the first conductivity type implanted region 36a and the 3rd region 26c second leads Electric type implanted region 34c；3rd metal wire 40c, in the 3rd metal wire 40c connections the 3rd region 26c first leads The second conductivity type implanted region 34d in electric type implanted region 36b and the 4th region 26d；That is, described first metal wire 40a connects the voltage-regulator diode and the second general-purpose diode, and the second metal wire 40b connects second general-purpose diode With the first general-purpose diode, the 3rd metal wire 40c connects first general-purpose diode and the 3rd general-purpose diode；

Wherein, the 3rd metal wire 40c is connected with the first power Vcc (equivalent to the Vcc1 in Figure 17), and described first Conductivity type substrate 20 is connected with ground GND.

Here, the resistivity of first conductivity type substrate 20 is 0.005 Ω .cm~0.008 Ω .cm.Described first The resistivity of conductive type epitaxial layer 22 is 2.0 Ω .cm~4.0 Ω .cm.The resistivity of second conductive type epitaxial layer 26 It is 25 Ω .cm~35 Ω .cm.The isolation structure 30 includes groove and fills the polysilicon of the groove.

In other embodiments of the invention, can also connect to form with voltage-regulator diode by three general-purpose diodes One branch road, the tie point is in parallel with a general-purpose diode, so as to further reduce the electricity of one-way low-capacitance TVS device Hold.Specifically, refer to Figure 14, it is the circuit diagram of the one-way low-capacitance TVS device of another embodiment of the present invention.As schemed Shown in 14, the one-way low-capacitance TVS device includes：First general-purpose diode 10, the second general-purpose diode the 11, the 3rd common two Pole pipe 12, the 4th general-purpose diode 14 and voltage-regulator diode 13, wherein, it is first general-purpose diode 10, described second common The series connection of diode 11, the 4th general-purpose diode 14 and the voltage-regulator diode 13 forms tie point, the tie point In parallel with the 3rd general-purpose diode 12, the positive pole of first general-purpose diode 10 is connected with power Vcc, and described first is general The negative pole of logical diode 10 be connected with the positive pole of the 4th general-purpose diode 14, the negative pole of the 4th general-purpose diode 14 and The positive pole connection of second general-purpose diode 11, negative pole and the voltage-regulator diode 13 of second general-purpose diode 11 Negative pole is connected, and the positive pole of the voltage-regulator diode 13 is connected with ground GND, the negative pole and power supply of the 3rd general-purpose diode 12 Vcc is connected, and the positive pole of the 3rd general-purpose diode 12 is connected with ground GND.I.e. here, for the structure shown in Fig. 2, Connected between first general-purpose diode 10 and second general-purpose diode 11 the 4th general-purpose diode 14.

Wherein, the forming method of the one-way low-capacitance TVS device of integrated-type refers to previously described method, and its difference is only It is：The multiple region also includes the 5th region 26e (can accordingly refer to Figure 15), second conductivity type implanted region also shape In 5th region 26e described in Cheng Yu (i.e. the second conductivity type implanted region 34e), first conductivity type implanted region is also formed into In the 5th region 26e (i.e. the first conductivity type implanted region 36c)；The second metal wire 40b connects the second area The second conductivity type implanted region 34e, Yi Jisuo in the first conductivity type implanted region 36a and the 5th region 26e in 26b State the first conductivity type implanted region 36c and the 3rd region 26c during the second metal wire 40b connects the 5th region 26e In the second conductivity type implanted region 34c.The first conductivity type implanted region 36c of the 5th region 26e and the 5th area Second conductive type epitaxial layer of domain 26e constitutes the 4th general-purpose diode.Preferably, the junction depth of the 4th general-purpose diode It is 0.5 μm~1.0 μm；The capacitance of the 4th general-purpose diode is respectively less than 0.5pF.

The integrated morphology of single channel one-way low-capacitance TVS device is foregoing described, in the other embodiment of the application, The integrated morphology of binary channels one-way low-capacitance TVS device can be realized.Wherein, the circuit of binary channels one-way low-capacitance TVS device Structure as shown in figure 15, is specifically included：First general-purpose diode 10, the second general-purpose diode 11, the 3rd general-purpose diode 12, Five general-purpose diodes 15, the 6th general-purpose diode 16, the 7th general-purpose diode 17 and voltage-regulator diode 13, wherein, a passage： The series connection of first general-purpose diode 10, second general-purpose diode 11 and the voltage-regulator diode 13 forms tie point, The tie point is in parallel with the 3rd general-purpose diode 12, and positive pole and the power Vcc 1 of first general-purpose diode 10 connect Connect, the negative pole of first general-purpose diode 10 is connected with the positive pole of second general-purpose diode 11, described second common two The negative pole of pole pipe 11 is connected with the negative pole of the voltage-regulator diode 13, and the positive pole of the voltage-regulator diode 13 is connected with ground GND, institute The negative pole for stating the 3rd general-purpose diode 12 is connected with power Vcc 1, and the positive pole of the 3rd general-purpose diode 12 is connected with ground GND； Another passage：5th general-purpose diode 15, the 6th general-purpose diode 16 and the voltage-regulator diode 13 series connection shape Into the second branch road, second branch road is in parallel with the 7th general-purpose diode 17, the positive pole of the 5th general-purpose diode 15 It is connected with power Vcc 2, the negative pole of the 5th general-purpose diode 15 is connected with the positive pole of the 6th general-purpose diode 16, institute The negative pole for stating the 6th general-purpose diode 16 is connected with the negative pole of the voltage-regulator diode 13, the positive pole of the voltage-regulator diode 13 with Ground GND connections, the negative pole of the 7th general-purpose diode 17 is connected with power Vcc 2, the positive pole of the 7th general-purpose diode 17 It is connected with ground GND.

Wherein, the forming method of the one-way low-capacitance TVS device of integrated-type refers to previously described method, and its difference is only It is：The multiple region also includes the 6th region 26f, SECTOR-SEVEN domain 26g and Section Eight domain 26h；Second conduction type Injection region is also formed into the 6th region 26f (i.e. the second conductivity type implanted region 34f), SECTOR-SEVEN domain 26g, and (i.e. second is conductive Type implanted region 34g) and Section Eight domain in 26h (i.e. the second conductivity type implanted region 34h)；First conductivity type implanted region (i.e. first is conductive to be also formed into the 6th region 26f (i.e. the first conductivity type implanted region 36d) and the SECTOR-SEVEN domain 26g Type implanted region 36e) in；4th metal wire 40d, in the 4th metal wire 40d connections first area 26a second leads The second conductivity type implanted region 34f in electric type implanted region 34a and the 6th region 26f；Fifth metal line 40e, it is described Fifth metal line 40e is connected in the first conductivity type implanted region 36d and the SECTOR-SEVEN domain 26g in the 6th region 26f The second conductivity type implanted region 34g；6th metal wire 40f, the 6th metal wire 40f is connected in the SECTOR-SEVEN domain 26g The first conductivity type implanted region 36e and the Section Eight domain 26h in the second conductivity type implanted region 34h；Wherein, described Six metal wire 40f are connected Vcc2 with second source.

Wherein, the first conductivity type implanted region 36d of the 6th region 26f leads with the second of the 6th region 26f Electric type epitaxial layer constitutes the 6th general-purpose diode；The first conductivity type implanted region 36e of the SECTOR-SEVEN domain 26g with it is described Second conductive type epitaxial layer of SECTOR-SEVEN domain 26g constitutes the 5th general-purpose diode；The second of the Section Eight domain 26h is conductive Type epitaxial layer constitutes the 7th general-purpose diode with first conductive type epitaxial layer.Preferably, the described 5th common two pole The junction depth of pipe and the 6th general-purpose diode is 0.5 μm~1.0 μm；5th general-purpose diode and the described 6th common two The capacitance of pole pipe is respectively less than 0.5pF.

As fully visible, in one-way low-capacitance TVS device provided in an embodiment of the present invention and its manufacture method, by partly leading Body integrated technique forms one-way low-capacitance TVS device it is possible thereby to improve the reliability of one-way low-capacitance TVS device, reduces unidirectional The volume of low-capacitance TVS device.Further, the first general-purpose diode, second general is formd in one-way low-capacitance TVS device Logical diode, the 3rd general-purpose diode and voltage-regulator diode, wherein, first general-purpose diode, second common two pole Pipe and the voltage-regulator diode are connected and in parallel with the 3rd general-purpose diode, thus, unidirectional low compared to prior art Capacitance TVS device can be larger reduction electric capacity, be generally possible to be reduced to 3/4ths of existing electric capacity.

Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, in addition This structure may also extend into the one-way low-capacitance product of multiple passages.The those of ordinary skill in field of the present invention is according to the disclosure above Any change, modification that content is done, belong to the protection domain of claims.

Claims

1. a kind of one-way low-capacitance TVS device, it is characterised in that the one-way low-capacitance TVS device includes：

First conductivity type substrate；

First conductive type epitaxial layer, first conductive type epitaxial layer is formed in first conductivity type substrate；

Second conductive type epitaxial layer, second conductive type epitaxial layer is formed on first conductive type epitaxial layer；

Multiple isolation structures, the multiple isolation structure runs through second conductive type epitaxial layer, the multiple isolation structure Second conductive type epitaxial layer is divided into multiple regions, the multiple region includes：First area, second area, the 3rd Region and the 4th region；

First conduction type is isolated, and the first conduction type isolation is formed in the first area, first conductive-type Type isolation extends to first conductive type epitaxial layer；

Second conductivity type implanted region, second conductivity type implanted region is formed at the first area, second area, the 3rd In region and the 4th region；

2. one-way low-capacitance TVS device as claimed in claim 1, it is characterised in that the one-way low-capacitance TVS device is also wrapped Include：First metal wire, first metal wire connects the second conductivity type implanted region and described second in the first area The second conductivity type implanted region in region；Second metal wire, in the second metal wire connection second area first The second conductivity type implanted region in conductivity type implanted region and the 3rd region；3rd metal wire, the 3rd metal wire Connect the second conductivity type implanted region in the first conductivity type implanted region and the 4th region in the 3rd region；Its In, the 3rd metal wire is connected with the first power supply, and first conductivity type substrate is connected to ground.

3. one-way low-capacitance TVS device as claimed in claim 2, it is characterised in that the multiple region also includes the 5th area Domain, second conductivity type implanted region is also formed into the 5th region, and first conductivity type implanted region is also formed In the 5th region；Second metal wire connects the first conductivity type implanted region in the second area and described the The second conductivity type implanted region in five regions, and second metal wire connects the first conductive-type in the 5th region The second conductivity type implanted region in type injection region and the 3rd region.

4. one-way low-capacitance TVS device as claimed in claim 2, it is characterised in that the multiple region also includes the 6th area Domain, SECTOR-SEVEN domain and Section Eight domain；

4th metal wire, the 4th metal wire connects the second conductivity type implanted region and the described 6th in the first area The second conductivity type implanted region in region；Fifth metal line, in fifth metal line connection the 6th region first The second conductivity type implanted region in conductivity type implanted region and the SECTOR-SEVEN domain；6th metal wire, the 6th metal wire Connect the second conductivity type implanted region in the first conductivity type implanted region and the Section Eight domain in the SECTOR-SEVEN domain；Its In, the 6th metal wire is connected with second source.

5. the one-way low-capacitance TVS device as any one of Claims 1 to 4, it is characterised in that first conductive-type Type is p-type, and second conduction type is N-type；Or, first conduction type is N-type, and second conduction type is P Type.

6. one-way low-capacitance TVS device as claimed in claim 5, it is characterised in that first conductivity type substrate is attached most importance to Doped structure, first conductive type epitaxial layer is light-dope structure, and the second conduction type buried regions is attached most importance to doped structure, Second conductive type epitaxial layer is light-dope structure, and first conduction type is isolated into heavy doping structure, described second Conductivity type implanted region is attached most importance to doped structure, and first conductivity type implanted region is attached most importance to doped structure.

7. one-way low-capacitance TVS device as claimed in claim 5, it is characterised in that the electricity of first conductivity type substrate Resistance rate is 0.005 Ω .cm~0.008 Ω .cm.

8. one-way low-capacitance TVS device as claimed in claim 5, it is characterised in that first conductive type epitaxial layer Resistivity is 2.0 Ω .cm~4.0 Ω .cm.

9. one-way low-capacitance TVS device as claimed in claim 5, it is characterised in that second conductive type epitaxial layer Resistivity is 25 Ω .cm~35 Ω .cm.

10. the one-way low-capacitance TVS device as any one of Claims 1 to 4, it is characterised in that the first area In the second conductivity type implanted region isolate with first conduction type composition voltage-regulator diode；The first of the second area Conductivity type implanted region constitutes the second general-purpose diode with the second conductive type epitaxial layer of the second area；Described 3rd First conductivity type implanted region in region constitutes the first common two pole with second conductive type epitaxial layer in the 3rd region Pipe；The conductive type epitaxial layer of four-range second constitutes the 3rd common two pole with first conductive type epitaxial layer Pipe.

11. one-way low-capacitance TVS devices as claimed in claim 10, it is characterised in that when first power supply adds positive potential, When adding negative potential describedly, first power supply is to the breakdown reverse voltage on the ground：V_BR=2*Vf₁₀+V₁₃, wherein, V_BRFor First power supply to it is described ground breakdown reverse voltage, Vf₁₀It is the pressure drop of first general-purpose diode, V₁₃For described steady Press the voltage of diode.

12. one-way low-capacitance TVS devices as claimed in claim 10, it is characterised in that when first power supply adds negative potential, When adding positive potential describedly, first power supply is to the forward voltage drop on the ground：Vf=Vf₁₂, wherein, Vf is the described first electricity Source to it is described ground forward voltage drop, Vf₁₂It is the pressure drop of the 3rd general-purpose diode.

13. one-way low-capacitance TVS devices as claimed in claim 10, it is characterised in that first general-purpose diode and institute The junction depth for stating the second general-purpose diode is 0.5 μm~1.0 μm；First general-purpose diode and second general-purpose diode Capacitance is respectively less than 0.5pF.

14. one-way low-capacitance TVS devices as claimed in claim 10, it is characterised in that the breakdown potential of the voltage-regulator diode It is 3.3V~7.0V to press.

15. one-way low-capacitance TVS devices as claimed in claim 3, it is characterised in that first conductive-type in the 5th region Type injection region constitutes the 4th general-purpose diode with second conductive type epitaxial layer in the 5th region.

16. one-way low-capacitance TVS devices as claimed in claim 4, it is characterised in that first conductive-type in the 6th region Type injection region constitutes the 6th general-purpose diode with second conductive type epitaxial layer in the 6th region；The SECTOR-SEVEN domain First conductivity type implanted region constitutes the 5th general-purpose diode with second conductive type epitaxial layer in the SECTOR-SEVEN domain；It is described Second conductive type epitaxial layer in Section Eight domain constitutes the 7th general-purpose diode with first conductive type epitaxial layer.

17. one-way low-capacitance TVS devices as claimed in claim 16, it is characterised in that the 5th general-purpose diode and institute The junction depth for stating the 6th general-purpose diode is 0.5 μm~1.0 μm；5th general-purpose diode and the 6th general-purpose diode Capacitance is respectively less than 0.5pF.

The 18. one-way low-capacitance TVS device as any one of Claims 1 to 4, it is characterised in that described unidirectional low In capacitance TVS device, power supply electric capacity over the ground is 0.15pF~0.25pF, and power supply positive ESD over the ground and reverse ESD are 8kV~9kV.

A kind of 19. manufacture methods of one-way low-capacitance TVS device, it is characterised in that the manufacture of the one-way low-capacitance TVS device Method includes：

First conductivity type substrate is provided；

The first conductive type epitaxial layer is formed, first conductive type epitaxial layer is located in first conductivity type substrate；

The second conduction type buried regions is formed, the second conduction type buried regions is located in first conductive type epitaxial layer；

The second conductive type epitaxial layer is formed, second conductive type epitaxial layer is located at first conductive type epitaxial layer On；

Multiple isolation structures are formed, the multiple isolation structure runs through second conductive type epitaxial layer, the multiple isolation Second conductive type epitaxial layer is divided into multiple regions by structure, and the multiple region includes：First area, second area, 3rd region and the 4th region；

The isolation of the first conduction type is formed, the first conduction type isolated bit is in the first area, and described first is conductive Type of isolation extends to first conductive type epitaxial layer；

Form the second conductivity type implanted region, second conductivity type implanted region is located at the first area, second area, the In three regions and the 4th region；

The first conductivity type implanted region is formed, first conductivity type implanted region is located at the second area and the 3rd region In.

The manufacture method of 20. one-way low-capacitance TVS devices as claimed in claim 19, it is characterised in that the unidirectional low electricity The manufacture method for holding TVS device also includes：

The first metal wire, the second metal wire and the 3rd metal wire are formed, first metal wire is connected in the first area The second conductivity type implanted region in second conductivity type implanted region and the second area；The second metal wire connection is described The second conductivity type implanted region in the first conductivity type implanted region and the 3rd region in second area；3rd gold medal Category line connects the second conduction type injection in the first conductivity type implanted region and the 4th region in the 3rd region Area；

The manufacture method of 21. one-way low-capacitance TVS devices as claimed in claim 20, it is characterised in that the multiple region Also include the 5th region, second conductivity type implanted region is also formed into the 5th region, first conduction type Injection region is also formed into the 5th region；Second metal wire connects the first conduction type note in the second area Enter the second conductivity type implanted region in area and the 5th region, and during second metal wire connects the 5th region The first conductivity type implanted region and the 3rd region in the second conductivity type implanted region.

The manufacture method of 22. one-way low-capacitance TVS devices as claimed in claim 20, it is characterised in that the multiple region Also include the 6th region, SECTOR-SEVEN domain and Section Eight domain；

The manufacture method of the 23. one-way low-capacitance TVS device as any one of claim 19~22, it is characterised in that First conduction type is p-type, and second conduction type is N-type；Or, first conduction type is N-type, described the Two conduction types are p-type.

The manufacture method of 24. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that described first is conductive Type substrates are attached most importance to doped structure, and first conductive type epitaxial layer is light-dope structure, the second conduction type buried regions Attach most importance to doped structure, second conductive type epitaxial layer is light-dope structure, first conduction type is isolated into heavy doping Structure, second conductivity type implanted region is attached most importance to doped structure, and first conductivity type implanted region is attached most importance to doped structure.

The manufacture method of 25. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that described first is conductive The resistivity of type substrates is 0.005 Ω .cm~0.008 Ω .cm.

The manufacture method of 26. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that described first is conductive The resistivity of type epitaxial layer is 2.0 Ω .cm~4.0 Ω .cm.

The manufacture method of 27. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that by the following method Form the second conduction type buried regions：

The second conductive type ion, the injection of second conductive type ion are injected in first conductive type epitaxial layer Dosage is 2.0E15~6.0E15；

Annealing process is performed to second conductive type ion, the temperature of the annealing process is 1200 DEG C~1250 DEG C；Institute The time for stating annealing process is 2.0h~6.0h.

The manufacture method of 28. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that described second is conductive The resistivity of type epitaxial layer is 25 Ω .cm~35 Ω .cm.

The manufacture method of 29. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that by the following method Form multiple isolation structures：

Form multiple grooves, the multiple groove runs through second conductive type epitaxial layer, the multiple groove is by described the Two conductive type epitaxial layers are divided into multiple regions, and the multiple region includes：First area, second area, the 3rd region and Four regions；

Polysilicon is filled in each trench.

The manufacture method of 30. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that by the following method Form the isolation of the first conduction type：

Annealing process is performed to first conductive type ion, the temperature of the annealing process is 1200 DEG C~1250 DEG C；Institute The time for stating annealing process is 2.0h~6.0h.

The manufacture method of 31. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that by the following method Form the second conductivity type implanted region：

The second conductive type ion, described second are injected in the first area, second area, the 3rd region and the 4th region The implantation dosage of conductive type ion is 1.0E15~1.0E16；

First time annealing process is performed to second conductive type ion, the temperature of the first time annealing process is 1100 DEG C ~1200 DEG C；The time of the first time annealing process is 10s~20s；

Second annealing process is performed to second conductive type ion, the temperature of second annealing process is 800 DEG C ~900 DEG C；The time of second annealing process is 30min~60min.

The manufacture method of 32. one-way low-capacitance TVS devices as claimed in claim 23, it is characterised in that by the following method Form the first conductivity type implanted region：

The first conductive type ion, the injection of first conductive type ion are injected in the second area and the 3rd region Dosage is 1.0E15~1.0E16；

First time annealing process is performed to first conductive type ion, the temperature of the first time annealing process is 1100 DEG C ~1200 DEG C；The time of the first time annealing process is 10s~20s；

Second annealing process is performed to first conductive type ion, the temperature of second annealing process is 800 DEG C ~900 DEG C；The time of second annealing process is 30min~60min.

The manufacture method of the 33. one-way low-capacitance TVS device as any one of claim 19~22, it is characterised in that The second conductivity type implanted region in the first area isolates composition voltage-regulator diode with first conduction type；Described First conductivity type implanted region in two regions constitutes second common two with the second conductive type epitaxial layer of the second area Pole pipe；First conductivity type implanted region in the 3rd region constitutes with second conductive type epitaxial layer in the 3rd region First general-purpose diode；The conductive type epitaxial layer of four-range second and first conductive type epitaxial layer constitute the Three general-purpose diodes.

The manufacture method of 34. one-way low-capacitance TVS devices as claimed in claim 33, it is characterised in that when the described first electricity Source adds positive potential, and when adding negative potential describedly, first power supply is to the breakdown reverse voltage on the ground：V_BR=2*Vf₁₀+ V₁₃, wherein, V_BRIt is breakdown reverse voltage of first power supply to the ground, Vf₁₀It is the pressure of first general-purpose diode Drop, V₁₃It is the voltage of the voltage-regulator diode.

The manufacture method of 35. one-way low-capacitance TVS devices as claimed in claim 33, it is characterised in that when the described first electricity Source adds negative potential, and when adding positive potential describedly, first power supply is to the forward voltage drop on the ground：Vf=Vf₁₂, wherein, Vf It is forward voltage drop of first power supply to the ground, Vf₁₂It is the pressure drop of the 3rd general-purpose diode.

The manufacture method of 36. one-way low-capacitance TVS devices as claimed in claim 33, it is characterised in that described first is common The junction depth of diode and second general-purpose diode is 0.5 μm~1.0 μm；First general-purpose diode and described second general The capacitance of logical diode is respectively less than 0.5pF.

The manufacture method of 37. one-way low-capacitance TVS devices as claimed in claim 33, it is characterised in that the pole of the voltage stabilizing two The breakdown voltage of pipe is 3.3V~7.0V.

The manufacture method of 38. one-way low-capacitance TVS devices as claimed in claim 21, it is characterised in that the 5th region The first conductivity type implanted region constitute the 4th general-purpose diode with second conductive type epitaxial layer in the 5th region.

The manufacture method of 39. one-way low-capacitance TVS devices as claimed in claim 22, it is characterised in that the 6th region The first conductivity type implanted region constitute the 6th general-purpose diode with second conductive type epitaxial layer in the 6th region；Institute It is general that the first conductivity type implanted region and second conductive type epitaxial layer in the SECTOR-SEVEN domain for stating SECTOR-SEVEN domain constitute the 5th Logical diode；It is common that second conductive type epitaxial layer in the Section Eight domain constitutes the 7th with first conductive type epitaxial layer Diode.

The manufacture method of 40. one-way low-capacitance TVS devices as claimed in claim 39, it is characterised in that the described 5th is common The junction depth of diode and the 6th general-purpose diode is 0.5 μm~1.0 μm；5th general-purpose diode and described 6th general The capacitance of logical diode is respectively less than 0.5pF.