CN106773370A - Array base palte and liquid crystal display panel - Google Patents
Array base palte and liquid crystal display panel Download PDFInfo
- Publication number
- CN106773370A CN106773370A CN201611232472.5A CN201611232472A CN106773370A CN 106773370 A CN106773370 A CN 106773370A CN 201611232472 A CN201611232472 A CN 201611232472A CN 106773370 A CN106773370 A CN 106773370A
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- Prior art keywords
- sub
- pixel region
- boss
- pixel
- array base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 15
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 239000012212 insulator Substances 0.000 claims description 14
- 238000002161 passivation Methods 0.000 claims description 12
- 239000012528 membrane Substances 0.000 claims description 6
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
- Geometry (AREA)
Abstract
A kind of array base palte that the present invention is provided, it includes substrate, the several pixel regions being formed on substrate, each pixel region includes boss's pixel region and sub-sub-pixel region, plane where the pixel electrode in the sub-sub-pixel region is less than plane where the pixel electrode of boss's pixel region, increase both the height official post in boss's pixel region and sub-sub-pixel region brightness and form difference, and then simplify pixel design, and increase aperture opening ratio, reduce the loss of backlight.
Description
Technical field
The present invention relates to display screen technology field, more particularly to a kind of array base palte and liquid crystal display panel.
Background technology
With the development of information-intensive society, people are increased to the demand of display device, thus have also promoted liquid crystal surface
The fast development of board industry, panel size is also done bigger and bigger, and client requires also more and more higher to wide viewing angle, low energy consumption etc., so that
TFT devices and pixel design also diversified development.
It is the design for being divided into boss's pixel and sub-sub-pixel by a sub-pixel to have a kind of wide viewing angle design at present, is passed through
Shared TFT switch (boss's pixel and sub-sub-pixel are connected with the shared TFT switch) and electric capacity leave behind sub-sub-pixel voltage
Come, so that the liquid crystal rotation amount difference in boss's pixel region and sub-sub-pixel region, reaches the purpose of wide viewing angle.Such as Fig. 1
Shown, gate line 11 intersects composition pixel region A with data wire 13, and time gate line 11-1, boss's pixel are provided with pixel region A
Region, sub-sub-pixel region, main pixel electrode 19 and sub-pixel electrode 20, the indicating positions of label 14 are control boss's pixel
TFT devices, the indicating positions of label 15 is the TFT devices for controlling sub-sub-pixel, and the indicating positions of label 16 is shared TFT, increases electricity
Hold 17, this kind of design needs to increase by one gate line 11-1, and a shared TFT16 is set on secondary gate line 11-1, because
This makes whole pixel design complicated, increases cabling quantity, reduces aperture opening ratio.
The content of the invention
The present invention provides a kind of array base palte, evades the aperture opening ratio reduction problem of pixel region generation, and lifting backlight is utilized
Rate.
A kind of array base palte of the present invention, including substrate, a plurality of gate line being formed on substrate, data wire and many
The pixel region of individual ranks arrangement, each pixel region includes boss's pixel region and sub-sub-pixel region, boss's pixel
Region includes boss's pixel electrode, and the sub-sub-pixel region includes sub-sub-pixel electrode, flat where the sub-sub-pixel electrode
Face is less than plane where boss's pixel electrode.
Wherein, the pixel region also includes open region, and recess is provided with the open region, the sub-sub-pixel region
Sub-sub-pixel electrode is located in the recess.
Wherein, the substrate is provided with the passivation layer of gate insulator and coupling part gate insulator, and the recess is recessed
On the gate insulator and passivation layer and substrate described in exposed portion.
Wherein, the sub-sub-pixel electrode in the sub-sub-pixel region connects with the gate insulator side and passivation layer side
Connect；Boss's pixel electrode covering gate insulator of boss's pixel region and the surface of passivation layer.
Wherein, the pixel region also includes main switch, secondary switch；Boss's pixel region is provided with the first via, institute
The drain electrode that boss's pixel electrode connects the main switch by the first via is stated, the sub-sub-pixel region is provided with the second via,
The sub-sub-pixel electrode connects the described drain electrode of switch by the second via.
Wherein, on the substrate described several gate lines, several data wire cross arrangements constitute the pixel region.
Wherein, in same pixel region boss's pixel region and sub-sub-pixel region connects and composes the picture respectively
Two adjacent gate lines in plain region.
Wherein, boss's pixel electrode of the boss's pixel region in same pixel region is connected by main switch
The grid that gate line is connected with the sub-sub-pixel electrode in the sub-sub-pixel region in same pixel region by time switch
Line is adjacent.
Liquid crystal display panel of the present invention, including described array base palte, color membrane substrates and it is held on the array
Liquid crystal layer between substrate and color membrane substrates.
The pixel region arrangement of array base palte of the present invention and design, allow boss's pixel electrode of boss's pixel region
With the sub-sub-pixel electrode in sub-sub-pixel region not in same level, increase boss's pixel region with sub-sub-pixel region
Both height official post brightness form difference, and then simplify pixel design, increase aperture opening ratio, reduce the loss of backlight.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is prior art array base palte overlooking the structure diagram；
Fig. 2 is the array base palte overlooking the structure diagram of embodiment of the present invention, and this figure belongs to perspective view, different sections
Line represents different layers；
Fig. 3 is the array base palte I-I directions sectional view described in Fig. 2.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
Fig. 2 and Fig. 3 is referred to, the present invention provides a kind of array base palte, and it includes substrate 20, is formed on the substrate
Multiple pixel regions, a plurality of gate line 21, a plurality of data lines 23, the gate line 21 and data wire 23 intersect composition pixel region
Domain.The pixel region is interpreted as a R subpixel area or B subpixel areas or G sub-pixel area in a pixel
Domain.Illustrated by taking a pixel region B as an example in the present embodiment, each pixel region B include boss's pixel region 27 and time
Subpixel area 28, boss's pixel region 27 includes boss's pixel electrode 271, and the sub-sub-pixel region 28 includes second son
Pixel electrode 281, the place plane of sub-sub-pixel electrode 281 in the sub-sub-pixel region 28 is less than boss's pixel region 27
The place plane of boss's pixel electrode 271.
In the present embodiment, the pixel region also includes open region, and open region is transparent area, refers to that array base palte level is put down
The position corresponding with the pixel between the black matrix" that color membrane substrates are set on face.Recess 101, institute are provided with the open region
The pixel electrode 281 for stating sub-sub-pixel region 28 is located in the recess 101.
In the present embodiment, the substrate 20 is provided with several gate lines 21, several data wires 23, gate insulator 41 and connects
The passivation layer 43 of socket part point gate insulator 41.The composition data wire 23 and source electrode, drain electrode are formed with the insulating barrier 41
Metal level, in Fig. 2 show drain electrode 29.The drain electrode 29 is located on the gate insulator 41, and the passivation layer 43 is covered
Part of grid pole insulating barrier 41 and part drain line 29.
The recess 101 is recessed on the gate insulator 41 and passivation layer 43 and substrate 20 described in exposed portion.It is secondary
The sub-sub-pixel electrode 281 of subpixel area 28 is formed at the inner surface of recess 101, including the part of substrate 20 for being exposed to recess 101.
Boss's pixel electrode 271 with boss's pixel region 27 that the sub-sub-pixel region 28 belongs to same pixel region B covers grid
The surface of insulating barrier 41 and passivation layer 43.And then make the sub-sub-pixel electrode 281 in the sub-sub-pixel region 28 and boss's pixel
Boss's pixel electrode 271 in region 27 is not in a plane.
The pixel arrangement and design of array base palte of the present invention, the sub-sub-pixel electrode shape in sub-sub-pixel region 28
Into in recess 101, allowing boss's pixel electrode 271 of boss's pixel region 27 and the sub-sub-pixel electrode in sub-sub-pixel region 28
281 in same level, so as to the thickness of liquid crystal layer allowed on sub-sub-pixel region 28 is more than on boss's pixel region 27
Thickness of liquid crystal so that the electric field in the region of sub-sub-pixel region 28 allows boss's pixel less than the electric field in the region of boss's pixel region 27
Region 27 forms difference with the brightness of sub-sub-pixel region 28, so as to realize the purpose of design of low aberration.
In the present embodiment, boss's pixel region 27 and sub-sub-pixel region 28 in same pixel region lead to respectively
Cross two adjacent gate lines 21 that main switch, secondary switch connect and compose the pixel region.In boss's pixel region 27 also
It is provided with via 272, the sub-sub-pixel region 28 and is provided with via 282.
In the present embodiment, the pixel region includes main switch 24 and secondary switch 25.The main switch 24 connects the master
Subpixel area 27, the described connection of the switch 25 sub-sub-pixel region 28.The main switch 24 include grid, source electrode 241,
Drain electrode 242 and the raceway groove (figure is not marked) between source electrode 241 and drain electrode 242, secondary switch 25 includes grid, source electrode 251, leakage
Pole 252 and the raceway groove between source electrode 251 and drain electrode 252 (figure is not marked).Boss's pixel electrode 271 passes through via 272
It is connected with the drain electrode 242 of the main switch.The sub-sub-pixel electrode 281 is by the via 282 and the described leakage of switch
Pole 252 connects.Concrete operating principle is：During energization, the grid passes through the data wire 23 to source electrode to a voltage, electric current,
Then by extremely drain electrode after raceway groove, then each boss's pixel electrode or sub-sub-pixel electrode are given by via.
Difference in height is formed between boss's pixel electrode of the invention and sub-sub-pixel electrode, and then pressure is formed when being powered
Difference, and then different liquid crystal capacitances are formed, realize display effect.One gate line of setting more than same pixel region is not needed
And a shared TFT is set on this gate line, few a gate line and electric capacity increase aperture opening ratio, reduce backlight power consumption.
The present invention also provides a kind of liquid crystal display panel, and it includes described array base palte, color membrane substrates and is held on institute
State the liquid crystal layer between array base palte and color membrane substrates.The liquid crystal display panel can be used on the electronic installations such as TV, mobile phone.
Above disclosed is only a kind of preferred embodiment of the invention, can not limit the power of the present invention with this certainly
Sharp scope, one of ordinary skill in the art will appreciate that realizing all or part of flow of above-described embodiment, and weighs according to the present invention
Profit requires made equivalent variations, still falls within the covered scope of invention.
Claims (9)
1. a kind of array base palte, it is characterised in that including substrate, a plurality of gate line being formed on substrate, data wire and multiple
The pixel region of ranks arrangement, each pixel region includes boss's pixel region and sub-sub-pixel region, boss's pixel region
Domain includes boss's pixel electrode, and the sub-sub-pixel region includes sub-sub-pixel electrode, plane where the sub-sub-pixel electrode
Less than plane where boss's pixel electrode.
2. array base palte as claimed in claim 1, it is characterised in that the pixel region also includes open region, the opening
Recess is provided with area, the sub-sub-pixel electrode in the sub-sub-pixel region is located in the recess.
3. array base palte as claimed in claim 2, it is characterised in that the substrate is provided with gate insulator and coupling part
The passivation layer of gate insulator, the recess is recessed on the gate insulator and passivation layer and substrate described in exposed portion.
4. array base palte as claimed in claim 3, it is characterised in that the sub-sub-pixel electrode in the sub-sub-pixel region and institute
State gate insulator side and the connection of passivation layer side；Boss's pixel electrode covering gate insulator of boss's pixel region
And the surface of passivation layer.
5. array base palte as claimed in claim 4, it is characterised in that the pixel region also includes main switch, secondary switch；Institute
State boss's pixel region and be provided with the first via, boss's pixel electrode connects the drain electrode of the main switch by the first via,
The sub-sub-pixel region is provided with the second via, and the sub-sub-pixel electrode connects the described leakage of switch by the second via
Pole.
6. array base palte as claimed in claim 5, it is characterised in that described several gate lines, several numbers on the substrate
The pixel region is constituted according to line cross arrangement.
7. array base palte as claimed in claim 6, it is characterised in that the boss's pixel region in same pixel region
With two adjacent gate lines that sub-sub-pixel region connects and composes the pixel region respectively.
8. array base palte as claimed in claim 7, it is characterised in that the boss's pixel region in same pixel region
Boss's pixel electrode gate line connected by main switch and the sub-sub-pixel region being located in same pixel region time
Pixel electrode is adjacent by time gate line of switch connection.
9. a kind of liquid crystal display panel, it is characterised in that including the array base palte described in claim any one of 1-8, color film base
Plate and the liquid crystal layer being held between the array base palte and color membrane substrates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611232472.5A CN106773370B (en) | 2016-12-27 | 2016-12-27 | Liquid crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611232472.5A CN106773370B (en) | 2016-12-27 | 2016-12-27 | Liquid crystal display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106773370A true CN106773370A (en) | 2017-05-31 |
| CN106773370B CN106773370B (en) | 2020-03-27 |
Family
ID=58922437
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611232472.5A Active CN106773370B (en) | 2016-12-27 | 2016-12-27 | Liquid crystal display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106773370B (en) |
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|---|---|---|---|---|
| KR20050064753A (en) * | 2003-12-24 | 2005-06-29 | 엘지.필립스 엘시디 주식회사 | An array plate for lcd and the fabrication method thereof |
| CN1928644A (en) * | 2006-09-12 | 2007-03-14 | 广辉电子股份有限公司 | Liquid crystal display panel and array substrate for liquid crystal display |
| CN101135786A (en) * | 2006-08-30 | 2008-03-05 | 胜华科技股份有限公司 | Semi-transparent liquid crystal display device |
| CN101236345A (en) * | 2008-02-29 | 2008-08-06 | 上海广电光电子有限公司 | Liquid crystal display panel, pixel structure and method of manufacture |
| CN101916014A (en) * | 2010-08-03 | 2010-12-15 | 友达光电股份有限公司 | Liquid crystal display panel capable of adjusting viewing angles |
| CN102645804A (en) * | 2011-12-12 | 2012-08-22 | 北京京东方光电科技有限公司 | Array substrate and manufacturing method thereof and display device |
| CN103869558A (en) * | 2014-03-31 | 2014-06-18 | 昆山龙腾光电有限公司 | Liquid crystal display device and manufacturing method thereof |
| CN104133332A (en) * | 2014-07-17 | 2014-11-05 | 深圳市华星光电技术有限公司 | Display panel and display device |
-
2016
- 2016-12-27 CN CN201611232472.5A patent/CN106773370B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050064753A (en) * | 2003-12-24 | 2005-06-29 | 엘지.필립스 엘시디 주식회사 | An array plate for lcd and the fabrication method thereof |
| CN101135786A (en) * | 2006-08-30 | 2008-03-05 | 胜华科技股份有限公司 | Semi-transparent liquid crystal display device |
| CN1928644A (en) * | 2006-09-12 | 2007-03-14 | 广辉电子股份有限公司 | Liquid crystal display panel and array substrate for liquid crystal display |
| CN101236345A (en) * | 2008-02-29 | 2008-08-06 | 上海广电光电子有限公司 | Liquid crystal display panel, pixel structure and method of manufacture |
| CN101916014A (en) * | 2010-08-03 | 2010-12-15 | 友达光电股份有限公司 | Liquid crystal display panel capable of adjusting viewing angles |
| CN102645804A (en) * | 2011-12-12 | 2012-08-22 | 北京京东方光电科技有限公司 | Array substrate and manufacturing method thereof and display device |
| CN103869558A (en) * | 2014-03-31 | 2014-06-18 | 昆山龙腾光电有限公司 | Liquid crystal display device and manufacturing method thereof |
| CN104133332A (en) * | 2014-07-17 | 2014-11-05 | 深圳市华星光电技术有限公司 | Display panel and display device |
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| Publication number | Publication date |
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| CN106773370B (en) | 2020-03-27 |
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Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee after: TCL China Star Optoelectronics Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
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