CN106773370B - Liquid crystal display panel - Google Patents
Liquid crystal display panel Download PDFInfo
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- CN106773370B CN106773370B CN201611232472.5A CN201611232472A CN106773370B CN 106773370 B CN106773370 B CN 106773370B CN 201611232472 A CN201611232472 A CN 201611232472A CN 106773370 B CN106773370 B CN 106773370B
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- liquid crystal
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- 239000004973 liquid crystal related substance Substances 0.000 title claims description 25
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 238000002161 passivation Methods 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
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Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
- Geometry (AREA)
Abstract
The invention provides an array substrate, which comprises a substrate and a plurality of pixel areas formed on the substrate, wherein each pixel area comprises a main sub-pixel area and a sub-pixel area, the plane of a pixel electrode of the sub-pixel area is lower than the plane of the pixel electrode of the main sub-pixel area, the height difference between the main sub-pixel area and the sub-pixel area is increased, the brightness of the main sub-pixel area and the brightness of the sub-pixel area are different, the pixel design is simplified, the aperture opening ratio is increased, and the loss of backlight is reduced.
Description
Technical Field
The invention relates to the technical field of display screens, in particular to a liquid crystal display panel.
Background
With the development of the information society, the demand of people on display devices is increased, so that the rapid development of the liquid crystal panel industry is promoted, the larger the panel size is, the higher the requirements of customers on wide viewing angle, low energy consumption and the like are, and further, the TFT devices and the pixel design are diversified and developed.
At present, a wide viewing angle design is designed by dividing a sub-pixel into a main sub-pixel and a sub-pixel, and the voltage of the sub-pixel is pulled down by a shared TFT switch (both the main sub-pixel and the sub-pixel are connected to the shared TFT switch) and a capacitor, so that the liquid crystal rotation amount of the main sub-pixel region and the sub-pixel region is different, and the purpose of wide viewing angle is achieved. As shown in fig. 1, a gate line 11 and a data line 13 intersect to form a pixel area a, a sub-gate line 11-1 is disposed in the pixel area a, a main sub-pixel area, a sub-pixel area, a main pixel electrode 19 and a sub-pixel electrode 20, a TFT device for controlling the main sub-pixel is indicated at 14, a TFT device for controlling the sub-pixel is indicated at 15, a shared TFT is indicated at 16, and a capacitor 17 is added.
Disclosure of Invention
The invention provides a liquid crystal display panel, which avoids the problem of aperture opening ratio reduction generated in a pixel area and improves the backlight utilization rate.
The invention discloses a liquid crystal display panel, which comprises an array substrate, a color film substrate and a liquid crystal layer clamped between the array substrate and the color film substrate, wherein the array substrate comprises a substrate, a plurality of grid lines, data lines and a plurality of pixel areas arranged in rows and columns, the plurality of grid lines and the data lines are formed on the substrate, each pixel area comprises a main sub-pixel area and a sub-pixel area, the main sub-pixel area comprises a main sub-pixel electrode, the sub-pixel area comprises a sub-pixel electrode, and the plane of the sub-pixel electrode is lower than the plane of the main sub-pixel electrode.
The pixel region further comprises an opening region, a concave portion is arranged in the opening region, and the secondary sub-pixel electrode of the secondary sub-pixel region is located in the concave portion.
The substrate is provided with a grid electrode insulating layer and a passivation layer connected with part of the grid electrode insulating layer, and the concave part is concavely arranged on the grid electrode insulating layer and the passivation layer and exposes part of the substrate.
The sub-pixel electrode of the sub-pixel area is connected with one side of the grid insulation layer and one side of the passivation layer; the main sub-pixel electrode of the main sub-pixel region covers the surfaces of the gate insulating layer and the passivation layer.
The pixel region further comprises a main switch and a secondary switch; the main sub-pixel region is provided with a first through hole, the main sub-pixel electrode is connected with the drain electrode of the main switch through the first through hole, the secondary sub-pixel region is provided with a second through hole, and the secondary sub-pixel electrode is connected with the drain electrode of the secondary switch through the second through hole.
The plurality of gate lines and the plurality of data lines on the substrate are arranged in a crossed manner to form the pixel area.
The main sub-pixel area and the sub-pixel area in the same pixel area are respectively connected with two adjacent gate lines forming the pixel area.
The main sub-pixel electrodes of the main sub-pixel areas in the same pixel area are adjacent to the gate lines of the sub-pixel areas in the same pixel area, which are connected through the main switches.
According to the pixel area arrangement and design of the array substrate, the main sub-pixel electrode of the main sub-pixel area and the sub-pixel electrode of the sub-pixel area are not on the same level, the height difference between the main sub-pixel area and the sub-pixel area is increased, the brightness difference between the main sub-pixel area and the sub-pixel area is formed, the pixel design is simplified, the aperture opening ratio is increased, and the backlight loss is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic top view of a prior art array substrate;
FIG. 2 is a schematic top view of an array substrate according to an embodiment of the invention, the figure is a perspective view, and different cross-sectional lines represent different layers;
fig. 3 is a sectional view of the array substrate I-I shown in fig. 2.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2 and 3, the present invention provides an array substrate, which includes a substrate 20, a plurality of pixel regions formed on the substrate, a plurality of gate lines 21, and a plurality of data lines 23, wherein the gate lines 21 and the data lines 23 intersect to form the pixel regions. The pixel region is understood as an R sub-pixel region, or a B sub-pixel region, or a G sub-pixel region in one pixel. In this embodiment, a pixel region B is taken as an example for explanation, each pixel region B includes a main sub-pixel region 27 and a sub-pixel region 28, the main sub-pixel region 27 includes a main sub-pixel electrode 271, the sub-pixel region 28 includes a sub-pixel electrode 281, and a plane of the sub-pixel electrode 281 of the sub-pixel region 28 is lower than a plane of the main sub-pixel electrode 271 of the main sub-pixel region 27.
In this embodiment, the pixel region further includes an opening region, where the opening region is a light-transmitting region and refers to a position on a horizontal plane of the array substrate corresponding to a pixel between black matrixes disposed on the color film substrate. A recess 101 is formed in the opening region, and the pixel electrode 281 of the sub-pixel region 28 is located in the recess 101.
In this embodiment, the substrate 20 is provided with a plurality of gate lines 21, a plurality of data lines 23, a gate insulating layer 41, and a passivation layer 43 connecting a portion of the gate insulating layer 41. A metal layer constituting the data line 23 and the source and drain electrodes, a drain electrode 29 shown in fig. 2, is formed on the insulating layer 41. The drain electrode 29 is located on the gate insulating layer 41, and the passivation layer 43 covers a portion of the gate insulating layer 41 and a portion of the drain line 29.
The recess 101 is recessed on the gate insulating layer 41 and the passivation layer 43 and exposes a portion of the substrate 20. The sub-pixel electrode 281 of the sub-pixel region 28 is formed on the inner surface of the recess 101, including the portion of the substrate 20 exposed in the recess 101. The main subpixel electrode 271 of the main subpixel region 27 belonging to the same pixel region B as the sub subpixel region 28 covers the surfaces of the gate insulating layer 41 and the passivation layer 43. Thereby making the sub-pixel electrode 281 of the sub-pixel region 28 and the main sub-pixel electrode 271 of the main sub-pixel region 27 not in a same plane.
In the arrangement and design of the sub-pixels of the array substrate, the sub-pixel electrodes of the sub-pixel region 28 are formed in the concave part 101, the main sub-pixel electrode 271 of the main sub-pixel region 27 and the sub-pixel electrode 281 of the sub-pixel region 28 are not on the same level, so that the thickness of the liquid crystal layer on the sub-pixel region 28 is larger than that of the liquid crystal on the main sub-pixel region 27, the electric field of the sub-pixel region 28 is smaller than that of the main sub-pixel region 27, and the brightness of the main sub-pixel region 27 and the sub-pixel region 28 is different, thereby realizing the design purpose of low color difference.
In this embodiment, the main sub-pixel region 27 and the sub-pixel region 28 in the same pixel region are connected to two adjacent gate lines 21 constituting the pixel region through a main switch and a sub-switch, respectively. A via hole 272 is further disposed in the main sub-pixel region 27, and a via hole 282 is disposed in the sub-pixel region 28.
In this embodiment, the pixel region includes a main switch 24 and a sub-switch 25. The main switch 24 is connected to the main sub-pixel region 27, and the sub-switch 25 is connected to the sub-pixel region 28. The primary switch 24 includes a gate, a source 241, a drain 242, and a channel (not shown) between the source 241 and the drain 242, and the secondary switches 25 each include a gate, a source 251, a drain 252, and a channel (not shown) between the source 251 and the drain 252. The main sub-pixel electrode 271 is connected to the drain 242 of the main switch through a via 272. The sub-pixel electrode 281 is connected to the drain electrode 252 of the sub-switch through the via 282. The specific working principle is as follows: when the power is on, the grid electrode supplies voltage, current flows to the source electrode through the data line 23, then flows to the drain electrode through the channel, and then is supplied to each main sub-pixel electrode or each sub-pixel electrode through the through hole.
According to the invention, the height difference is formed between the main sub-pixel electrode and the sub-pixel electrode, so that a pressure difference is formed when the liquid crystal display panel is electrified, and different liquid crystal capacitors are formed, thereby realizing a display effect. One secondary grid line and one shared TFT arranged on the secondary grid line are not needed to be arranged in the same pixel area, one grid line and one capacitor are omitted, the aperture opening ratio is increased, and the backlight power consumption is reduced.
The invention also provides a liquid crystal display panel which comprises the array substrate, a color film substrate and a liquid crystal layer clamped between the array substrate and the color film substrate. The liquid crystal display panel can be used for electronic devices such as televisions, mobile phones and the like.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. The liquid crystal display panel is characterized by comprising an array substrate, a color film substrate and a liquid crystal layer clamped between the array substrate and the color film substrate, wherein the array substrate comprises a substrate, a plurality of grid lines, data lines and a plurality of pixel areas arranged in rows and columns, each pixel area comprises a main sub-pixel area and a sub-pixel area, the main sub-pixel area comprises a main sub-pixel electrode, the sub-pixel area comprises a sub-pixel electrode, the pixel area further comprises an opening area, a concave portion is arranged in the opening area, the sub-pixel electrode of the sub-pixel area is located in the concave portion, the plane of the sub-pixel electrode is lower than the plane of the main sub-pixel electrode, and the thickness of the liquid crystal layer stacked on the sub-pixel area is larger than the thickness of the liquid crystal on the main sub-pixel area.
2. The liquid crystal display panel of claim 1, wherein the substrate is provided with a gate insulating layer and a passivation layer connecting a portion of the gate insulating layer, and the recess is recessed in the gate insulating layer and the passivation layer and exposes a portion of the substrate.
3. The liquid crystal display panel of claim 2, wherein the sub-pixel electrode of the sub-pixel region is connected to the gate insulating layer side and the passivation layer side; the main sub-pixel electrode of the main sub-pixel region covers the surfaces of the gate insulating layer and the passivation layer.
4. The liquid crystal display panel according to claim 3, wherein the pixel region further includes a main switch, a sub switch; the main sub-pixel region is provided with a first through hole, the main sub-pixel electrode is connected with the drain electrode of the main switch through the first through hole, the secondary sub-pixel region is provided with a second through hole, and the secondary sub-pixel electrode is connected with the drain electrode of the secondary switch through the second through hole.
5. The liquid crystal display panel of claim 4, wherein the gate lines and the data lines on the substrate are arranged to cross each other to form the pixel region.
6. The liquid crystal display panel of claim 5, wherein the main sub-pixel area and the sub-pixel area within the same pixel area are respectively connected to two adjacent gate lines constituting the pixel area.
7. The liquid crystal display panel of claim 6, wherein the gate line to which the main sub-pixel electrode of the main sub-pixel area within the same pixel area is connected through the main switch is adjacent to the gate line to which the sub-pixel electrode of the sub-pixel area within the same pixel area is connected through the sub-switch.
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CN201611232472.5A CN106773370B (en) | 2016-12-27 | 2016-12-27 | Liquid crystal display panel |
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CN201611232472.5A CN106773370B (en) | 2016-12-27 | 2016-12-27 | Liquid crystal display panel |
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CN106773370B true CN106773370B (en) | 2020-03-27 |
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20050064753A (en) * | 2003-12-24 | 2005-06-29 | 엘지.필립스 엘시디 주식회사 | An array plate for lcd and the fabrication method thereof |
CN101135786A (en) * | 2006-08-30 | 2008-03-05 | 胜华科技股份有限公司 | Semi-transparent liquid crystal display device |
CN101236345A (en) * | 2008-02-29 | 2008-08-06 | 上海广电光电子有限公司 | Liquid crystal display panel, pixel structure and method of manufacture |
CN101916014A (en) * | 2010-08-03 | 2010-12-15 | 友达光电股份有限公司 | Liquid crystal display panel capable of adjusting viewing angles |
CN102645804A (en) * | 2011-12-12 | 2012-08-22 | 北京京东方光电科技有限公司 | Array substrate and manufacturing method thereof and display device |
CN103869558A (en) * | 2014-03-31 | 2014-06-18 | 昆山龙腾光电有限公司 | Liquid crystal display device and manufacturing method thereof |
CN104133332A (en) * | 2014-07-17 | 2014-11-05 | 深圳市华星光电技术有限公司 | Display panel and display device |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100480795C (en) * | 2006-09-12 | 2009-04-22 | 友达光电股份有限公司 | Liquid crystal display panel and array substrate for liquid crystal display |
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2016
- 2016-12-27 CN CN201611232472.5A patent/CN106773370B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20050064753A (en) * | 2003-12-24 | 2005-06-29 | 엘지.필립스 엘시디 주식회사 | An array plate for lcd and the fabrication method thereof |
CN101135786A (en) * | 2006-08-30 | 2008-03-05 | 胜华科技股份有限公司 | Semi-transparent liquid crystal display device |
CN101236345A (en) * | 2008-02-29 | 2008-08-06 | 上海广电光电子有限公司 | Liquid crystal display panel, pixel structure and method of manufacture |
CN101916014A (en) * | 2010-08-03 | 2010-12-15 | 友达光电股份有限公司 | Liquid crystal display panel capable of adjusting viewing angles |
CN102645804A (en) * | 2011-12-12 | 2012-08-22 | 北京京东方光电科技有限公司 | Array substrate and manufacturing method thereof and display device |
CN103869558A (en) * | 2014-03-31 | 2014-06-18 | 昆山龙腾光电有限公司 | Liquid crystal display device and manufacturing method thereof |
CN104133332A (en) * | 2014-07-17 | 2014-11-05 | 深圳市华星光电技术有限公司 | Display panel and display device |
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Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee after: TCL China Star Optoelectronics Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |