CN106710567A - Display driving device and method, shifting register and display device - Google Patents
Display driving device and method, shifting register and display device Download PDFInfo
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- CN106710567A CN106710567A CN201710210140.5A CN201710210140A CN106710567A CN 106710567 A CN106710567 A CN 106710567A CN 201710210140 A CN201710210140 A CN 201710210140A CN 106710567 A CN106710567 A CN 106710567A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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- Crystallography & Structural Chemistry (AREA)
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Abstract
The invention discloses a display driving device and method, a shifting register and a display device. The display driving device comprises a time schedule controller and the shifting register, wherein the shifting register comprises a logical control unit and a power switching unit which are connected with each other; the power switching unit is configured with more than one group of high-voltage driving clock signals; the logical control unit is used for controlling the power switching unit to select and output one group of the more than one group of high-voltage driving clock signals according to a sub-pixel line position displayed by a current driver and/or current temperature information provided by the time schedule controller to serve as the high-voltage driving clock signal of the shifting register. By adopting the display driving device and method, the shifting register and the display device in the embodiment of the invention, proper high-voltage driving clock signals can be selected specific to different conditions, and the problem of defective grating line caused by insufficient charging is solved.
Description
Technical field
The present invention relates to display technology field, espespecially a kind of display drive apparatus and method, shift register and display are filled
Put.
Background technology
In recent years, flourishing with semiconductor technologies, portable type electronic product and flat-panel screens product are also therewith
Rise.And, thin film transistor (TFT) (TFT, Thin Film Transistor) liquid crystal display is due to operating voltage is low, nothing
The advantages of radiation scattering, lightweight and small volume, the standard output device of various data products has been increasingly becoming it.TFT liquid
The general picture element matrix arranged by horizontal and vertical directions of crystal display is constituted, and when TFT LCD is shown, is led to
Cross shift register and produce grid input signal, scan each row pixel successively from the first row to last column.In design TFT liquid crystal
, it is necessary to design appropriate shift register during display, to ensure its steady operation.
As shown in figure 1, be typical shift register cell composition schematic diagram, wherein input includes primary signal input
INPUT, clock signal clk, high drive clock signal (high level is VGH, and low level is VGL), reset signal RESET and low
Voltage signal inputs VSS, signal generation using 10 thin film transistor (TFT)s (M1, M2, M3, M5, M6, M7, M8, M9, M10,
M11) and 1 bootstrap capacitor, output includes a signal output part OUTPUT.
Generally, shift register is, and previous collection shift register cell in series by multi-stage shift register unit
Output signal as rear stage shift register input signal, as shown in Figure 2.
As shown in figure 3, be the internal logic schematic diagram of shift register, wherein, shift register generally includes logic electricity
Road (Logic Circuit), shifting deposit unit (Shift Register), level conversion unit (Level Shift) and defeated
Go out buffer unit (Output Buffer), wherein, logic circuit be used for signal transacting, according to initial pulse signal (STV, such as
STV1 and STV2), clock signal (CPV), output enable signal (OE), move to left or move to right indication signal (L/R) etc., control displacement
Register is sequentially output each row grid line gating signal, and serial signal is converted to parallel signal, level conversion by shifting deposit unit
Low voltage signal is converted to high voltage signal by unit, and output buffer unit is used to export and amplifies, and exports line by line to each row grid line
In (G1, G2 ... ... Gn), so as to gate/scan each row grid line successively.
In order to reduce the cost of manufacture of TFT LCD, manufacturer is by the direct glass in panel of amorphous silicon technology in the industry
Multistage non-crystalline silicon shift register is made on glass substrate, so as to the known usual gate drivers of substitution, so as to reach reduction
The purpose of liquid crystal display cost of manufacture.
With the raising of liquid crystal panel resolution ratio, liquid crystal panel consumption electricity is also obviously improved, in order to reduce liquid crystal panel
Power consumption so that extend system stand-by time, each panel factory in the design small size liquid crystal panel when generally use column inversion
Type of drive.
Fig. 4 gives source output voltage signal schematic representation under column inversion, it can be seen that being turned in consecutive frame
When changing, the voltage change of source output is maximum, can according to electric charge transfer equilibrium principle Q=delta U*C=delta t*I
Know, its corresponding charging interval is more long, it is possible that the problem of first trip undercharge, so as to the grid for causing are bad to line.Separately
Outward, under cryogenic conditions, due to the firing current reduction of the thin film transistor (TFT) in liquid crystal panel, charge more insufficient, grid are to line
Bad problem is more serious.
The content of the invention
In order to solve the above-mentioned technical problem, a kind of display drive apparatus be the embodiment of the invention provides and method, displacement is posted
Storage and display device, to solve the problems, such as that undercharge causes grid bad to line.
The embodiment of the invention provides a kind of display drive apparatus, including time schedule controller and shift register, the shifting
Bit register includes be connected logic control element and power supply switch unit, wherein：
The power supply switch unit is configured with more than one group of high drive clock signal；
The logic control element is used for the sub-pixel line position that current driving shows provided according to the time schedule controller
Put and/or Current Temperatures information, control power supply switch unit selected from described more than one group of high drive clock signal
One group of output, as the high drive clock signal of the shift register.
Alternatively, every group of high drive clock signal includes high level signal and low level signal, the power supply switching
Unit is configured with two groups of high drive clock signals, respectively the first high drive clock signal group and the second high drive clock
Signal group, wherein, the high level signal voltage in the first high drive clock signal group is more than the second high drive clock signal
The high level signal voltage of group and more than 0 volt, low level signal voltage in the first high drive clock signal group is less than second
The low level signal voltage of high drive clock signal group and less than 0 volt.
Alternatively, the logic control element is further used for：The current driving provided according to the time schedule controller shows
When the rows position for showing is the first row sub-pixel, control power supply switch unit is output as the first high drive clock signal
Group；The rows position that the current driving provided according to the time schedule controller shows is its in addition to the first row sub-pixel
He manage it sub-pixel when, control power supply switch unit be output as the second high drive clock signal group.
Alternatively, the time schedule controller includes temperature detecting unit；
The temperature detecting unit is used to export Current Temperatures less than or equal to temperature threshold or the information more than temperature threshold；
The logic control element is further used for：It is less than or equal to according to the Current Temperatures that the temperature detecting unit is provided
The information of temperature threshold, control power supply switch unit is output as the first high drive clock signal group；Examined according to the temperature
Information of the Current Temperatures more than temperature threshold that unit is provided is surveyed, when control power supply switch unit is output as the second high drive
Clock signal group.
Alternatively, the time schedule controller includes connected temperature detecting unit and select unit, the select unit with
The logic control element is connected；
The temperature detecting unit is used to export Current Temperatures less than or equal to temperature threshold or the information more than temperature threshold
To the select unit；
The select unit drives the rows position for showing for the first row sub-pixel for current, or Current Temperatures are small
When equal to temperature threshold, the first signal is exported；The rows position of current driving display is in addition to the first row sub-pixel
Other row sub-pixels, and Current Temperatures be more than temperature threshold when, export secondary signal；
The logic control element is further used for：When receiving the first signal of the select unit output, control electricity
Source switch unit is output as the first high drive clock signal group；When receiving the secondary signal of the select unit output,
Control power supply switch unit is output as the second high drive clock signal group.
Alternatively, the shift register, including multiple shift register cells for cascading, wherein, for driving first
The W/L values of the switching thin-film transistor TFT in the shift register cell of row sub-pixel are more than for driving other row sub-pixels
Shift register cell in switch TFT W/L values, wherein, the W be TFT link up width, L be TFT channel length, W/L
Represent that TFT links up width divided by TFT channel length.
The embodiment of the present invention additionally provides a kind of display drive method, and the high pressure that shift register is configured with more than a group is driven
Dynamic clock signal, methods described includes：
When the shift register drives display panel to show frame by frame, according to the current rows position for driving and showing
And/or according to Current Temperatures, select one group of corresponding high drive clock signal.
Alternatively, every group of high drive clock signal includes high level signal and low level signal, the shift LD
Device is configured with two groups of high drive clock signals, and respectively the first high drive clock signal group and the second high drive clock are believed
Number group, wherein, the high level signal voltage in the first high drive clock signal group is more than the second high drive clock signal group
High level signal voltage and more than 0 volt, low level signal voltage in the first high drive clock signal group is high less than second
Pressure drives the low level signal voltage of clock signal group and less than 0 volt；
The basis currently drives the rows position of display, selects one group of corresponding high drive clock signal group
Including：When the rows position of current driving display is the first row sub-pixel, the first high drive clock signal group is selected；When
When the rows position of preceding driving display is other row sub-pixels in addition to the first row sub-pixel, the second high drive is selected
Clock signal group；
It is described according to Current Temperatures, select one group of corresponding high drive clock signal group to include：Current Temperatures are less than
During equal to temperature threshold, the first high drive clock signal group is selected；When Current Temperatures are more than temperature threshold, the second high pressure is selected
Drive clock signal group；
The basis currently drives the rows position of display and according to Current Temperatures, selects one group of corresponding high pressure
Driving clock signal group includes：The current rows position for driving display is the first row sub-pixel, or Current Temperatures less than etc.
When temperature threshold, the first high drive clock signal group is selected；The rows position of current driving display is except the first row
Other row sub-pixels beyond sub-pixel, and Current Temperatures be more than temperature threshold when, select the second high drive clock signal group.
The embodiment of the present invention additionally provides a kind of shift register, including multiple shift register cells for cascading, and is used for
The W/L values of the switching thin-film transistor TFT in the shift register cell of the first row sub-pixel are driven more than for driving other
The W/L values of the switch TFT in the shift register cell of row sub-pixel, wherein, the W is that TFT links up width, and L is TFT channel
Length, W/L represents that TFT links up width divided by TFT channel length.
The embodiment of the present invention additionally provides a kind of display device, including above-mentioned display drive apparatus.
In the embodiment of the present invention, shift register is configured with more than one group of high drive clock signal, can according to work as
The rows position of preceding driving display and/or the information of Current Temperatures, select corresponding high drive clock signal, Ye Jizhen
To different situations, may be selected suitable high drive clock signal, it is to avoid due to caused by undercharge grid to the bad problem of line.
Further, when the rows position of current driving display is the first row sub-pixel, the first high drive is selected
Clock signal group (the high drive clock signal group of high level input), can increase the firing current of thin film transistor (TFT), it is to avoid
Grid is to the bad problem of line caused by first trip undercharge.Current Temperatures are less than or equal to temperature threshold, and the first high pressure of selection is driven
Dynamic clock signal group (the high drive clock signal group of high level input), increases the firing current of thin film transistor (TFT), it is to avoid by
Grid are to the bad problem of line caused by low temperature drives.
Further, by increasing the W/L values of the switch TFT in the shift register cell for driving the first row sub-pixel,
So as to increase the firing current of thin film transistor (TFT), it is to avoid grid is to the bad problem of line caused by first trip undercharge.
Other features and advantages of the present invention will be illustrated in the following description, also, the partly change from specification
Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights
Specifically noted structure is realized and obtained in claim and accompanying drawing.
Brief description of the drawings
Accompanying drawing is used for providing further understanding technical solution of the present invention, and constitutes a part for specification, with this
The embodiment of application for explaining technical scheme, does not constitute the limitation to technical solution of the present invention together.
Fig. 1 is typical shift register cell composition schematic diagram；
Fig. 2 is that shift register cell cascades schematic diagram；
Fig. 3 is the internal logic schematic diagram of shift register；
Fig. 4 is source output voltage signal schematic representation under column inversion；
Fig. 5 is the display drive apparatus schematic diagram of the embodiment of the present invention；
Fig. 6 is configured with showing for two groups of high drive clock signals (VGHH and VGLH, VGHL and VGLL) for shift register
It is intended to；
Fig. 7 is the display drive apparatus schematic diagram of the embodiment of the present invention one；
Fig. 8 is the composition schematic diagram of the display drive apparatus of the embodiment of the present invention one；
Fig. 9 is the display drive apparatus schematic diagram of the embodiment of the present invention two；
Figure 10 is the display drive apparatus schematic diagram of the embodiment of the present invention three.
Specific embodiment
To make the object, technical solutions and advantages of the present invention become more apparent, below in conjunction with accompanying drawing to the present invention
Embodiment be described in detail.It should be noted that in the case where not conflicting, in the embodiment and embodiment in the application
Feature can mutually be combined.
The low voltage logic clock signal of TCON (time schedule controller) outputs is by level conversion unit (Level shifter
Circuit high drive clock signal) is generated afterwards, and its high level is VGH, and low level is VGL.It can be seen from existing knowledge,
The difference of VGH-VGL is bigger, and the power consumption of shift register consumption is bigger, therefore in product design, the level of VGH and VGL is needed
To be shown in power consumption and picture and find equalization point.
As shown in figure 5, the display drive apparatus schematic diagram of the embodiment of the present invention, wherein, display drive apparatus, including sequential
Controller 10 and shift register 20, the shift register include be connected logic control element 22 and power supply switch unit 21,
Wherein：
The power supply switch unit 21 is configured with more than one group of high drive clock signal；
The logic control element 22 is used for the sub-pixel that current driving shows provided according to the time schedule controller 10
Line position put and/or Current Temperatures information, control power supply switch unit 21 is from described more than one group of high drive clock signal
One group of output of middle selection, as the high drive clock signal of shift register.
In the embodiment of the present invention, shift register is configured with more than one group of high drive clock signal, can according to work as
The rows position of preceding driving display and/or the information of Current Temperatures, select corresponding high drive clock signal, Ye Jizhen
To different situations, may be selected suitable high drive clock signal, it is to avoid due to caused by undercharge grid to the bad problem of line.
Wherein, every group of high drive clock signal includes two clock signals (high level VGH and low level VGL).
It should be noted that the shift register of the embodiment of the present invention equally includes logic circuit as shown in Figure 3, displacement
Deposit unit, level conversion unit and output buffer unit, the logic control element 22 and power supply in present invention implementation are cut
Changing unit 21 can be separately provided in a shift register, it is also possible to all or part of level conversion unit and/or defeated of being arranged on
Go out in buffer unit.
Alternatively, the power supply switch unit 21 is configured with two groups of high drive clock signals, and respectively the first high pressure is driven
Dynamic clock signal group and the second high drive clock signal group, wherein, the first high drive clock signal group can be described as high level
The high drive clock signal group of input, including VGHH (high level input VGH voltages) and VGLH (high level input VGL electricity
Pressure)；Second high drive clock signal group can be described as the high drive clock signal group of low level input, including VGHL (low electricity
Flat input VGH voltages) and VGLL (low level input VGL voltages).Wherein, VGHH>VGHL>0V, VGLH<VGLL<0V.Usual
In the case of, VGHH/VGHL-VGLH/VGLL<The numerical value of 40V, specific VGHH, VGHL, VGLL, VGLH has depending on different panels characteristic
Institute is different.
As shown in fig. 6, for shift register be configured with two groups of high drive clock signals (VGHH and VGLH, VGHL and
VGLL schematic diagram).Wherein, Vcmp is the logic unit signal of time schedule controller output, drives what is shown for representing current
Rows position and/or the information of Current Temperatures.In this embodiment, logic control element and power supply switch unit and level
Converting unit and output buffer unit are set together.
The display drive method of the embodiment of the present invention, shift register is configured with more than one group of high drive clock letter
Number, methods described includes：
When the shift register drives display panel to show frame by frame, according to the current rows position for driving and showing
And/or according to Current Temperatures, select one group of corresponding high drive clock signal.
In the embodiment of the present invention, shift register is configured with more than one group of high drive clock signal, can according to work as
The rows position of preceding driving display and/or the information of Current Temperatures, select corresponding high drive clock signal, Ye Jizhen
To different situations, may be selected suitable high drive clock signal, it is to avoid due to caused by undercharge grid to the bad problem of line.
Alternatively, every group of high drive clock signal includes high level signal and low level signal, the shift LD
Device is configured with two groups of high drive clock signals, and respectively the first high drive clock signal group and the second high drive clock are believed
Number group, wherein, the high level signal voltage in the first high drive clock signal group is more than the second high drive clock signal group
High level signal voltage and more than 0 volt, low level signal voltage in the first high drive clock signal group is high less than second
Pressure drives the low level signal voltage of clock signal group and less than 0 volt；
The basis currently drives the rows position of display, selects one group of corresponding high drive clock signal group
Including：When the rows position of current driving display is the first row sub-pixel, the first high drive clock signal group is selected；When
When the rows position of preceding driving display is other row sub-pixels in addition to the first row sub-pixel, the second high drive is selected
Clock signal group；
It is described according to Current Temperatures, select one group of corresponding high drive clock signal group to include：Current Temperatures are less than
During equal to temperature threshold, the first high drive clock signal group is selected；When Current Temperatures are more than temperature threshold, the second high pressure is selected
Drive clock signal group；
The basis currently drives the rows position of display and according to Current Temperatures, selects one group of corresponding high pressure
Driving clock signal group includes：The current rows position for driving display is the first row sub-pixel, or Current Temperatures less than etc.
When temperature threshold, the first high drive clock signal group is selected；The rows position of current driving display is except the first row
Other row sub-pixels beyond sub-pixel, and Current Temperatures be more than temperature threshold when, select the second high drive clock signal group.
When the rows position of current driving display is the first row sub-pixel, during the high drive of selection high level input
Clock signal group, can increase the firing current of thin film transistor (TFT), it is to avoid grid is asked to line is bad caused by first trip undercharge
Topic.Current Temperatures are less than or equal to temperature threshold, and the high drive clock signal group of selection high level input increases thin film transistor (TFT)
Firing current, it is to avoid due to low temperature drive caused by grid to the bad problem of line.
Illustrated so that power supply switch unit is configured with two groups of high drive clock signals as an example below, but the present invention is not
It is limited to this, can be using the high drive clock signal more than two groups.
Embodiment one
In the present embodiment, according to current driving display rows position and the information of Current Temperatures, export high pressure
Drive clock signal.
As shown in fig. 7, the time schedule controller 10 includes connected temperature detecting unit 11 and select unit 12, the choosing
Unit 12 is selected to be connected with the logic control element 22；
The temperature detecting unit 11 is used to export Current Temperatures less than or equal to temperature threshold or the letter more than temperature threshold
Cease to the select unit 12；
The select unit 12 drives the rows position for showing for the first row sub-pixel for current, or Current Temperatures
During less than or equal to temperature threshold, the first signal is exported；It is current drive display rows position be except the first row sub-pixel with
Other outer row sub-pixels, and Current Temperatures be more than temperature threshold when, export secondary signal；
The logic control element 22 is further used for：When receiving the first signal of the output of the select unit 12, control
Power supply switch unit 21 processed is output as the high drive clock signal group of high level input；Receive the select unit 12 defeated
During the secondary signal for going out, control power supply switch unit 21 is output as the high drive clock signal group of low level input.
When the rows position of current driving display is the first row sub-pixel, during the high drive of selection high level input
Clock signal group, can increase the firing current of thin film transistor (TFT), it is to avoid grid is asked to line is bad caused by first trip undercharge
Topic.Current Temperatures are less than or equal to temperature threshold, and the high drive clock signal group of selection high level input increases thin film transistor (TFT)
Firing current, it is to avoid due to low temperature drive caused by grid to the bad problem of line.
Below by taking Fig. 8 as an example, it is described in detail.
As shown in figure 8, temperature detecting unit 11 may include temperature sensor, resistance and comparator, select unit 12 can be wrapped
Include OR circuit, temperature sensor low temperature (i.e. less than or equal to temperature threshold such as minus 20 degrees or subzero 10 degree, can be according to tool
Body application scenarios are selected) when output signal Vout_1 be more than reference power source Vref_1, then comparator output level Vout_2
(signal is high level to output high level during first trip, and the non-first trip signal is low electricity with output signal of time sequence controller Vtcocn
It is flat) be output logic control signal Vcmp after OR gate OR Gate computings, i.e., now no matter Vtcon exports high or low signal,
Vcmp exports high level；Conversely, if temperature sensor is at high temperature (i.e. more than temperature threshold), output signal Vout_1 is less than
Reference power source Vref_1, then comparator output level Vout_2 outputs low level its with output signal of time sequence controller Vtcocn
(signal is high level during first trip, and the non-first trip signal is low level) exports logic control letter after doing OR gate OR Gate computings
Number Vcmp, i.e., now Vcmp output levels depend on Vtcon signal levels.
Wherein, output signal of time sequence controller Vtcocn can by time schedule controller according to setting frame start signal and
Blanking (clear area) information output, is existing signal.
Following table gives the work-based logic of power supply switch unit.When logic control element input Vcmp is high level, electricity
The power supply of source switch unit output Input1 assembles VGHH and VGLH, is loaded on the power supply of shift register afterwards, works as logic
During control unit input low level, the power supply of power supply switch unit output Input2 assembles VGHL and VGLL, and shifting is loaded into afterwards
On the power supply of bit register, so as to take into account control low temperature and only realize firing current I higher in first tripon, and other rows are adopted
With relatively low Ion, so as to the undercharge problem introduced when evading consecutive frame polarity inversion.
The work-based logic table of the power supply switch unit of table one
Wherein, power supply switch unit 21 includes two groups of switching subelements, and one group of switching subelement is by depletion type PMOS Q1
With Q2 compositions, another group is made up of depletion type NMOS tube Q3 and Q4, wherein, according to the control letter that logic control element 21 is exported
Number, an output in control selections VGH1 and VGH2, and, an output in selection VGL1 and VGL2.
Logic control element 22 controls the break-make of Q1, Q2, Q3 and Q4, so as to the selection for carrying out different VGH and VGL is exported.
When the input signal of logic control element 22 is high level 1, it exports GND level to Q1, and VGHL level is given to Q2, GND level
To Q4, so as to control Q1 and Q3 to open, Q2 and Q4 is closed Q3, VGLL level, so as to select VGHH (VGH1) and VGLH (VGL1)
Output；When logic control element 22 input signal be low level 0 when, it exports VGHH level to Q1, GND level to Q2,
To Q3, to Q4, so as to control Q2 and Q4 to open, Q1 and Q3 is closed GND level VGLH level, thus select VGHL (VGH2) and
VGLL (VGL2) is exported.
Embodiment two
In the present embodiment, according to the current rows position for driving and showing, high drive clock signal is exported.
As shown in figure 9, in the present embodiment, the logic control element 22 is further used for：According to the SECO
When the rows position that the current driving that device 10 is provided shows is the first row sub-pixel, the output of control power supply switch unit 21
It is the high drive clock signal group of high level input；The sub- picture that the current driving provided according to the time schedule controller 10 shows
When plain line position is set to other row sub-pixels in addition to the first row sub-pixel, control power supply switch unit 21 is output as low level
The high drive clock signal group of input.
When the rows position of current driving display is the first row sub-pixel, during the high drive of selection high level input
Clock signal group, can increase the firing current of thin film transistor (TFT), it is to avoid grid is asked to line is bad caused by first trip undercharge
Topic.
Time schedule controller 10 provide signal be Vtcocn, can by time schedule controller according to setting frame start signal and
Blanking (clear area) information output, high level is that rows position is the first row sub-pixel, and low level is rows
Position is other row sub-pixels in addition to the first row sub-pixel, is existing signal.
Power supply switch unit 21 and logic control element 22 can refer to the description of embodiment one, and here is omitted.
Embodiment three
In the present embodiment, according to the information of Current Temperatures, high drive clock signal is exported.
As shown in Figure 10, the time schedule controller 10 includes temperature detecting unit 11；
The temperature detecting unit 11 is used to export Current Temperatures less than or equal to temperature threshold or the letter more than temperature threshold
Breath；
The logic control element 22 is further used for：It is less than according to the Current Temperatures that the temperature detecting unit 11 is provided
Equal to the information of temperature threshold, control power supply switch unit 21 is output as the high drive clock signal group of high level input；
According to information of the Current Temperatures more than temperature threshold that the temperature detecting unit 11 is provided, the defeated of power supply switch unit 21 is controlled
It is the high drive clock signal group of low level input to go out.
Current Temperatures are less than or equal to temperature threshold, and the high drive clock signal group of selection high level input increases film
The firing current of transistor, it is to avoid grid are to the bad problem of line caused by being driven due to low temperature.
Wherein, Fig. 8 in similar embodiment one, temperature detecting unit 11 may include temperature sensor, resistance and comparator,
Temperature sensor low temperature (i.e. less than or equal to temperature threshold such as minus 20 degrees or subzero 10 degree, can be according to concrete application scene
Selected) when output signal Vout_1 more than reference power source Vref_1, then comparator output level Vout_2 outputs high level；
Conversely, if temperature sensor is at high temperature (i.e. more than temperature threshold), output signal Vout_1 is less than reference power source Vref_1, then
Comparator output level Vout_2 exports low level.
Power supply switch unit 21 and logic control element 22 can refer to the description of embodiment one, and here is omitted.
Example IV
The shift register of the present embodiment, including multiple shift register cells for cascading, wherein, for driving the first row
The W/L values of the switch TFT in the shift register cell of sub-pixel are more than the shift register for driving other row sub-pixels
The W/L values of the switch TFT in unit, wherein, the W is that TFT links up width, and L is TFT channel length, and W/L represents that TFT is linked up
Width is divided by TFT channel length.
According to TFT conducting electric current formula Ion=1/2 μ C0(W/L)(Vgs-Vth)2, wherein, W is TFT channel width, and L is
TFT channel length, μ-carrier mobility is determined, C by the material of active layer (Active)0It is unit area capacitance, by insulating
The dielectric constant and thickness of layer (GI) material determine that Vgs is the grid voltage of TFT and the electrical potential difference of source voltage, and Vth is TFT
Threshold voltage.The charging voltage variable quantity of source electrode is 2 times or so of other rows during due to first trip polarity switching, in order to make up the difference
Different amount, according to electric charge transfer law of conservation, Q=Δ I*t=C* Δ U, the shift register list for driving the first row sub-pixel
The charging voltage variation delta U of the switch TFT in unit is approximately 2 times of other rows, in identical charging interval and identical charge rate bar
Under part, the charging current Δ I of first trip needs to reach 2 times of other rows, according to TFT conducting electric current formula, will be used for driving first
The W/L values of the switch TFT in the shift register cell of row sub-pixel are set greater than the shifting for driving other row sub-pixels
The W/L values of the switch TFT in bit register unit, for example, in will be for driving the shift register cell of the first row sub-pixel
Switch TFT W/L values be arranged to other rows switch TFT 2~3 times (can be by W/L values 2 or so) so that only in first trip
Realize firing current I higheron, and other rows use relatively low Ion, so as to filling for being introduced when evading consecutive frame polarity inversion
Electric deficiency problem.
Wherein, switch TFT is between clock signal clk and signal output part OUTPUT, to be beaten according to clock signal clk
Open or close and close, so that the TFT of output signal.For example, referring to Fig. 1, M3 is switch TFT, source electrode connection clock signal clk, drain electrode
Connection signal output part OUTPUT.To can be set for the W/L values for driving the M3 in the shift register cell of the first row sub-pixel
It is set to 2~3 times of the W/L values for the M3 in the shift register cell for driving other row sub-pixels.
Example IV can be used alone, it is also possible to be used in combination with other embodiments, can preferably avoid first trip from filling
The grid that electricity is not enough and causes are to the bad problem of line.
The embodiment of the present invention additionally provides a kind of display device, including above-mentioned display provided in an embodiment of the present invention drives dress
Put.The principle of the display device solve problem is similar to foregoing display drive apparatus, therefore the implementation of the display device can be joined
See the implementation of foregoing display drive apparatus, repeat part and will not be repeated here.
The embodiment of the present invention additionally provides a kind of display device, including above-mentioned shift LD provided in an embodiment of the present invention
Device.The principle of the display device solve problem is similar to aforementioned shift register, therefore the implementation of the display device may refer to
The implementation of aforementioned shift register, repeats part and will not be repeated here.
In the specific implementation, display device provided in an embodiment of the present invention can be：It is mobile phone, panel computer, television set, aobvious
Show any product or part with display function such as device, notebook computer, DPF, navigator.For the display device
Other essential parts be it will be apparent to an ordinarily skilled person in the art that have, will not be described here,
Also should not be taken as limiting the invention.
Although disclosed herein implementation method as above, described content be only readily appreciate the present invention and use
Implementation method, is not limited to the present invention.Technical staff in any art of the present invention, is taken off the present invention is not departed from
On the premise of the spirit and scope of dew, any modification and change, but the present invention can be carried out in the form and details implemented
Scope of patent protection, must be still defined by the scope of which is defined in the appended claims.
Claims (10)
1. a kind of display drive apparatus, including time schedule controller and shift register, it is characterised in that the shift register bag
Connected logic control element and power supply switch unit are included, wherein：
The power supply switch unit is configured with more than one group of high drive clock signal；
The logic control element be used for the rows position that show of current driving that is provided according to the time schedule controller with/
Or the information of Current Temperatures, control power supply switch unit selected from described more than one group of high drive clock signal one group it is defeated
Go out, as the high drive clock signal of the shift register.
2. display drive apparatus according to claim 1, it is characterised in that
Every group of high drive clock signal includes high level signal and low level signal, and the power supply switch unit is configured with two
Group high drive clock signal, respectively the first high drive clock signal group and the second high drive clock signal group, wherein,
High level signal voltage in first high drive clock signal group is believed more than the high level of the second high drive clock signal group
Number voltage and more than 0 volt, the low level signal voltage in the first high drive clock signal group is less than the second high drive clock
The low level signal voltage of signal group and less than 0 volt.
3. display drive apparatus according to claim 2, it is characterised in that
The logic control element is further used for：The rows that the current driving provided according to the time schedule controller shows
When position is the first row sub-pixel, control power supply switch unit is output as the first high drive clock signal group；According to described
The rows position that the current driving that time schedule controller is provided shows is other row sub-pixels in addition to the first row sub-pixel
When, control power supply switch unit is output as the second high drive clock signal group.
4. display drive apparatus according to claim 2, it is characterised in that the time schedule controller includes temperature detection list
Unit；
The temperature detecting unit is used to export Current Temperatures less than or equal to temperature threshold or the information more than temperature threshold；
The logic control element is further used for：The Current Temperatures provided according to the temperature detecting unit are less than or equal to temperature
The information of threshold value, control power supply switch unit is output as the first high drive clock signal group；According to the temperature detection list
More than the information of temperature threshold, control power supply switch unit is output as the second high drive clock to be believed the Current Temperatures that unit provides
Number group.
5. display drive apparatus according to claim 2, it is characterised in that the time schedule controller includes connected temperature
Detection unit and select unit, the select unit are connected with the logic control element；
The temperature detecting unit be used to exporting Current Temperatures less than or equal to temperature threshold or more than temperature threshold information to institute
State select unit；
It is the first row sub-pixel that the select unit is used for the current rows position for driving display, or Current Temperatures less than etc.
When temperature threshold, the first signal is exported；The rows position of current driving display is its in addition to the first row sub-pixel
He manages it sub-pixel, and Current Temperatures are when being more than temperature threshold, export secondary signal；
The logic control element is further used for：When receiving the first signal of the select unit output, control power supply is cut
Change unit and be output as the first high drive clock signal group；When receiving the secondary signal of the select unit output, control
Power supply switch unit is output as the second high drive clock signal group.
6. display drive apparatus according to any one in Claims 1 to 5, it is characterised in that
The shift register, including multiple shift register cells for cascading, wherein, the shifting for driving the first row sub-pixel
The W/L values of the switching thin-film transistor TFT in bit register unit are more than the shift register for driving other row sub-pixels
The W/L values of the switch TFT in unit, wherein, the W is that TFT links up width, and L is TFT channel length, and W/L represents that TFT is linked up
Width is divided by TFT channel length.
7. a kind of display drive method, it is characterised in that shift register is configured with more than one group of high drive clock signal,
Methods described includes：
When the shift register drives display panel to show frame by frame, according to the current rows position for driving display and/or
According to Current Temperatures, one group of corresponding high drive clock signal is selected.
8. method according to claim 7, it is characterised in that
Every group of high drive clock signal includes high level signal and low level signal, and the shift register is configured with two groups
High drive clock signal, respectively the first high drive clock signal group and the second high drive clock signal group, wherein, the
High level signal of the high level signal voltage more than the second high drive clock signal group in one high drive clock signal group
Voltage and more than 0 volt, the low level signal voltage in the first high drive clock signal group is believed less than the second high drive clock
The low level signal voltage of number group and less than 0 volt；
The basis currently drives the rows position of display, selects one group of corresponding high drive clock signal group bag
Include：When the rows position of current driving display is the first row sub-pixel, the first high drive clock signal group is selected；Currently
When the rows position for driving display is other row sub-pixels in addition to the first row sub-pixel, during the second high drive of selection
Clock signal group；
It is described according to Current Temperatures, select one group of corresponding high drive clock signal group to include：Current Temperatures are less than or equal to
During temperature threshold, the first high drive clock signal group is selected；When Current Temperatures are more than temperature threshold, the second high drive is selected
Clock signal group；
The basis currently drives the rows position of display and according to Current Temperatures, selects one group of corresponding high drive
Clock signal group includes：The rows position of current driving display is the first row sub-pixel, or Current Temperatures are less than or equal to temperature
During degree threshold value, the first high drive clock signal group is selected；The rows position of current driving display is except the sub- picture of the first row
Other row sub-pixels beyond element, and Current Temperatures be more than temperature threshold when, select the second high drive clock signal group.
9. the shift register cell of a kind of shift register, including multiple cascades, it is characterised in that for driving the first row
The W/L values of the switching thin-film transistor TFT in the shift register cell of pixel are more than the shifting for driving other row sub-pixels
The W/L values of the switch TFT in bit register unit, wherein, the W is that TFT links up width, and L is TFT channel length, and W/L is represented
TFT links up width divided by TFT channel length.
10. a kind of display device, it is characterised in that including the display drive apparatus as described in claim any one of 1-6.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107068105A (en) * | 2017-06-15 | 2017-08-18 | 深圳市华星光电技术有限公司 | Grid chip |
| CN109036328A (en) * | 2017-06-09 | 2018-12-18 | 京东方科技集团股份有限公司 | Register value transmission method and component, display device |
| CN109616065A (en) * | 2018-12-29 | 2019-04-12 | 武汉华星光电技术有限公司 | The display methods of display panel |
| CN109785788A (en) * | 2019-03-29 | 2019-05-21 | 京东方科技集团股份有限公司 | Level processing circuit, gate driving circuit and display device |
| CN110689838A (en) * | 2019-10-31 | 2020-01-14 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN114495800A (en) * | 2022-03-07 | 2022-05-13 | 北京京东方显示技术有限公司 | Display panel driving method and display device |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1407536A (en) * | 2001-08-21 | 2003-04-02 | 三星电子株式会社 | Liquid crystal display device and its driving method |
| CN1658270A (en) * | 2004-02-20 | 2005-08-24 | 三星电子株式会社 | Pulse compensator, display device and method of driving the display device |
| CN101083062A (en) * | 2006-06-02 | 2007-12-05 | Lg.菲利浦Lcd株式会社 | Liquid crystal display and driving method thereof |
| KR20080032388A (en) * | 2006-10-09 | 2008-04-15 | 엘지.필립스 엘시디 주식회사 | Driving liquid crystal display and apparatus for driving the same |
| CN101681606A (en) * | 2007-06-12 | 2010-03-24 | 夏普株式会社 | Liquid crystal display device, method for driving liquid crystal display device, and television receiver |
| CN102368381A (en) * | 2011-10-27 | 2012-03-07 | 深圳市华星光电技术有限公司 | Method for improving charging of liquid crystal panel and circuit thereof |
| CN103426409A (en) * | 2012-05-15 | 2013-12-04 | 联咏科技股份有限公司 | Display driving device and driving method of display panel |
| CN103489418A (en) * | 2013-06-03 | 2014-01-01 | 友达光电股份有限公司 | Driving method of display panel, display panel and grid driving circuit |
| CN103985365A (en) * | 2014-04-24 | 2014-08-13 | 京东方科技集团股份有限公司 | Polarity inversion drive method and device of liquid crystal display panel |
| CN104361876A (en) * | 2014-12-08 | 2015-02-18 | 京东方科技集团股份有限公司 | Driving method, driving circuit and display device |
| CN105448256A (en) * | 2015-12-22 | 2016-03-30 | 昆山龙腾光电有限公司 | Liquid crystal display device and driving method thereof |
| CN105590601A (en) * | 2015-12-18 | 2016-05-18 | 上海中航光电子有限公司 | Driving circuit, array substrate, and display device |
-
2017
- 2017-03-31 CN CN201710210140.5A patent/CN106710567A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1407536A (en) * | 2001-08-21 | 2003-04-02 | 三星电子株式会社 | Liquid crystal display device and its driving method |
| CN1658270A (en) * | 2004-02-20 | 2005-08-24 | 三星电子株式会社 | Pulse compensator, display device and method of driving the display device |
| CN101083062A (en) * | 2006-06-02 | 2007-12-05 | Lg.菲利浦Lcd株式会社 | Liquid crystal display and driving method thereof |
| KR20080032388A (en) * | 2006-10-09 | 2008-04-15 | 엘지.필립스 엘시디 주식회사 | Driving liquid crystal display and apparatus for driving the same |
| CN101681606A (en) * | 2007-06-12 | 2010-03-24 | 夏普株式会社 | Liquid crystal display device, method for driving liquid crystal display device, and television receiver |
| CN102368381A (en) * | 2011-10-27 | 2012-03-07 | 深圳市华星光电技术有限公司 | Method for improving charging of liquid crystal panel and circuit thereof |
| CN103426409A (en) * | 2012-05-15 | 2013-12-04 | 联咏科技股份有限公司 | Display driving device and driving method of display panel |
| CN103489418A (en) * | 2013-06-03 | 2014-01-01 | 友达光电股份有限公司 | Driving method of display panel, display panel and grid driving circuit |
| CN103985365A (en) * | 2014-04-24 | 2014-08-13 | 京东方科技集团股份有限公司 | Polarity inversion drive method and device of liquid crystal display panel |
| CN104361876A (en) * | 2014-12-08 | 2015-02-18 | 京东方科技集团股份有限公司 | Driving method, driving circuit and display device |
| CN105590601A (en) * | 2015-12-18 | 2016-05-18 | 上海中航光电子有限公司 | Driving circuit, array substrate, and display device |
| CN105448256A (en) * | 2015-12-22 | 2016-03-30 | 昆山龙腾光电有限公司 | Liquid crystal display device and driving method thereof |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109036328A (en) * | 2017-06-09 | 2018-12-18 | 京东方科技集团股份有限公司 | Register value transmission method and component, display device |
| CN107068105A (en) * | 2017-06-15 | 2017-08-18 | 深圳市华星光电技术有限公司 | Grid chip |
| CN109616065A (en) * | 2018-12-29 | 2019-04-12 | 武汉华星光电技术有限公司 | The display methods of display panel |
| WO2020133843A1 (en) * | 2018-12-29 | 2020-07-02 | 武汉华星光电技术有限公司 | Display method for display panel |
| US10896651B2 (en) | 2018-12-29 | 2021-01-19 | Wuhan China Star Oproelectronics Technology Co., Ltd. | Method for displaying a display panel |
| CN109785788A (en) * | 2019-03-29 | 2019-05-21 | 京东方科技集团股份有限公司 | Level processing circuit, gate driving circuit and display device |
| CN110689838A (en) * | 2019-10-31 | 2020-01-14 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN114495800A (en) * | 2022-03-07 | 2022-05-13 | 北京京东方显示技术有限公司 | Display panel driving method and display device |
| CN114495800B (en) * | 2022-03-07 | 2023-12-26 | 北京京东方显示技术有限公司 | Display panel driving method and display device |
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